Jawaharlal Nehru Technological University, the creating the necessary infrastructure facilities for own – but because their
ut because their specialty to develop
First Technological University of India,
was established on 2nd October 1972 in
Andhra Pradesh with head quarters
located in a historical city Hyderabad.
The University is one of the premier
Universities in India accredited by
NAAC with ‘A’ Grade. After successful
and proven levels of appreciated
existence and stature spanning over 36
years, JNTU has been divided into four
different universities by Govt. of Andhra
Pradesh, through Act No.30, Dt. 24th
September, 2008. One of the constituent
colleges of the University “JNTUH
College of Engineering, Hyderabad” is
regarded as a pioneer in shaping the
excellence of some of the leading
organizations of the industry, by
churning out the finest professionals with
a resolve to scale greater heights in the
technological scenario, every year. Other
constituent college of JNTUH is located
at Jagityal and 11 other academic units at
Hyderabad campus.
The Department of Electronics and Communication
Engineering established in 1973, is instrumental in
molding the careers of students and helping them to
become world-class professionals. Besides highly
qualified and experienced staff and well-equipped
laboratories, the Department has been awarded 8.1
points out of 10 by the State Board of Technical
Education.
CVED
Center for VLSI & Embedded Systems Design is
initiated by Dr. D. N. Reddy, Hon’ble Vice
Chancellor of JNTUH University and is aimed at
carrying out the studies and investigations in identified better electronic products, faster and more cost-
R&D areas, related to VLSI Design and Embedded effective powerful tools and methodologies to
Systems Design, Development and Testing. The vision address the challenges for next-generation
of CVED is to promote Research and Developmental designs.
Activities in application specific areas related to VLSI
Design, Embedded System Design, Signal Processing This workshop is a gesture of such an attempt to
and Wireless Communications, with identified provide a chance to the interested, inquisitive
knowledge base in terms of faculty, scholars and and talented generation in the Universities to
infrastructure, capable of developing low cost and educate, inspire them to pursue their ambitions
innovative indigenous technologies. and make a great impression on the country’s
future.
Mentor Graphics:
Topics to be covered:
Mentor Graphics® provides software and hardware • Digital Logic Using HDLs
design solutions that enable companies to develop • Logic Synthesis
better electronic products faster and more cost- • Design For Test (DFT)
effectively. We offer innovative products and • CMOS logic gates Schematic & layout
solutions that help engineers overcome the design
• Analog & Mixed Signal simulations
challenges they face in the increasingly complex
worlds of board and chip design. • Open Standards
• Verification Methodologies
Trident Techlabs: • Parasitic Extraction &Physical
Verification
Trident Techlabs is an ISO 9001 – 2000 Company • DRC / LVS, Rule Sets
having its presence in Seven Major Cities across India. Using Modelsim, Questasim, Precision
Techlabs is well respected in different segments of Synthesis, IC Station, Eldo, Calibre ,HDL
Industries and Academic Institutions for NI, EDA, Designer (Mentor Graphics tools).
Power and Automation. We are authorized partners
with Mentor Graphics Corporation, USA in India for Resource Persons:
the promotion of its solutions to various segments of Resource persons are drawn from: M/s Mentor
the Industry and Universities. Graphics, Bangalore, Trident Techlabs Private
Ltd, Bangalore / Hyderabad, JNTUH
About the Workshop:
Eligibility:
Educators at the World’s most prestigious engineering Faculty of Educational Institutions/ Research
colleges and universities adopt Mentor Graphics Tools Scholars/ Persons working in R& D
not only because they easy to learn and affordable to Organization, with a minimum qualification of
Bachelor’s degree in Electronics &
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Communication/ Electrical/ Computer Science and Mr. Sham Kumar / Mr. B. Srinivas
allied branches of Engineering, are eligible to apply. Trident Techlabs Pvt Ltd, Hyderabad
Email : s.kumar@tridenttechlabs.com
b.srinivas@tridenttechlabs.com
Important Date: Cell: +91 9985020430, +91 9908966658
Last date for registration: 6st August, 2010 Office: 040- 27632958, 40078229 A Five day Workshop on
How to Apply:
Interested persons may apply in the prescribed format Registration Form “VLSI Design Methodology
along with the Registration fee. Payments should be Using Mentor Graphics Tools”
made through a Demand Draft drawn in favor of “The Name of the Applicant:………………….
Principal, CVED” payable at JNTUH, Hyderabad or (Block Letters) 9th – 13th August 2010
by cash at the time of registration and the application …………………………………………..
be sent to on or before 6th August ’2010. As an Organized by
alternative, the form can be submitted online to Designation:……………………………… Department of Electronics &
cved.jntuh@gmail.com. The online submission will Communication Engineering
Gender: (M/F): …..
require as an attachment of softcopy of registration
form, the scanned version of the Demand Draft being
Educational Qualifications:……………
sent. The DD must also be mailed separately at the
same time. The participants are advised to register Center for VLSI & Embedded Systems
Address for Correspondence :( Including E-mail, Fax, Design (CVED)
well in advance of the scheduled dates.
Cell / Landline)
……………………………………………………… In Collaboration with
Registration Fee:
………………
Research / P.G. Students/ Academic Staff: Rs. 1,500/-
………………………………………………………
………………
Accommodation:
……………………………………………………… Mentor Graphics, Bangalore
Limited accommodation is available for the
……………… and
participants in the Guest House on first come first
Name of the Sponsoring Institute/Organization:
serve basis on payment basis for an amount of
Rs.300/-(Towards boarding & Lodging Charges) per
day. However working lunch and snacks will be Is Accommodation required ? Yes / No
provided for all the participants. Trident Techlabs
Demand Draft Amount: Rs:
Address for Correspondence
Demand Draft No:……….…………… Coordinators
Dr. M. Madhavi Latha Dr. M. Asha Rani
Professor & Coordinator Professor & Coordinator Bank:…………………………………… Dr. L. Pratap Reddy
CVED CVED Dated:…………………………………... Dr. M. Madhavi Latha
Department of ECE, Department of ECE,
JNTUH CEH JNTUH CEH
Dr. M. Asha Rani
Cell: 9848506611 Cell: 9848564860
E-mail: cved.jntuh@gmail.com

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JNTUH COLLEGE OF ENGINEERING
Hyderabad-500 085, Andhra Pradesh