Thiet Bi Ngoai Vi &amp Ghep Noi Ch05

ch 5.
digital interface
• GhÐp nèi hÖ trung t©m víi ThiÕt bÞ ngo¹i vi qua
çc tÝn hiÖu logic 1/0
• pARALLEL iN/OUT
– poRTS: principle, pPI, Centronics/LPT
– PCMCIA, Dual ported Ram.
– INTERCACing to devices: Key pad, LED, text
panel, encoder, STEP motor, ...
– hI-pOWER INTERFACE: relay, scr, triac, power
mosfet, igbt...
• sERIAL in/OUT: Sync, async,
– RS-232, RS-485, RS-422
– modem...
P&I Ch5-Digi In/Out 1

5.1. parallel interface: 5.1.1. nGuyªn lý
• In/Out nhiÒu bit ®ång thêi, nhanh, gÇn
a. A Port Line (Ù1bit port):
– Output Port: Latched Output (chèt ra), D_Flip-Flops
– Unlatched Input, h×nh 5.1. single IO line/pin

• D Flip-Flop (D trigger):
– Là 1 trong những phần tử cơ bản của hệ dãy,
– D – data, lưu giữ 1 bit số liệu.
– 4/6/8 D flip-flop => tạo ra 4/6/8 bit register, nhiều
registers đóng trong 1 chip là SRAM.
– Input:
• Data bit: 1 hoặc 0
• Clock, thường là sườn lên, ghi nhận giá trị của data và lưu lại
cho đến khi có bit số liệu khác ghi đè lên.
• [Có thể có] clear – xóa; Preset – đặt trước
– Output:
• Q - ứng với giá trị data input vào thời điểm có clock
• /Q – đảo của Q.
– Có 2 loại: Transparent (HC373) và Master-Slave
(HC374)
H. 501 b, c
MOSFET (Metal Oxide Semiconductor Field Effect Transistor)

• Write pin: bit 0 or 1, clock = ↑
– Write bit 0: D flip-flop => Q = 0; -Q = 1 =>
gate = 1 => R(ds) MOSFET = ON => pin = 0
– Write bit 1 D flip-flop => Q = 1; -Q = 0 =>
gate = 0 => R(ds) MOSFET = OFF => pin = 1
• Read pin: (Input line– out “1” firstly)-
ReadPin = 0 (!) => open 3 state lower
buffer => 1/0 from pin => data bus (i)
• ReadLatch (Reading bit out previously) :
-ReadLatch = 0 (!) => open 3 state higher
buffer => 1/0 from pin => data bus (i)
b. Simple In-Out Ports:
• Cæng ra ®¬n gi¶n cã chèt (latched output port, based on

74 HC 374/HC373/HC273/HC574..., 8 bit Register), (fig.
5.2)
• Cæng vµo ®¬n gi¶n kh«ng chèt (unlatched input port,
based on 3 state buffer - 74HC244)
• Cæng vµo cã chèt (Latched Input Port), chó ý status flag


Port[Parallel_Out]:= solieu; LÖnh Pascal
• Out Port: 74 HC 374:
• CPU ph¸t ®Þa chØ ra IO space => cã t/h -IO CS
• Ph¸t data vµ -IOW => cã t/h Clock = ↑ (Rising Edge) =>
data ®−îc chèt vµo HC374
• Ng/vi => OutControl = 0 => open 3 state output
Hình 5.2c. Unlatched Input Port
Hình 5.2d. Latched Input Port

c. Port song song cã tÝn hiÖu b¾t tay/ tr¹ng th¸i (outport):
– Göi 1 packet ra ngo¹i vi, cÇn ®ång bé gi÷a 2 phÝa
– Peripheral chØ ®äc bé ®Öm cæng khi cã sè liÖu (cê IBF
thiÕt lËp, 1)
– CS chØ göi sè liÖu ra tiÕp theo khi byte/char tr−íc ®· ®−îc
®äc bëi Peripheral (OBE - Output Buffer Empty, xãa, 0)
– Chó ý Time-Out-Error.
– CPU göi 1 character, set -OBE =1 (Out. Buf Empty)
– Per: If IBF= 1 then ®äc char (In. Buffer Full)
– Bµi tËp: LËp tr×nh (C/ Pascal/Asm) cho s¬ ®å sau ®Ó
göi 1 packet n byte - Chó ý Timeout Error

OBE

5.1. parallel interface: 5.1.2. Programmable ports
• Ports:
• Intel PPI 8255 (Programmable Peripheral Interface)
• Motorola PIA 6821 (Progr. Interface Adaptor)
• Z80 PIO (Parallel In/Out) ...
• Flexible Specifics:
• 2..4 In/ Out Ports, single line direction define (PIA/ PIO)
• Mode: IN/OUT w [w/o] handshake, bus trans-ceiver
• Control/ status/ HSK: Edge (↑, ↓) or Level (hi, lo)
• Case study 1: PPI 8255: Tù ®äc
4 ports: PA, PB, PCH & PCL, 24 IO lines
3 modes M0, M1 & M2, (PA & PB, PC as HSK signals)
§¬n gi¶n vµ hiÖu qu¶
• Case Study 2: Interface ISA bus – PPI 8255, (Fig. 5.3a)
H×nh 5.3a. GhÐp nèi PPI 8255 víi PC qua ISA bus
P&I Ch5-Digi
Addr: 300h-303h, Mode 0 all,In/Out
PA & PC In, PB Out 13
5.1. parallel interface: 5.1.3. centronics port
• Centronics Computer Inc. so called LPT; 2 LPT ports

(available) in PC
• Modes: SPP, EPP, ECP & IEEE 1284 (EPP+ECP)
• IRQ (7/ 5) & DRQ (1/ 3 - 8 bit channels) support for
many applications of Interface:
• Printer
• Local Area Network - LAN
• Ext. HDD, SemiDisk,
• Test Digital In/Out, ADC, DAC in many application
interfaces
• PC remote control (TV, Multi media, shut down...)
• Programmers (All 11P2) – nạp chip chuyên dùng
• Others
Mode 0: Simple Parallel Port - SPP (Normal mode, OUTput only)

• 50..100kB/s, cable 10' max - 25/36 lines - Ground twisted
pair, Base Addr: 378h - LPT1 & 278h - LPT2
• Data Out port, Addr. X78h - I/O space, TTL 0..5V,
• Open Coll. Buffered - 8 bit latched out, back read-latch
• LPT: send control & printed characters to Printer
• Control Out Port: X7Ah, TTL (x=3/2)
• 4 bit latched out, back read-latch, dïng software. §èi víi
çc thiÕt bÞ, 4 tÝn hiÖu nµy ®−îc set (1) vµ reset (0) b»ng
phÇn mÒm thuÇn tóy.
• LPT: /Strobe (b0), AutoFeed (b1), /Init (b2), SLCT(b3)
• IRQ_EN (b4), not outlet
• Status In, X79h, Unlatched, TTL (0..5V): Printer status
• 5 bit: b3..b7: Err, SLCT_IN, PE, -Ack, Busy

• Enable Int Req:

mov dx, 37Ah; LPT 1 control
in al, dx
or al, 0001 0000b
out dx, al ;
PASCAL:
Port[BA+2]:=Port[BA+2] or $10;
{set bit 4 only}
• Disable:
Port[BA+2]:=Port[BA+2] and $EF;
{Reset bit 4 only}

Mode 1: enhanced parallel port - epP

• Xircom, 1992, Hi speed - 2 MB/s (DMA, 1 ISA bus
cycle), bi-directional port, ghÐp nèi víi Ext HDD,
Local Network... Base Addr 378h hoÆc 278h
• 8 Registers:, cã t−¬ng thÝch víi SPP,
• Offset 0: SPP data , R/W data lines, w/o HSK
• Offset 1: SPP status, Read (b3..b7), b0 timeout
• Offset 2: SPP control, R/W 4bit C0..C3, C4: IRQ En,
C5: byte dir(ection) - chiÒu sè liÖu
• Offset 3: EPP addr, R/W addr cycle w HSK (b¾t tay)
• Offset 4: EPP data, R/W data cycle w HSK
• Others: may be used for 16/32, port config, user
define
Mode 2: extended capabilities port - ecp

• MS-HP, 1993, 2..5 MB/s (1 ISA bus cycle), bi directional
port, Ext HDD, Network... extension sys bus
• 16 FIFO byte buffer ®Ó göi/ nhËn, DMA: Mem <=>
buffer
• Cã thÓ ghÐp nèi víi çc ngo¹i vi chËm khi dïng Rdy
• M« pháng, t−¬ng thÝch h® cña SPP, EPP mode
• R/W: data & commands:
• OUT -C1 (HostAck); IN -S7 (Periphiral. Ack).
• -C1/ -S7 = 1 (sending data); 0 (command)
• Command: b7=1, b0..6: channel addr, b7=0, b0..6 run-
length count for data compression mode (®Õm çc byte
gièng nhau - graphics, hardware)
Mode 2: extended capabilities port - ecp

• Many chip (SMC's super IO...) hç trî decompress,
phÇn mÒm göi ra ph¶i 'compress'
• 6 registers: 3 SPP reg vµ 3 ECP reg
• Base addr + 400h: data FIFO & Config A-Read only
• Base addr + 401h: Config B (interrupt, DMA...)
• Base addr + 402h: Extended Control Register

Mode 3: ieee 1284 ( epp + ECP ), 1994, upto 5 MB/s

• IEEE 1284 standard - document: defines/ describes
protocols for Parallel-port Communication.
• Include: 1284 port/ 1284 cable/ 1284 Peri.
• 5 communication modes: (Register use - Table 11-1
p206, Parallel Port Complete)
• Compatibility Mode: Host sends a byte to Peri. (with
Busy vµ -Ack)
• Nibble Mode: Peri. to Host 4 bit, remainder - HSK
• Byte Mode: 8 bit, bi-dir
• EPP Mode: 8 bit, bi-dir, hi-speed
• ECP Mode: 8 bit, bi-dir: data, addr, compression
5.1. parallel interface: 5.1.4. dual ported ram
• ĐÓ chuyÓn m¶ng sè liÖu gi÷a 2 hÖ VXL (Master-Slave)

víi tèc ®é cao, gÇn, ... (Switching Systems, PLCs, Port
Graphics Accelerator...)
• SRAM, dung l−îng tõ 1KB ®Õn 64KB
• Multiple Reads & Writes ®ång thêi
• Dïng çc tÝn hiÖu:
• 2 x n bit Addr for 2 sides: Left - Right => 2n mem loc.
• 2 x 8 [16] bit of Data bit (lines)
• Çc tÝn hiÖu ®iÒu khiÓn (RD, WR, CS) vµ tr¹ng th¸i
• Çc tÝn hiÖu HSK/Arbitor
• H·ng: Integrated Device Technology Inc. & Others; chip
IDT 7707, 32Kbyte DPR
• VÝ
P&Idô øng dông: Ghi 32 kªnh
Ch5-Digi®iÖn
In/Out tho¹i/fax ®ång thêi 22
H×nh 5.5b. Dual ported Static RAM
5.1. parallel interface: 5.1.5. PCmcia/PC Card
personal computer memory card international

Association, Ver 2.1; pc card standard (5.0) 1996
• Lµ chuÈn cña nhiÒu tæ chøc/ c«ng ty: >500 members
• PC card device - credit card size adaptor: nhá, dÔ mang, hot
plugability, tin cËy khi m«i tr−êng thay ®æi, 68 pin connector
• Devices: Flash, SRAM, modem, LAN (wire & wireless), disk,
audio w DSP, GPS...
• 16 bit data path (PCMCIA 2.1/ PC Card Standard 5.0)
• 3.3 and/or 5 V
• Dïng víi nhiÒu lo¹i bus

5.1. parallel interface: 5.1.5. PCmcia
• KiÕn tróc ph©n nhiÒu tÇng ®Ó ®¶m b¶o tÝnh vËn hµnh
®éc lËp víi phÇn cøng:
• Socket service: Device driver - system manufacturer
• Card service: Device driver (ch−¬ng tr×nh ®iÒu khiÓn) -
Operating System Vendor
• Client Drivers/ Client Enablers, Device Driver t¹o çc y/c
tíi hÖ thèng: do h·ng chÕ t¹o Card cÊp
• Enablers/ Point Enablers: Driver chuyªn ®Ó th«ng tin trùc
tiÕp Host Adaptor

5.1. parallel interface: 5.1.5. PCmcia
PC Card Standard - CardBus:

• 32 bit transfer
• Based PCI specification
• 33MHz/ 132 MB/s
• BusMasster support
• Compatible w 16 bit card

5.1. Parallel interface: 5.1.6. LED Interface
a. Khái niệm: LED? Light
Emitting Diode
• Color:
– Red, Green, Yellow,
– Amber, R+G
– Infra Red, Violet
– LASER: Light
Amplification by
Stimulated Emission of
Radiation
– Blue, Cyan ...
• Symbol & characteristics H×nh 5.7a. LED
5.1. Parallel interface: 5.1.6. LED Interface
• Package and Applications:
– Single point, status of devices
– 7 segment/ 16 segment, Arabian digit, char
– Matrix 8x8 / 16 x 16, character box, graphics
modules
• Indoor, Outdoor (super light) and semi
outdoor
• Digital, character, graphics, signal display
• TriColor: Red – Green – Blue => PWM
drive => Full color 16,7M colors (3 byte)

P&I
H×nh 5.7b. LED’s characteristics
Ch5-Digi In/Out
(Amber Color) 30
• Tính toán mạch điều khiển LEDs:
– LED sáng tĩnh – sáng liên tục – Static Mode:
• Chọn độ sáng tương đối;
• Tra bảng =>dòng điện thuận I (đồ thì A, hình 5.7b);
• Tra bảng => điện áp thuận U (đồ thì B, hình 5.7b);
• Tính R1 = (Vcc – U)/I.
– LED chế độ quét, Scan Mode: ()
• Mạch sẽ điều khiển sáng 1 trong số n phần tử trong
1 thời điểm, rồi điều khiển phần tử tiếp theo... cho
đến hết vòng. Với điều kiện phải hiện được 50-60
frames/s.
• Tùy thuộc độ sáng và môi trường (in/out door) =>
thiết kế độ rỗng (duty cycle) của từng phần tử.

– Tính toán mạch: cũng giống như cách tính
mạch sáng tĩnh, thường chọn hệ số sáng tương
đối từ 2 đến 5.
– Chú ý:
• Độ an toàn - tuổi thọ LED. Giá trị giới hạn của IF,
đến mức nào đó – LED không sáng thêm khi IF tăng.
• Góc bố trí ngược sáng/thuận sáng
• View angle

5.1. parallel interface: 5.1.6. led interface
• 7406, ULN 2003...

Open Collector
Inverter Buffer: upto
30V – 50-500mA;
• Transistor npn: C945
– khi outport = 1 =>
LED s¸ng
• Transistor pnp: A564,
khi outport=0 => LED
s¸ng;
• Mét sè outport cho
phÐp drive trùc tiÕp
sink upto 80 mA
b. Ghép nối 7 segment LEDs: Mầu gì? Kích
thước? CA/CC
H×nh 5.7d. S¬ ®å 2 lo¹i LED 7 segment

Sơ đồ điều khiển 6 x CC 7seg LEDs – hình 5.7e:
• Có 6 cathodes và 48 anodes.
•Vì đ/k chế độ quét – trong 1 thời điểm chỉ sáng 1 LED
(tuân thủ theo ) => giảm thiểu phần cứng, tăng tính
mềm dẻo của hiển thị - dùng phần mềm điều khiển,
không dùng ICs BCD/7 seg!
– 6 anodes a nối chung; 6 anodes b nối chung... 6 anodes pnt
nối chung => chỉ có 8 anodes (a..g và pnt)
– Muốn sáng số mấy (0, 1, ...9) => gửi mã 7 thanh qua các
anodes;
– Muốn sáng 1 trong số 6 LED => điều khiển ON cathode
LED đó trong 1 thời gian t và là duy nhất.\
–Tính t : theo số LED, số frames/sec (50..60 fps)

driving 6 x 7 Segment Common Cathode LEDs:

disbuf: 6 byte chøa m∙ 7(8) seg cÇn hiÖn thÞ víi qui −íc
thanh nµo s¸ng, bit t−¬ng øng =1, N: counter
• Main Program: Burn LEDs (Cã thÓ do ng¾t Timer gäi)
gåm:
(1) Init: turn-off LEDs (out 2nd LS-574 = 0s); N=0;
(2) !(disbuf+N), (tvdn) => 1st LS-574; turn On LED[N]:
2nd LS-574, bitN = 1 (only); [delay(1..2 ms) nÕu
polling];
(3) Turnoff LED[N]: 2nd LS-574 = 0s; Inc N ; If N = 6 then
N=0;
(4) Goto(2)
c. drive 8 x 8 matrix char box:

disbuf: 8 byte chøa font
Main Program: Burn LEDs
1. Init: turnoff rows: disable
LS138(s) ; n=0;
2. (disbuf+n) => LS164; shift
afap; turn on row[n]; delay(1-
1.5);
3. turnoff row[n]: disable
LS138(s);
4. Inc (n) ; If n = 8 then n=0;
5. Goto(2)
Smooth left/ right shifting? TiÕng ViÖt? mþ æ
Color: 4/ 16M color
P&I duty cycle ! ®é rçng Ch5-Digi
LED thêi gianIn/Out 39
F. 5.x LED module 32x16x4 color, CED-05
F5.x. Electronics Graphics LED Board
192x128x4Color x 50Hz
5.1. Parallel interface: 5.1.7. LCD panel interface
• C«ng nghÖ LCD Liquid Crystal Display, hiÖn text/ graphics
• §é ph©n d¶i:
• 1 line x 16 character box, 5x7 (7x9) dot matrix/character box
• 2 line x 16 character box
• 4 line x 20 character box
• Graphics (64 x 128) hoÆc (128 x 256) dot graphics - font down
loadable, color (16/4096/64K/16,7M).
• ASCII, 128 characters/ set, 8 user fonts
• or APA: All Points Addressable - graphics
• Back light. C«ng suÊt tiªu thô nhá
• Dïng cho çc hÖ nhá, mang x¸ch, m¸y ®o... (Embedded
Systems)

H×nh 5.10a. Text LCD Pannel

H×nh 5.10b. CÊu tróc cña Graphics LCD Panel

• Signals:
– DB0..DB7 8 bit data bus (Moto typed) – 4 bit
interface available, 2 times in/out for a byte
– CS1/2 chip select .
– RD/WR và E: Motorola bus type
– RS: Register Select: Data or Address Register
• RS = 0 => Addr Reg
• RS = 1 => Data Reg; {giống như đọc/ghi CMOSRAM}
– BL : Back Light, adjustable: ánh sáng nền
– 7 bit ASCII

H×nh 5.10c. TÝn hiÖu vµ gi¶n ®å thêi gian ghi LCD panel

Read/Write LCD information
• 4 line x 20 column LCD => 80 char boxes
• Write Addr Reg first (RS=0), which position will
be displayed
• Write Data Reg after (RS=1)
• MSB = 1 Ù Address > 7Fh => control registers
• Ví dụ 1 chu kỳ đọc/ghi LCD panel – 8 bit bus:
cE=0
d Phát địa chỉ tạo Chip Select và chọn Reg
e Tạo tín hiệu R/W
f E = 1, delay for 1μs or more
gE=0
h Data out
j Disabling Addr, data, R/W
k E = 1.
5.1. parallel interface: 5.1.8. encoder

• Dïng ®Ó ghÐp nèi ®o l−êng dÞch chuyÓn c¬ häc: chiÒu

dµi, vËn tèc (c® th¼ng vµ quay), gia tèc, ®Þnh vÞ, robot
• C«ng nghÖ vËt liÖu tõ - nam ch©m vÜnh cöu hoÆc quang
- hång ngo¹i/ laser, hi resolution ADC...
• §é ph©n ly cao: d¶I réng: 256 ... upto 500 kc/t
(counts/turn), chÞu shock (upto 10s g)
• Tèc ®é upto 10k rpm, m« men c¶n downto 10-3 Nm)
• Output: çc xung lÖch 90O,
• TÝn hiÖu ra TTL hoÆc vi sai (truyÒn xa) hoÆc (byte, BCD,
GrayCode formatted),
• Manufacturers: Tamagawa Seiki, Epson, Hewlett-
Packard...


5.1. Parallel interface: 5.1.9. Step motor
H×nh 5.12a. Step Motor

5.1. parallel interface: 5.1.9. step motor
• Lµ motor (cã stator vµ rotor) ®−îc ®iÒu khiÓn quay theo

tõng b−íc (gãc, chiÒu)
• Interface: ®Ó biÕn çc tÝn hiÖu xung/ sè thµnh chuyÓn
®éng c¬ häc chÝnh x¸c, quay vµ tÞnh tiÕn.
• D¶i réng tham sè vÒ:
• Gãc (step/turn, −íc sè cña 360O)
• Dải rộng C«ng suÊt vµ M« men (torque),
• L¾p trôc vits, d©y ®ai => chuyÓn ®éng tÞnh tiÕn
• 2 cuén hoÆc 4 cuén d©y
• øng dông: Robot, Printer, Floppy Disc drive,
Scanner...
• TÝnh to¸n m¹ch ghÐp c«ng suÊt: theo chØ dÉn dßng
H×nh 5.12b. Symbolic Diagram for Step Motor,
Giant Magnetic Resistance Material

H×nh 5.12c. 1 s¬ ®å ®iÒu
P&I
khiÓn Step Motor 4 cuén d©y
Ch5-Digi In/Out 57
H×nh 5.12d. Çc s¬ ®å nèi d©y cho step motor

H×nh 5.12e. S¬ ®å ®iÒu khiÓn cÇu motor 2 cuén d©y

5.1. parallel interface: 5.1.9. hi power interface
• Lµ çc m¹ch ghÐp nèi m¸y tÝnh/ VXL víi çc thiÕt bÞ cã
®iÖn thÕ cao/ dßng ®iÖn lín nh− lß nung [sÊy] ®iÖn trë,
lß cao tÇn, motor (ac vµ dc) c«ng suÊt lín, đÌn, motor ..
• §iÒu khiÓn thiÕt bÞ ®iÖn xoay chiÒu (ac) cã çch ly:
• Relay, h×nh 5.13a:
• Dïng Relay ®Ó çch ly [vµ relay trung gian],
• §iÒu khiÓn c«ng suÊt ON-OFF (lß ®iÖn, motor)
• Triac/ Solid State Relay : h×nh 5.13b:
• §iÒu khiÓn c«ng suÊt v« cÊp
• DÔ g©y nhiÔu cho l−íi ®iÖn, ph¶i cã Line Filter
• §iÒu khiÓn thiÕt bÞ mét chiÒu (dc): H×nh 5.14.
• Thyristor (SCR - Silicon Controlled Rectifier)
H×nh 5.13. Hi Power ac Load Interface: ®iÒu chØnh ®ãng
c¾t (a) vµ v« cÊp (b)
h×nh 5.13a. Thyristor (SCR)
H×nh 5.13b. S¬ ®å chØnh l−u 1/2 chu kú, t¶i R-L
H×nh 5.13c. ChØnh l−u cÇu 1 phase vµ 3 phase (6 tia)

H×nh 5.14. §iÒu chØnh c«ng suÊt v« cÊp dc dïng VXL,
cã ph¶n håi (feedback).
H5.14b. §å thÞ thêi gian ®iÒu khiÓn 1 phase SCR Bridge
H×nh 5.15. Hi-Power Interface: Power MOSFET (a) vµ
IGBT (Insulated Gate Bipolar Transistor) - kiÓu switching

5.2. serial in/out: 5.2.1. kh¸i niÖm
kh¸i niÖm:
• Th«ng tin trong HÖ VXL/ M¸y tÝnh: byte, word (//)
• Khi truyÒn 'xa': serialize - byte => bit stream => lªn
®−êng truyÒn => bit stream => byte (deserialize):
gi¶m thiÕt bÞ thu ph¸t vµ ®−êng truyÒn
• => gi¶m (chi phÝ, kÝch th−íc) vs Tèc ®é chËm,
• M« h×nh: H×nh 5.20.
• Central System: CPU, mem, controllers, sys bus...
• Serial port:
• Symbols:
• UART/USART (Universal [Synchronous]
Asynchronous Receiver - Transmitter)
• ACIA: Async. Communication Interface
P&I
Adaptor, Motorola
Ch5-Digi In/Out 68
5.2. serial interface: 5.2.1. kh¸i niÖm
• Serial ports:
• NhiÖm vô/chøc n¨ng:
• Vµo ra nèi tiÕp: BiÕn ®æi byte => dßng bit [thªm start/
stop/ parity] göi lªn ®−êng truyÒn; dßng bit => byte ,
lo¹i çc bit kh«ng mang tin, kiÓm tra lçi thu.
• GhÐp nèi víi hÖ trung t©m: çc bus/ tÝn hiÖu addr,
data, control b»ng ph−¬ng ph¸p Polling, Interrupt
hoÆc DMA (Ýt).
• GhÐp nèi víi ®−êng truyÒn [via modem]: TxD, RxD
• GhÐp nèi modem: qua çc tÝn hiÖu b¾t tay -RTS,
-CTS, -DSR, -DTR, -CD, -RI (low active signals)
• VÝ dô: UART 8250, 16450, 16550A (Intel, NS...), ACIA
6850 Motorola, USART 8251 - Intel…
• MODEM: lµ thiÕt bÞ biÕn ®æi bit (0/1) thµnh tÝn hiÖu vËt lý,
phï hîp víi m«i tr−êng truyÒn xa (§iÒu chÕ - Modulation)
vµ ng−îc l¹i (Gi¶i ®iÒu chÕ - Demoulation), gåm:
• VÝ dô: Converter/ driver:
• Maxim 232/ ICL 232 (232 modem): TTL <=> EIA 232,
Single end, so víi Gnd:
• -3V .. -15 V <=> '1'
• +3V .. +15 V <=> '0'
• §¬n gi¶n, 100 feet @ 9600 bps, dÔ bÞ nhiÔu
• Th−êng dïng ®Ó ghÐp nèi çc thiÕt bÞ th«ng
minh, gÇn, m¸y thÝ nghiÖm, ®o l−êng, ®iÒu
khiÓn, Switching System, PLC...

• Max 485/ SN 75 116 TI ... (485/422 modem): Vi sai -

Differential, so ®iÖn ¸p gi÷a 2 tÝn hiÖu víi nhau. Mçi
kªnh truyÒn 2 sîi d©y a vµ b – 7576/75176/75116
• [V(a) - V(b)] > 100 mV..5V => '1' vµ
• [V(a) - V(b)] < -100 mV.. – 5V => '0'
• 5000' @ 1Mbps, thùc tÕ cã thÓ truyÒn xa vµi km,
gi¶m tèc ®é.
• Th−êng dïng trong çc xÝ nghiÖp c«ng nghiÖp
• Current Sourcer - nguån dßng ®iÖn : 0 vµ 20 mA
[hoÆc 20 vµ 60 mA, telex]
• ChÞu nhiÔu tèt
• TruyÒn xa, tïy thuéc ®iÖn trë R ®−êng d©y,
• Th−êng cã çch ly quang häc.
Mô hình mạng (bus) RS-485

• ASK: Amplitude Shift Keying, H×nh 5.21a.
• FSK: Frequency Shift Keying, H×nh 5.21b.
• DTMF: Dual Tone Multi Frequency, m∙ ®a tÇn

• H×nh 5.21c. PSK: Phase Shift Keying
• h×nh 5.21d.
QAM:Quaternary
Amplitude
Modulation

• Kh¸i niÖm truyÒn tin ®ång bé vµ kh«ng ®ång bé:

• Th«ng tin th−êng ®−îc ®ãng gãi thµnh çc gãi tin -
package. => packets
• §ång bé:
• Trong 1 packet: byte - byte, bit - bit, kh«ng cã
dÊu hiÖu ph©n çch.
• Tèc ®é truyÒn do sender: clock (cïng víi data)
hoÆc chØ xuÊt hiÖn vµo thêi ®iÓm ®Çu trong gãi
tin (sync. character).
• Tèc ®é cao, khã, tû lÖ çc bit kh«ng mang tin
nhá, truyÒn gÇn - LAN

• TruyÒn tin kh«ng ®ång bé: Asynchronous Comm.
• Mçi ký tù/byte ®Òu cã 1 xung/s−ên ®ång bé
(s−ên xuèng cña start).
• Clock cña 2 phÝa thu vµ ph¸t cã thÓ lÖch nhau
kho¶ng 3-6..%:
• VÝ dô: 10 bit format 8,n,1; T: time of frame; t:
time of bit, ΔT ®é lÖch cho phÐp Tph¸t vµ Tthu.
ΔT < 1/2 t (tvdn = 5%).
• Cã kho¶ng 'trèng' gi÷a 2 characters, tr¹ng th¸i 1.

• Tû lÖ çc bit kh«ng mang tin lín (start, stop,
parity…), lÕn ®Õn 33% (vÝ dô: format 1 start, 8
data, 1 PE, 2 stop)
• §¬n gi¶n, dÔ lËp tr×nh, dÔ ghÐp nèi.
• §Æc biÖt ®−îc chÊp nhËn réng r∙i: thiÕt bÞ ngo¹i
vi th«ng minh, ®o l−êng ®iÒu khiÓn, modem...

H×nh 5.22. Ba m« h×nh ®−êng truyÒn: Simplex (a),

Half duplex (b) vµ [full] duplex (c)
5.2. serial interface: 5.2.2. chuÈn EIA/TIA (RS)-232c/v24
• EIA/TIA 1969, Electronics (Telecommunication) Industry

Association, cho viÖc truyÒn tin kh«ng ®ång bé, [truyÒn
qua m¹ng ®iÖn tho¹i]. RS: Recommended Standard
• NhiÒu nh−îc ®iÓm so víi çc chuÈn kh¸c: tèc ®é chËm,
kho¶ng kh«ng xa, single end signals - dÔ nhiÔu, tû lÖ bÝt
kh«ng mang tin lín. . . nh−ng . . .
• RÊt th«ng dông, cã trong hÇu hÕt çc thiÕt bÞ sè (m¸y
tÝnh, m¸y ®iÒu khiÓn sè, m¸y ®o th«ng minh... vµ hä vi
®iÒu khiÓn, Global PS, Gyro Compass, PLC, Switching
System...
• Lµ cöa ngâ trao ®æi th«ng tin gi÷a çc hÖ VXL kh«ng
cïng chuÈn (sè bit, bé lÖnh, tèc ®é...)

5.2. serial interface: 5.2.2. chuÈn EIA/TIA-232c/v24
5.2.2.1. FORMAT of FRAME/ character:

• 1 start bit = 0, ®−¬ng nhiªn, th−êng kh«ng nh¾c l¹i
• 5/ 6 / 7/ 8 data bit, D0 – first. 5 vµ 6 not use today
• [Parity bit - PE/ PO] – Ýt dïng v× ®∙ cã kiÓm so¸t
chung bëi giao thøc
• 1/ 1.5/2 stop bit = 1s – th−êng dïng 1 bit
H×nh 5.23. CÊu tróc RS-232 Frame trªn ®−êng truyÒn

5.2. serial interface: 5.2.2. chuÈn rs-232c/v24
5.2.2.2. m« h×nh vμ çc tÝn hiÖu:

• Çc tÝn hiÖu truyÒn tin:
• TxD - Transmit Data: Serial data out + bit kh«ng mang tin
• RxD - Receive Data: Serial data in + bit kh«ng mang tin
• Signal Ground: 0 Volt. Reference for Single End Signals
• Modem handshaking/ status signals (Low active):
• -RTS : Request To Send, Out - DTE
• -CTS : Clear To Send, In - DTE
• -DTR : Data Terminal Ready, Out
• -DSR : Data Set Ready, In
• -RI : Ring Indication, In: b¸o chu«ng
• -CD : [Data] Carrier Detect, In: mÊt sãng mang - ®øt d©y, mÊt
®iÖn remote terminal....
5.2.2.3. Møc tÝn hiÖu:
• Çc tÝn hiÖu RS232 cã møc ¸p:
• -3V .. -15V => logic 1, so called 'Mark'
• +3V .. +15V => logic 0, so called 'Space'
• Çc vi m¹ch dïng ®Ó biÕn ®æi: 232 modems/ converters
• Motorola MC-1488 (Driver: TTL to 232) vµ MC-1489
(Receiver: 232 to TTL), 3 nguån cÊp : +5V, +12V, -12V, cæ
• Maxim 232 hoÆc Intersil - ICL 232: lµ 232 'modem' ; Single
Power Supply +5V. Bªn trong cã çc bé ®æi nguån: Doubler
vµ Inverter => +10V vµ -10V, H×nh 5.25

H×nh 5.25. MAXIM 232 IC
5.2.2.4. Tèc ®é truyÒn tin:
• §¬n vÞ tÝnh lµ bps (bit per second)
• Çc tèc ®é RS-232 : 50, 75, 110, 150, 300, 600, 1200, 2400,
4800 vµ 9600, BIOS support
• Thªm: 19.200, 38.400, 57.600 vµ 115.200
• Dïng Xtal (quartz, Th¹ch anh) 1.8432 MHz
• 16 chu kú clock => truyÒn (thu hoÆc ph¸t) ®−îc 1 bit
• Th−êng trong çc cæng truyÒn tin, tèc ®é ®−îc tÝnh theo:
1.8432 x 106
• Baud rate (bps) = ------------------------- ;
16 (m x 256 + n)
m-n: sè chia 16 bit, nCh5-Digi
P&I : low divisior, m: hi divisior 86
In/Out
5.2.2.5. Kho¶ng çch :
• Distance x baud rate product !
• Tïy thuéc m«i tr−êng, çp truyÒn, nh−ng:
• @ 9600 bps, L < 100‘ ~ 33m
• @ 19.200 bps, L<50' ~ 16,5 m
5.2.2.6. Connector - jack:

• D shell 9 hoÆc 25 pin [DB9 hoÆc DB25] connector
• Male - Female

5.2. serial interface: 5.2.3. PC's rs-232 ports
• Tªn gäi: so called:

• RS 232C/ V24/ EIA 232
• Communication port (Comm/ Com)
• Asynchronous [Async] port
• Serial port
• UART Intel 8250/ National Semiconductor 16450,
16550, 16550A
• Properties:
• Ports Comm1 Comm2 Comm3 Comm4
• BaseAddr 3F8h 2F8h 3E8h 2E8h
• IRQ 4 3 Option Option
• HRQ (Option)
5.2. serial interface: 5.2.3. PC rs-232 ports
• UART 8250, Universal Asynchronous Receiver-

Transmitter (KT VXL, t¸c gi¶ MTV)
• CS interface: 8bit data, IRQ (for Trans, Rec, Modem &
Errors), -CS, -RD, -WR vµ 3 Reg Select bits => 1 of 8
• Modem Interface: RTS-CTS, DTR-DSR, CD vµ RI
• Line [Modem] Control Registers : ®Ó ®Þnh format of
character vµ chÕ ®é ho¹t ®éng cho port vµ modem.
• Divisor Latches: ®Þnh tèc ®é truyÒn (thu vµ ph¸t)
• Line [Modem] Status Registers ®äc tr¹ng th¸i, Errors
®Ó ho¹t ®éng polling vµ Int.
• UART NS 16550A: compatible 100% 8250
• FIFO buffers for Rec vµ Trans 2x16 byte,
• Ho¹t ®éng: polling, interrupt [cã thªm] DMA
P&I Ch5-Digi In/Out
• Tham kh¶o UART 16550A @ site: www.national.com 89
Ho¹t ®éng cña comm port: setting & Transceive
Setting/ Initializing - khëi t¹o:
• Selecting Port: BaseAddr:= $2F8 {Comm2}
• Formats of character: (Line Control Register - BA+3)
VÝdô 9600, 8(7), N(PE/ PO), 1(2):
Port[BaseAddr+3]:= 3; {8, n, 1}
• Baud rate Setting: DLAB (bit7 of LCR) = 1, n¹p Low Div
vµ Hi Div. Khi setting baudrate, DLAB=1, otherwise=0
Port[BaseAddr+3] := Port[BaseAddr+3] or $80; {DLAB=1 only}
Port[BaseAddr+0] := 12; {xf8h, Low divisor, n}
Port[BaseAddr+1] := 0; { xf9h, Hi divisor , m}
Port[BaseAddr+3] := Port[BaseAddr+3] and $7F;{DLAB=0 ! }

• Line Control Register: XFBh – BaseAddr+3
– b1, b0 : 11 10 01 00
– 8 7 6 5 data bit, 5 và 6 bit không dùng.
– b2 : 0 => 1 stop bit; 1 => 2 stop bit
– b3: 0 – non parity, 1: parity
– b4: (chỉ có nghĩa khi b3=1) 0=> PO, 1=> PE
– b5: 0: normal, 1: Stuck parity (PE)
– b6: Space Out: 0, normal, 1: space out
– b7: DLAB: divisor latch access bit. Dùng để truy
nhập số chia, định tốc độ truyền. 0: normal, 1: BA –
(XF8) low divisor, BA+1 (XF9) – hi divisor
– Ví dụ: 7, PE, 2 Ù LCR = 0001 1110b Ù 1Eh

1.8432 x 106 cps
• Công thức tính: Baud rate (bps) = --------------------- ;
16 (m x 256 + n)
n : low divisior, m: hi divisior
600 bps m=0, n = 192
1200 bps m=0, n= 96;
2400 bps m=0, n= 48
4800 bps m=0, n= 24
9600 bps: m=0, n= 12
19200 bps m=0, n= 6
38400 bps m=0, n= 3
57600 bps m=0, n = 2
115200 bps m=0, n= 1 max rate
Nạp cả m và n khi DLAB = 1
Ho¹t ®éng trans-ceiving

• Line Status Register LSR, BA+5, çc bit/ cê TT:
• b0 = 1 => IBF data received, = 0 khi CPU ®äc Receice
Buffer, RxR - xF8h
• b1 = 1 => OE, Overrun Err, mÊt sè liÖu, bÞ sl sau ®Ì lªn
• b2 = 1 => PE, Parity Err, Vd ®Æt PE, thu vÒ sè bit 1 lÎ
• b3 = 1 => FE, Framing Err, sai stop bit, sai clock 2 phÝa
• b4 = 1 => BI, BreakInt, t(space)> t(full char)
• b5: THRE: Transmit Hold Reg Empty
• b6: Data Transmitted
• b7: Not Use
Vµ chó ý TimeOut !!!
• Thñ
P&I
tôc thu 1 packet ®−îc m« t¶ H×nh 5.26:
Ch5-Digi In/Out 93
Ho¹t ®éng: polling, sau setting, thu;ph¸t tin gièng nh− song song
• Transmitting: Line Status Register LSR, BA+5
• Sending 1 char: Thanh ghi gi÷ sl ph¸t TxR, Base
Addr+0
Port[BA+0]:= sent_char; ghi ra thanh ghi ph¸t
• Sending 1 packet n byte.
bit 5 (of LSR) = 1 => THRE (Trans Hold Reg Empty):
For i:= 1 to n do
Begin {0010 0000}
Repeat Until Port[BA+5] and $20 <> 0; {test bit 5}
Port[BA+0]:= xau_ky_tu[i]
End;
{kh«ng cÇn kiÓm tra TimeOut hoÆc lçi ?}
H×nh 5.26. L−u ®å Thu 1 packet qua Comm Port - Polling
Rec Proc Near ; Bien Cobao ket qua
mov bp, offset Tx_Buffer ; Init Array of Receiving
mov cx, n ; Init counter of Packet
Rec1: mov bx, TOC ; Init TOC, tre 1s
Rec2: call @delay ; delay khoang 50us
dec bx
jne Rec3
mov bl, 0FFh
mov Cobao, bl ; Loi Time Out
jmp Ketthuc
Rec3: mov dx, BaseAddr+5 ; Line Status Reg
in al, dx
test al, 00000001b ; IBF
je Rec2

mov dx, BaseAddr+0 ; Rx Register
in al, dx
mov [bp], al ; Cat ket qua
mov dx, BaseAddr+5 ; LSR
in al, dx
and al, 00011110b ; any error?
jne Rec31
inc bp ; next char
loop Rec1
mov bl, 0
mov Cobao, bl ; PERFECT RETURN
jmp Ketthuc
Rec31:test al, 00000010b ; Overrun Error?
je Rec4
mov bl, 1
mov Cobao, bl ; Loi 1
Rec4: test al, 00000100b
je Rec5
mov bl, 2
Rec5: test al, 00001000b
je Rec6
mov bl, 3
Rec6: mov bl, 4
Ketthuc: ret
Rec
P&I
Endp Ch5-Digi In/Out 98
INTERRUPT SETTING
• IRQ 4 - Comm1, IRQ3 - Comm2.
• Interrupt Enable Register - IER, BA+1, 4 lowest bit.
b(i) = 1 => Enable; b(i) = 0 => Disable.
• b0 : Thu xong 1 byte/ char
• b1 : TxR Empty
• b2 : 1 of 4 Errors of Receive Action
• b3 : MODEM IRQ
• Interrupt Identification Register: BA+2, §äc II Reg ®Ó biÕt
nguån ng¾t, cã 4 m¾c −u tiªn cè ®Þnh, dïng b1 vµ b2:
• xxxxx11x Highest Prio., 1 of 4 lçi thu
• xxxxx10x Thu xong 1 char/ byte
• xxxxx01x Ph¸t xong 1 char/ byte
• xxxxx00x ↑ hoÆc ↓ cña 1 of 4 modem HSK signals.
5.2. serial interface: 5.2.4. hayes modems
• Do C«ng ty Hayes Microcomputer Product Inc. giíi thiÖu
vµo ®Çu 80s, tèc ®é 300...2400bps, over telephone line
• Cã bé lÖnh (command set) vµ tr¶ lêi (response set), ®−îc
dïng nh− çc lÖnh chuÈn AT (standard modem).
• TÝn hiÖu:
• TxD, RxD, Gnd,
• CD, RI. [Thªm] DTR-DSR, [RTS-CTS]
• ChÕ ®é ho¹t ®éng: Command vµ Data (Online) Modes
• Command Mode: modem nhËn lÖnh tõ CS qua RS-232
port vµ thùc hiÖn lÖnh - kh«ng truyÒn tin.
• Khi thiÕt lËp xong kÕt nèi víi remote modem => online
mode (data mode) vµ chØ truyÒn tin, kh«ng nhËn lÖnh.

H×nh 5.27. Block diagram of Hayes Compatible Data-Fax Modem
• Khi mÊt sãng mang (remote modem has hungup) trë vÒ
command mode kh«ng disconnecting ®Ó ®îi
• guard time (default 1s)
• Escape command: +++
• LÖnh göi tõ m¸y tÝnh: software hoÆc gâ trùc tiÕp tõ bµn
phÝm qua RS-232 port
• Char göi tõ m¸y tÝnh 1 trong 2 formats:
• 7,PE,1 hoÆc
• 8,N,1
• Khi truyÒn 110 bps => 2 stop bit
• Khi nhËn command, modem göi vÒ result code. Option:
• Digit code - for controlling modem by software
• Word code - for controlling modem by keyboard

• result codes:
DIGIT Word Meaning
0 OK Cmmnd executed
1 CONNECT Connect @ 0..300bps
2 RING ring signal detected
3 NO CARRIER mÊt sãng mang
4 ERROR error in cmmnd line
5 CONNECT 1200
6 NO DIALTONE Kh«ng cã quay sè
7 BUSY B¸o bËn
8 NO ANSWER Kh«ng tr¶ lêi
10 CONNECT 2400
…
AT COMMAND SET: attention
• Çc lÖnh b¾t ®Çu b»ng AT or at (not At or aT) ®Ó
modem detects tèc ®é vµ format (ngo¹i trõ 2 lÖnh '+++'
vµ A/ - repeat last Cmmnd ) vµ kÕt thóc: Enter (0ah,0dh)
• Command line: cã thÓ cã h¬n 1 lÖnh, chØ cÇn 1st cã AT,
çch nhau dÊu ' ' vµ kh«ng qu¸ 40 char/cmmnd line.
• Çc lÖnh vµ Tham sè
• ATDT 048692463 Dial using touch Tone
• ATDP 048696125 Dial Pulse
• ATT/ ATP default tone/ pulse
•O end of C line, return O mode
•; end of C line, stay C mode
after executing
•@ wait for 5s hoÆc silent
• VÝ dô:
• ATDT 9,3456789 KÕt nèi tõ m¸y trong tæng ®µi
• ATXn Hayes Smartmodem compatible
• Other Commands:
• ATE0/ 1 Disable/ Enable Echo
• +++ Esc Char switch to command mode
• ATHn 0:On-Hook (hangup),1: Off-Hook
• ATLn 0/1/2/3 volume of speaker
• ATMn 0: speaker off, 1: on until DCD, 2: on
• ATNn 0: connect @ DTE rate, 1: auto rate negot.
• ATO return to O mode
• ATQn 0: result code En, 1: result code Dis
• ATVn 0: digit, 1: word
• ATZ hangup, reset to default settings
• A/ Repeat last command (re dial)
P&I • Çc modem ®Òu cã Ch5-Digi
bé lÖnhIn/Outriªng, Ref. User's Guide
105Man.
bµi tËp ch−¬ng 5 (1 of 2)
• ThiÕt kÕ m¹ch cæng INPUT cã tr¹ng th¸i vs H5.3
• M¹ch ghÐp nèi, tÝn hiÖu tr¹ng th¸i b¸o ng¾t – Disable/Enable
• X©y dùng m¹ch ghÐp nèi PC vµ PPI 8255 qua ISA bus
• Theo h×nh 5.7, x©y dùng m¹ch ghÐp nèi n CA-LEDs and/or
keypad + ch−¬ng tr×nh ®iÒu khiÓn, víi hÖ Vi xö lý bÊt kú.
• Theo h×nh 5.8 vµ 5.9, t¹o 16 x (8x16) char box board vµ DD ®Ó
hiÖn 1 th«ng b¸o.
• T/k Color Char board: 2 LED Green/Red => 4 color
• Bµi tËp dµi:
• Nghiªn cøu vµ lËp tr×nh vµo ra LPT víi SPP, EPP, ECP vµ
IEEE 1284 modes
• ThiÕt kÕ giao thøc vµ x©y dùng ch/tr truyÒn file gi÷a 2 m¸y
tÝnh qua LPT theo SPP vµ çc mode trªn
• T¹o Bill board tiÕng ViÖt 16 row-80 column

bµi tËp ch−¬ng 5 (2 of 2)
• X©y dùng m¹ch ghÐp nèi 2 encoders theo chiÒu X vµ Y

®Ó x¸c ®Þnh täa ®é cña mét ®éng tö (positioner) - tû lÖ
length/count ®∙ cho (cã thÓ dïng Timer 8254)
• GhÐp nèi Step motor [vµ Encoder] ®Ó ®iÒu khiÓn 1 thiÕt
bÞ nh− m¸y khoan ®Þnh vÞ b»ng ch−¬ng tr×nh, m¸y c¾t
v¶i, giÊy, m¸y vÏ, khoan to¹ ®é, automobile ...
• X©y dùng s¬ ®å chi tiÕt ®Ó ®iÒu khiÓn çc t¶i c«ng suÊt
lín: motor, gen-set field wild dc, ac (lß, ®Ìn…)
• ThuÇn thôc lËp tr×nh cho çc cæng RS-232/V24 trong
m¸y tÝnh vµ çc thiÕt bÞ kh¸c.
• TruyÒn tin gi÷a m¸y tÝnh vµ Embedded System (ES) qua
RS-232: chat & file
• TruyÒn tin gi÷a 2 m¸y qua Hayes modem: chat & file

Thiet Bi Ngoai Vi &amp Ghep Noi Ch05

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ch 5.

P&I Ch5-Digi In/Out 1

P&I Ch5-Digi In/Out 2

MOSFET (Metal Oxide Semiconductor Field Effect Transistor)

b. Simple In-Out Ports:

• Cæng ra ®¬n gi¶n cã chèt (latched output port, based on

P&I Ch5-Digi In/Out 6

P&I Ch5-Digi In/Out 7

Hình 5.2d. Latched Input Port

P&I Ch5-Digi In/Out 9

P&I Ch5-Digi In/Out 10

P&I Ch5-Digi In/Out 11

• Centronics Computer Inc. so called LPT; 2 LPT ports

Mode 0: Simple Parallel Port - SPP (Normal mode, OUTput only)

P&I Ch5-Digi In/Out 16

• Enable Int Req:

P&I Ch5-Digi In/Out 17

Mode 1: enhanced parallel port - epP

Mode 2: extended capabilities port - ecp

Mode 2: extended capabilities port - ecp

P&I Ch5-Digi In/Out 20

Mode 3: ieee 1284 ( epp + ECP ), 1994, upto 5 MB/s

• ĐÓ chuyÓn m¶ng sè liÖu gi÷a 2 hÖ VXL (Master-Slave)

personal computer memory card international

P&I Ch5-Digi In/Out 24

P&I Ch5-Digi In/Out 26

PC Card Standard - CardBus:

P&I Ch5-Digi In/Out 27

P&I Ch5-Digi In/Out 29

P&I Ch5-Digi In/Out 31

P&I Ch5-Digi In/Out 32

• 7406, ULN 2003...

H×nh 5.7d. S¬ ®å 2 lo¹i LED 7 segment

P&I Ch5-Digi In/Out 35

driving 6 x 7 Segment Common Cathode LEDs:

c. drive 8 x 8 matrix char box:

P&I Ch5-Digi In/Out 44

P&I Ch5-Digi In/Out 45

P&I Ch5-Digi In/Out 46

P&I Ch5-Digi In/Out 47

P&I Ch5-Digi In/Out 48

P&I Ch5-Digi In/Out 50

• Dïng ®Ó ghÐp nèi ®o l−êng dÞch chuyÓn c¬ häc: chiÒu

P&I Ch5-Digi In/Out 52

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H×nh 5.12a. Step Motor

• Lµ motor (cã stator vµ rotor) ®−îc ®iÒu khiÓn quay theo

P&I Ch5-Digi In/Out 56

P&I Ch5-Digi In/Out 58

P&I Ch5-Digi In/Out 59

P&I Ch5-Digi In/Out 64

P&I Ch5-Digi In/Out 67

P&I Ch5-Digi In/Out 71

• Max 485/ SN 75 116 TI ... (485/422 modem): Vi sai -

P&I Ch5-Digi In/Out 73

• ASK: Amplitude Shift Keying, H×nh 5.21a.

• FSK: Frequency Shift Keying, H×nh 5.21b.

• DTMF: Dual Tone Multi Frequency, m∙ ®a tÇn

P&I Ch5-Digi In/Out 75

• Kh¸i niÖm truyÒn tin ®ång bé vµ kh«ng ®ång bé:

P&I Ch5-Digi In/Out 76

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