entity ACII is

Port ( RST : in STD_LOGIC;

CK : in STD_LOGIC;
I : in STD_LOGIC_VECTOR (6 downto 0);
Q : out STD_LOGIC_VECTOR (7 downto 0));
end ACII;
architecture Behavioral of ACII is
begin
PROCESS (RST,CK,I)
VARIABLE QT: STD_LOGIC;
VARIABLE DEM: INTEGER RANGE 0 TO 10;
BEGIN
IF RST ='0' THEN Q(7 DOWNTO 0)<= X"00";DEM:=0;
ELSIF CK = '1' AND CK'EVENT THEN
FOR CHAY IN 0 TO 6
LOOP
IF I(CHAY) = '1' THEN DEM:= DEM+1;
END IF;
END LOOP;
IF (DEM MOD 2) = 0 THEN QT:= '1';
ELSIF (DEM MOD 2) /= 0 THEN QT:= '0';
END IF;
Q(7 DOWNTO 0)<= QT & I(6 DOWNTO 0);
DEM:=0;
END IF;
END PROCESS;
end Behavioral;