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    Rajesh Janakiraman
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    This document appears to be an exam for an embedded systems course taken on March 1, 2011 at SKR Engineering College. The exam contains two parts - Part A consists of 5 short answer questions worth 2 marks each for a total of 10 marks. Part B consists of 4 long answer questions worth 10 marks each for a total of 40 marks. Students were asked to answer questions about CPU utilization, priority inversion, blocking vs non-blocking systems, scheduling policies, release time and period in Part A. Part B questions covered interrupt handling, multirate systems, preemptive real-time systems, priority-based real-time systems, and generating a precise 50ms delay.

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    This document appears to be an exam for an embedded systems course taken on March 1, 2011 at SKR Engineering College. The exam contains two parts - Part A consists of 5 short answer questions worth 2 marks each for a total of 10 marks. Part B consists of 4 long answer questions worth 10 marks each for a total of 40 marks. Students were asked to answer questions about CPU utilization, priority inversion, blocking vs non-blocking systems, scheduling policies, release time and period in Part A. Part B questions covered interrupt handling, multirate systems, preemptive real-time systems, priority-based real-time systems, and generating a precise 50ms delay.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
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    7 views1 page

    Internal II ESQuestPaper

    Uploaded by

    Rajesh Janakiraman
    This document appears to be an exam for an embedded systems course taken on March 1, 2011 at SKR Engineering College. The exam contains two parts - Part A consists of 5 short answer questions worth 2 marks each for a total of 10 marks. Part B consists of 4 long answer questions worth 10 marks each for a total of 40 marks. Students were asked to answer questions about CPU utilization, priority inversion, blocking vs non-blocking systems, scheduling policies, release time and period in Part A. Part B questions covered interrupt handling, multirate systems, preemptive real-time systems, priority-based real-time systems, and generating a precise 50ms delay.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
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    of 1

    SKR ENGINEERING COLLEGE

    DEPARTMENT OF INFORMATION TECHNOLOGY


    INTERNAL II EXAMINATION

    SUBJECT CODE :IT2354 DATE : 1.3.11


    SUBJECT NAME :EMBEDDED SYSTEMS MARKS :50
    YEAR/SEM :III/VI

    PART A ( 2 X 5 = 10 )

    1. Define utilization of CPU?


    2. What is priority inversion?
    3. Differentiate between blocking and non blocking systems?
    4. Define scheduling policy and give its states?
    5. Define release time and period?

    PART B (4 X 10 = 40)

    Answer any Four of the following


    6. Explain in detail about interrupt handling.
    7. Explain about multireate systems and timing requirements on proceesses?
    8. Explain in detail about preemptive real time systems?
    9. Explain about priority based real time systems?
    10. Explain in detail about generating a precise 50ms delay in meeting real time
    constraints?

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