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What are the two types of noise of MOSFET?

The noise sources in a MOS transistor are: thermal noise in the


channel,1/f noise(flicker )

Who provides the DRC rules?


Foundry(Semiconductor Manufacturers)

How do you size NMOS and PMOS transistors to increase the


threshold voltage?
NMOS:Incresing the length vt will decrease.Incresing the
width vt will increase.
PMOS:Incresing the width vt will decrease.Incresing the
length vt will increase.
I believe the question is how size NMOS/PMOS to increase the
threshold voltage of inverter? The Vt of a transistor cannot
be altered by changing it's Width or length as per my
understanding. Correct me if I am wrong.

So for the inverter, increasing PMOS width increases Vt of


inverter and increasing NMOS width decreases Vt of inverter.

What?s the difference between Testing & Verification?


Testing: To make sure the product functionality sending before to
customer.100% test required.

Verification: This will be done by Quality team on Sampling basis.


Random basis.

Explain Clock Skew


In circuit designs, clock skew is a phenomenon in
synchronous circuits in which the clock signal arrives at
different components at different times. This can be caused
by many different things, such as wire-interconnect length,
temperature variations, variation in intermediate devices,
capacitive coupling, material imperfections, and
differences in input capacitance on the clock inputs of
devices using the clock.
Clock skew is the phenomenon wherein clock signal arrives
at different components at different times.
There are two types of clock skews. Positive clock skew
means that clock siganl reaches receiving register faster
than the register that sends the data to the receiver.
Negative skew is the opposite.
skew is the phenomena which clock dint take equal time to
reach the synchronous flip flop,it takes diff delay to
diff flipflops due to the material imperfection,wired
length,temparature etc,
clock skew is the time difference between the arrival of
active clock edge to different flipflops of the same chip

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