Problem 7.

40

a) The block diagram is shown in the figure below:

The steady state error is the difference between the input and output signals as time goes to
infinity. The scope measurement shows the expected difference which is 0.162

This is a zoomed in part from the scope screen showing the value of the input which is 3

This is a zoomed in part from the same scope screen taken that shows the value of the
output which is lower than the input by about 0.162
The whole screen is shown below:
b) R(s) = 0 , D(s)= -1/s

This is a zoom in for the input signal

This is a zoom in for the output signal

The block diagram looks like the following:

Note that we are setting the final value for the step input R(s) here to be 0 and -1 for D(s)
Part C)
Now, using the design in part (b) but changing the final value for the step input R(s) to be 3
and keeping the D(s) as it is, the error obtained is about 0.35 as expected in the figures
below:

The input signal occurs at 3

The output signal occurs at about 2.65 which is 0.35 from the input

The whole graph is shown in the next page