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1. General description
The 74HC14; 74HCT14 is a high-speed Si-gate CMOS device and is pin compatible with
Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74HC14; 74HCT14 provides six inverting buffers with Schmitt-trigger action. They are
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
NXP Semiconductors 74HC14; 74HCT14
Hex inverting Schmitt trigger
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC14N −40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HCT14N
74HC14D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width SOT108-1
74HCT14D 3.9 mm
74HC14DB −40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body SOT337-1
74HCT14DB width 5.3 mm
74HC14PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1
74HCT14PW body width 4.4 mm
74HC14BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1
74HCT14BQ thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
5. Functional diagram
1 2
3 4
1A 1Y
1 2
5 6
2A 2Y
3 4
3A 3Y
5 6 9 8
4A 4Y
9 8
11 10
5A 5Y
11 10
6A 6Y 13
13 12 12 A Y
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
(one Schmitt-trigger)
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6. Pinning information
6.1 Pinning
14 VCC
terminal 1
1A
index area
1
1Y 2 13 6A
1A 1 14 VCC 2A 3 12 6Y
1Y 2 13 6A 2Y 4 14 11 5A
2A 3 12 6Y
3A 5 GND(1) 10 5Y
2Y 4 14 11 5A
3Y 6 9 4A
3A 5 10 5Y
8
3Y 6 9 4A
GND
4Y
GND 7 8 4Y 001aac499
7. Functional description
Table 3. Function table[1]
Input Output
nA nY
L H
H L
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8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage −0.5 +7 V
IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V [1] - ±20 mA
IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] - ±20 mA
IO output current −0.5 V < VO < VCC + 0.5 V - ±25 mA
ICC supply current - 50 mA
IGND ground current −50 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation [2]
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 °C.
For SO14 package: Ptot derates linearly with 8 mW/K above 70 °C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 °C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 °C.
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74HC_HCT14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
VCC = 4.5 V - 20 34 43 51 ns
VCC = 5.0 V; CL = 15 pF - 17 - - - ns
tt transition time VCC = 4.5 V; see Figure 6 [2] - 7 15 19 22 ns
CPD power dissipation per package; [3] - 8 - - - pF
capacitance VI = GND to VCC − 1.5 V
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12. Waveforms
VI
nA input VM VM
GND
t PHL t PLH
VOH
90 %
nY output VM VM
10 %
VOL
t THL t TLH
mna722
tW
VI
90 %
negative
VM VM
pulse
10 %
GND
tf tr
tr tf
VI
90 %
positive
VM VM
pulse
10 %
GND tW
VCC
VI VO
G DUT
RT CL
001aah768
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VO
VT+
VI VH
VT−
VI VO
VH
VT− VT+ mna207 mna208
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mna846 mna847
50 1.0
ICC ICC
(μA) (mA)
40 0.8
30 0.6
20 0.4
10 0.2
0 0
0 0.4 0.8 1.2 1.6 2.0 0 1 2 3 4 5
VI (V) VI (V)
mna848
1.0
ICC
(mA)
0.8
0.6
0.4
0.2
0
0 1.2 2.4 3.6 4.8 6.0
VI (V)
c. VCC = 6.0 V
Fig 10. Typical 74HC transfer characteristics
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mna849 mna850
1.5 1.8
ICC ICC
(mA) (mA)
1.5
1.2
1.2
0.9
0.9
0.6
0.6
0.3
0.3
0 0
0 1 2 3 4 5 0 1 2 3 4 5 6
VI (V) VI (V)
Average ΔICC(AV) differs with positive or negative input transitions, as shown in Figure 12
and Figure 13.
An example of a relaxation circuit using the 74HC14; 74HCT14 is shown in Figure 14.
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mna852
400
ICC(AV)
(μA)
300
100
negative - going
edge
0
0 2 4 VCC (V) 6
mna853
400
ICC(AV)
(μA)
200
negative - going
100 edge
0
0 2 4 VCC (V) 6
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mna035
1 1
For 74HC14: f = --- ≈ ---------------------
T 0.8 × RC
1 1
For 74HCT14: f = --- ≈ ------------------------
T 0.67 × RC
Fig 14. Relaxation oscillator
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D ME
seating plane
A2 A
L A1
c
Z e w M
b1
(e 1)
b
14 8 MH
pin 1 index
E
1 7
0 5 10 mm
scale
UNIT
A A1 A2
b b1 c D (1) E (1) e e1 L ME MH w Z (1)
max. min. max. max.
1.73 0.53 0.36 19.50 6.48 3.60 8.25 10.0
mm 4.2 0.51 3.2 2.54 7.62 0.254 2.2
1.13 0.38 0.23 18.55 6.20 3.05 7.80 8.3
0.068 0.021 0.014 0.77 0.26 0.14 0.32 0.39
inches 0.17 0.02 0.13 0.1 0.3 0.01 0.087
0.044 0.015 0.009 0.73 0.24 0.12 0.31 0.33
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
99-12-27
SOT27-1 050G04 MO-001 SC-501-14
03-02-13
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
D E A
X
y HE v M A
14 8
Q
A2
(A 3) A
A1
pin 1 index
θ
Lp
1 7 L
e w M detail X
bp
0 2.5 5 mm
scale
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
99-12-27
SOT108-1 076E06 MS-012
03-02-19
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
D E A
X
c
y HE v M A
14 8
Q
A2 A
A1 (A 3)
pin 1 index
θ
Lp
L
1 7 detail X
w M
e bp
0 2.5 5 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
99-12-27
SOT337-1 MO-150
03-02-19
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
D E A
X
y HE v M A
14 8
Q
A2 (A 3)
A
A1
pin 1 index
θ
Lp
L
1 7
detail X
w M
e bp
0 2.5 5 mm
scale
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
99-12-27
SOT402-1 MO-153
03-02-18
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm SOT762-1
D B A
A
A1
E c
terminal 1 detail X
index area
terminal 1 e1 C
index area
e b v M C A B y1 C y
w M C
2 6
1 7
Eh e
14 8
13 9
Dh
X
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
A(1)
UNIT
max.
A1 b c D (1) Dh E (1) Eh e e1 L v w y y1
17. Abbreviations
Table 11. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
LSTTL Low-power Schottky Transistor-Transistor Logic
MM Machine Model
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[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
Draft — The document is a draft version only. The content is still under
severe property or environmental damage. NXP Semiconductors accepts no
internal review and subject to formal approval, which may result in
liability for inclusion and/or use of NXP Semiconductors products in such
modifications or additions. NXP Semiconductors does not give any
equipment or applications and therefore such inclusion and/or use is at the
representations or warranties as to the accuracy or completeness of
customer’s own risk.
information included herein and shall have no liability for the consequences of
use of such information. Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
Short data sheet — A short data sheet is an extract from a full data sheet
representation or warranty that such applications will be suitable for the
with the same product type number(s) and title. A short data sheet is intended
specified use without further testing or modification.
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data Customers are responsible for the design and operation of their applications
sheet, which is available on request via the local NXP Semiconductors sales and products using NXP Semiconductors products, and NXP Semiconductors
office. In case of any inconsistency or conflict with the short data sheet, the accepts no liability for any assistance with applications or customer product
full data sheet shall prevail. design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
Product specification — The information and data provided in a Product products planned, as well as for the planned application and use of
data sheet shall define the specification of the product as agreed between customer’s third party customer(s). Customers should provide appropriate
NXP Semiconductors and its customer, unless NXP Semiconductors and design and operating safeguards to minimize the risks associated with their
customer have explicitly agreed otherwise in writing. In no event however, applications and products.
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the NXP Semiconductors does not accept any liability related to any default,
Product data sheet. damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
19.3 Disclaimers testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
Limited warranty and liability — Information in this document is believed to
customer(s). NXP does not accept any liability in this respect.
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or Limiting values — Stress above one or more limiting values (as defined in
completeness of such information and shall have no liability for the the Absolute Maximum Ratings System of IEC 60134) will cause permanent
consequences of use of such information. damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
In no event shall NXP Semiconductors be liable for any indirect, incidental,
the Recommended operating conditions section (if present) or the
punitive, special or consequential damages (including - without limitation - lost
Characteristics sections of this document is not warranted. Constant or
profits, lost savings, business interruption, costs related to the removal or
repeated exposure to limiting values will permanently and irreversibly affect
replacement of any products or rework charges) whether or not such
the quality and reliability of the device.
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Terms and conditions of commercial sale — NXP Semiconductors
Notwithstanding any damages that customer might incur for any reason products are sold subject to the general terms and conditions of commercial
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards sale, as published at http://www.nxp.com/profile/terms, unless otherwise
customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual
with the Terms and conditions of commercial sale of NXP Semiconductors. agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
Right to make changes — NXP Semiconductors reserves the right to make applying the customer’s general terms and conditions with regard to the
changes to information published in this document, including without purchase of NXP Semiconductors products by customer.
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or
to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
Suitability for use in automotive applications — This NXP other industrial or intellectual property rights.
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
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21. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
9 Recommended operating conditions. . . . . . . . 4
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
13 Transfer characteristics . . . . . . . . . . . . . . . . . . 8
14 Transfer characteristics waveforms. . . . . . . . . 8
15 Application information. . . . . . . . . . . . . . . . . . 10
16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18
18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
19.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
19.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
19.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
20 Contact information. . . . . . . . . . . . . . . . . . . . . 20
21 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.