STUDY

OF
9 BIT EVEN ODD PARITY
CHECKER
74280

8-SHRIKANT KUNJ, M.N. PATANKAR MARG, KURLA(W)

MUMBAI, 400070.
PH- 09869112159
Email-matrixel@gmail.com

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 STUDY OF 9 BIT PARITY CHECKER 74280

INTRODUCTION :
The 74HC/HCT280 are 9-bit parity generators or checkers commonly used to detect errors in
high-speed data transmission or data retrieval systems. Both even and odd parity outputs are
available for generating or checking even or odd parity up to 9 bits.
The even parity output (åE) is HIGH when an even number of data inputs (I0 to I8) are HIGH.
The odd parity output (å0) is HIGH when an odd number of data inputs are HIGH.

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 PRACTICAL 1 : 74280 PARITY CHECKER
AIM : To study 74280 PARITY CHECKER .

In this lab, 74280 PARITY CHECKER circuit will be investigated.

Material and Equipment : Matrix trainer kit,

Procedure

Procedure
1] Connect Power cord to AC mains supply.
2] Switch ON ac mains supply.
3] Put input switches as asked in table note o/p.
S1 S2 S3 S4 S5 S6 S7 S8 S9 EVEN ODD
0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 1 0
0 0 0 0 0 0 0 1 1
0 0 0 0 0 0 1 0 0
0 0 0 0 0 0 1 1 1
1 1 0 0 0 1 1 1 1
0 0 1 1 0 0 0 1 1
1 1 1 1 1 0 0 0 0
1 1 1 1 1 1 1 1 1
0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1