EE 2552 Circuits Laboratory: The University of Colorado at Denver Department of Electrical Engineering

EE 2552
Circuits Laboratory
The University of Colorado at Denver

Department of Electrical Engineering
Revised: August 2006
By: Duane Swigert
August 1, 2006 1 Duane Swigert

Table of Contents
Introduction.......................................................................................................................................... 3
Lab Reports .......................................................................................................................................... 4
Guidelines for a Good Report ................................................................................................. 6
Components and Tools ................................................................................................................. 8
Procedures and Etiquette ........................................................................................................... 8
PSpice Notes ......................................................................................................................................... 9
Steps for Using PSpice.............................................................................................................................. 9
Placing Parts ........................................................................................................................................... 12
Wires .................................................................................................................................................... 13
Sources ................................................................................................................................................. 13
Simulation Steps ..................................................................................................................................... 14
Other Sources and How to Use.............................................................................................................. 17
Other Components of Possible interest................................................................................................. 20
Experiment 1 ................................................................................................................................. 21
Experiment 2 ................................................................................................................................. 23
Experiment 3 ................................................................................................................................. 25
Experiment 4 ................................................................................................................................. 28
Experiment 5 ................................................................................................................................. 31
Experiment 6 ................................................................................................................................. 32
Experiment 7 ................................................................................................................................. 37
Experiment 8 ................................................................................................................................. 38

Introduction
In order to make your laboratory experience more enjoyable, here are a few suggestions
regarding the lab work. The most important thing you can do to make the lab period run
more smoothly for yourself and your lab partners is to do the entire preliminary before
coming to class. Too many times a person thinks that they can do the preliminary work
during the lab period and still build and test the circuit. This simply will not work,
because the labs are written to allow enough time for circuit construction and testing
only. Additionally, when you are working as an engineer, simulation is the first, and in
many cases, the only work that you will do in the design of a circuit.
Bring a copy of your schematic and simulation to the lab with the chip designation and
the pin numbers clearly marked to aid in the wiring process. A contractor cannot build a
house without a blueprint. Neither can you build a circuit without a wiring diagram.
Know how many of each device you will need to carry out the design and set them aside
in the beginning so that you do not have to hunt for them as you need them.
Place the devices on your breadboard in such a manner that you will have room for all of
them and have easy access to them for wiring and test purposes. If you find defective
devices, throw them away.
Connect and test each section of your circuit before going on to the next. As an example,
if you are building a decoder for a seven-segment display, wire and test the circuit for
segment “a” before going on to segment “b”. It is much easier to find a wiring error in a
small circuit than in a huge one. Doing this will keep your frustration level to a minimum
and will help to make your lab sessions a lot more fun.
Keep you wiring as neat as possible on the breadboard. Use short pieces of wire and
keep them close to the board. It is easier to trace problems that way, and as you build up
a larger circuit, it will help keep you from snagging a wire and causing an additional
problem. Color-coding can make troubleshooting far easier as well. Even just color-
coding the Vcc and Ground wires can help a lot.

Lab Reports
Labs play a vital role in the engineering curriculum. The hands-on experience of the
laboratory goes far beyond simple verification of textbook theory. For most individuals,
the laboratory is where the theory becomes less mysterious and things learned in the
classroom really start to make sense.
There is another important aspect of the laboratory experience, often unappreciated but
equally important. That is the lab write-up. An often-asked question is, “If I understand
the theory and can successfully build and test the circuits, why do I need to spend the
time to write it up?” Consider this fact of life -- Virtually all of the work you do
throughout your career will be judged by what you write. An engineer must be able to
express ideas on paper clearly enough for others to use and understand. A research
scientist who cannot write technical articles that can be understood by peers will never be
given credit for what might otherwise be brilliant work. Decisions of extreme importance
to your own career such as job offers, promotions and pay raises will almost certainly not
be made in your presence. Your written work is likely to be the only personal
representation you will have.
It should be obvious by this point that the ability to communicate technical material is an
essential skill in engineering. The purpose of the lab write-ups is to develop writing
skills that will benefit you throughout your career. You should also find that you are
really writing these labs for yourself as they contain material that you may need to refer
back to at some point in the future. If you cannot follow your own work six months later,
you could experience a rude awakening.
The following guidelines will be used in all of the EE laboratories. The format is by no
means universal, but it does contain many common features found in all technical
literature. Remember, a reader should be able to know what you are trying to
accomplish, how you tried to accomplish it, whether you accomplished it or not, and
what went right or wrong.
Title Page: This may be done in such a manner as to help separate labs in a file cabinet
later, but it should contain the following information:
• Experiment number and title
• Your name, partner’s name(s)
• Course and section number
• Date the work was completed
Objective: Every experiment has a clear purpose. It should be summarized here. If the
lab requires circuit design, the specifications should be listed. If the lab involves
measurement and /or verification of theory, the types of measurements to be made should

be summarized. The objective section should be short and complete, usually only one
paragraph, and should not contain any diagrams or explanations.
Preliminary: All labs require some form of preparation. In some cases, there are
problems and questions given in the lab notebook. In others, circuits may need to be
designed or component values calculated. In any case, all background work that can be
done prior to the lab should be completed. Computer simulations can be a great benefit,
allowing an experiment to be modeled before any unnecessary effort is spent in creating
the physical system. All of this material, usually condensed to a readable form, should be
included in this section.
Analysis: This is generally the part of the lab requiring the most thought. Observations
should be compared with expectations or preliminary calculations and any deviations
explained. It is not often that things will come out exactly as you think they will.
However, there is an explanation for everything. This is where you should convey your
understanding of what actually happened. Graph data where appropriate, calculate errors
and answer any questions in the manual about the lab observations. Be thorough.
Conclusions: It is usually appropriate to include a few comments that tie your efforts
together. These may pertain to the relative success or difficulty of the lab. They may
point out a part of the lab that was particularly enlightening to you. Or, looking back on
the lab, there may be a few things that you would do differently if you were doing it
again from the start. It should also include what you learned from the lab, not so much
from a theory standpoint as from the practical side: what worked, what went wrong, and
what mistakes you make.
Questions: Answer any questions which might be asked. Start by repeating or

paraphrasing the question, then give the answer.
Data: Measurements and observations made in the lab are presented here. Be sure that
any data you record is clearly referenced to the circuit from which it came. Use tables
and figures properly (see notes on tables and figures in “General Guidelines to a
Successful Report”). Avoid reference to step numbers or page numbers in the lab
manual. Be sure your data is complete enough for later graphing and analysis. For logic
Lab, there will not be much data collection, but this will become very important in other
labs. NOTE: The sections listed above are bunched together. In the report, provide only
a bullet list of the data that follows. Include page numbers. The data itself is attached
after the last page of the rest of the report.

Guidelines for a Good Report
The following are a few things to think about when writing a good laboratory report:
1) Know your reader. In order to make efficient use of your time when writing a
report, you must consider who will be reading your work. In general, this will be
your best guide in determining length, content and detail. When writing an
engineering report that is directed toward other engineers, you may assume that your
reader has knowledge of engineering principles and terminology. However, do not
assume that your reader is familiar with the project. In the case of lab instructors, you
should assume that they would be looking for a thorough understanding of all aspects
of the lab. All questions should be answered and the operation of all circuits
explained.
2) Visual impact is important. The appearance of your report is extremely important.

If a report is difficult to read, it may receive a lower grade. However, the visual
impact of your report means a lot more than that. Think for a moment about how you
first look at a magazine article or a textbook. Your eyes are naturally drawn to
graphs, drawings, and bold headings. Long pages of closely spaced text usually
attract little attention. You should use these natural tendencies to your advantage.
Your most important points should be conveyed through diagrams and graphs,
supported by the text. If diagrams are not an appropriate method, use bold headings,
underline or do something else which makes the most important points or results
really stand out.
3) Lure your reader. You should consider one of your main objectives to be to lure
your reader further into your work. Your audience will consider very little of what
you write as required reading. If no one is interested enough in your writing to read
it, you will never get proper credit for the work that you do.
4) Properly label all figures and tables. There are few things worse than seeing neat
diagrams or tables in a report with no clue as to what they mean or where they came
from. All figures and tables should be numbered and have a caption or title that
clearly indicates what they are. Figure and table numbers should start with the
number “1” and increase sequentially through the report. More complicated figure
numbering schemes, such as those found in a textbook, have no place in a short
report. Additionally, ALL circuit diagrams and graphs are by definition figures. Be
sure that they are labeled appropriately. If the report does not reference a figure, that
figure has no place in your report!
5) Generate high quality output. These days, it is safe to say that all real world
documents are being done on computers. All lab reports you write during your time
here at UCD are to be computer generated. Some graphs may be done by hand, but
they need to be drawn carefully, not sketched. If you use a computer to do your
graphs, be sure you use the most appropriate kind. Curve smoothing can emphasize

the shape, but obscure details you may wish to reference. Scatter plots, which use
curve fitting, are often good ways to see trends, but there are numerous different
analytical ways to define the curve, which can also change the meaning of the data.
Just because it looks good does not mean it is right!
6) Spelling counts. Over the years, there have been plenty of jokes about engineers and
spelling. Poor grammar and bad spelling are unprofessional and detract from your
work. With automated spelling checkers in all of the word processing programs,
there is no excuse for spelling errors. They make us lazy about checking for syntax
errors, however, so be sure you re-read the report to find them.
7) Condense your work. Do not omit any useful detail, but try to communicate your
thoughts with the least amount of verbiage possible. (As an example, in the prior
sentence, I should have said: “Be complete and concise.”) Use your figure numbers
to refer to the diagrams in your report. There is no value in stretching out a report
thinking that if it is longer, it will look like more work was done. The most
impressive reports always manage to put a lot of information in a relatively short
space, while maintaining an easy to read appearance.

Components and Tools
The Electrical Engineering department will provide everything required for the labs. The
tools, including the breadboards, will be checked out to each lab group at the beginning
of the semester. The team will inventory the tools, fill out the required form, and return it
to the lab instructor. At the end of the semester, a second inventory of the tool kit will be
taken. All missing tools are the responsibility of the lab team and must be replaced in
order for grades to be issued. The department will also supply the components. Please
leave them with the toolbox after you are finished with them.
Procedures and Etiquette

The lab experience will be greatly enhanced if the following rules are adhered to:
• Faulty or damaged equipment must be brought to the attention of the instructor.
• Always return components and equipment to their proper place.
• Please handle equipment with clean hands and refrain from writing on any
equipment.
• Do not remove probes from oscilloscopes.
• Clean up your work area when you have completed your experiment. Turn off
the equipment and the main power to the rack.
• Do not remove equipment or components form the EE labs without prior

permission from a member of the faculty.
• Always close the door, check that all lab test racks and digital multi-meters are
powered down, and turn off the lights if you are the last to leave the lab.

PSpice Notes
Part of the design and implementation stages for electronic circuits include the following:
Requirements
Description
Synthesize Circuit
(Schematic Capture)
Determine
Modifications
Analyze Circuit And Make
(Run Simulation) Changes
NO
Specifications
Satisfied
YES
Done
The above is then repeated where the circuit is realized using the actual components and
then tested using power supplies, voltage and current meters, oscilloscopes, and whatever
other test and lab equipment might be required to exercise and analyze the circuit.
Steps for Using PSpice
1. Start the OrCAD program and create a New Project.
2. Give the project a name such as Lab1 and make sure the Analog or Mixed A/D
option is selected.

3. Then, in the next option window, select the ‘Create a blank project’.
4. The next window that should appear is the window in which you will enter the
schematic (See the following figure). The toolbar on the right of the screen may
be used to select and place parts, connects components with wires and busses, add
various sources of voltage and currents and basically provides all the elements
needed to capture the schematic. Parts may also be selected using the Place menu
along the top of the window.

Schematic Capture Steps
5. Now is a good time to try placing a part, such as a resistor or capacitor. Select,
‘Place part’ and see what is displayed. If the part can not be found, you might
need to Add Library … to get the desired part you need.

Placing Parts
6. To select a part, you can either scroll through the parts listed until you find the
part, or, type in the box where the cursor is located to quickly get the part if you
know what it is. For example, to get a resistor, type in R (upper or lower case).
As you can see, the default value is 1K, but this can be changed after it is placed
in the schematic. Click on the OK button to use that part.
7. You may now place as many resistors as you want by clicking the mouse button.
When you are done placing resistors, type in the Esc key or with the other mouse
button, select End Mode.
8. To change the orientation of a part, select the part and use either the right button
and Rotate menu item, or type in control r.
9. Double click on either the value or reference designation to change from the
default. Acceptable suffixes to be used are as follows:
Suffix Mnemonic Exponential Form
F, f Femto 1E - 15
P, p Pico 1E - 12
N, n Nano 1E - 9
U, u Micro 1E – 6
M, m Milli 1E – 3
K, k Kilo 1E 3
MEG, meg Mega 1E 6
G, g Giga 1E 9
T, t Tera 1E 12

Wires
10. To connect components together, use the third button down on the tool bar or in
the Place menu, selected Wire. Use the cross hairs to start the wire and when
finishing a connection, wait till you see the bubble appear to know that you are
actually connected to the part. This may take some experimenting to get the feel
for how this works. Again, when done with the wires, end by either the Esc key
or right mouse button and End Wire menu selection.
Sources
11. To place a DC source, use the second button on the toolbar or Place Part on top
menu, and then use the SOURCE library (select this one in the window to just see
the various sources). VDC will give a default battery symbol. Change the default
settings to your desired values.
12. The last item that is ALWAYS NEEDED FOR SIMULATION is the ground
reference. To find this part, go to either the GND button on the tool bar or
through the Place Ground on the top menu. Select the symbol 0/SOURCE, and
place in the schematic for the zero reference required for simulation.
13. At this point, the circuit will be ready to try a simulation.

Simulation Steps
1. For first time simulation, a New Simulation Profile needs to be set up for use.
This is done by selecting the button on the far left upper tool bar or through the
menu under the PSpice. Give a name for this simulation.
Then continue with next set up box. For now, we will use the settings shown in the box
below.

To RUN the simulation, click on the sideways triangle button on the upper left toolbar or
under the PSpice menu, select RUN. This will display a window as below. Note, this
display shows nothing of interest!!
2. To have various voltage or current values displayed, you need to have probes at
points in your circuit. These are found in the upper toolbar and can be placed in
the circuit. It might also be interesting to select the V or I buttons to see DC
voltages and currents.
3. You can see in the simulation plot the DC values of 10V and the 8.395V, which
also show up on the schematic page.

Other Sources and How to Use
VPULSE
Select the VPULSE to create pulses or square waves. The rise and fall times can not
have a zero value, but you may choose a value which is very small. To fill in the
parameters, either click the parameter name or double click the symbol to get the
property editor. See the example below which shows an R and C circuit with a square
wave input. Note that the time scale needed to be changed for this simulation.

The VPULSE could be used to create triangular waves as well with the appropriate
parameter values.
To create a sinusoidal wave, use the VSIN

VAC can be used with the AC Sweep setting in the simulation options to create a
magnitude vs frequency plot. To get dB, use the add TRACE in the simulation output
and put in the 2 voltages, one divided by the other using the DB() function. Likewise, P()
can be used to plot phase angles.

Other Components of Possible interest
• Diodes – D1N4002 for regular diode, or D1N750 for zener diode.
• Transistors: npn – Q2N2222 or Q2N3904, pnp – Q2N2907A or Q2N2906
• JFETs – n-channel depletion J2N3819 or J2N4393
• MOSFETs – n-channel enhancement – IRF150, p-channel enhancement – IRF9140.
• Op-Amp – LM324.

Experiment 1
Thevenin and Norton Circuits
Objectives: After completing this lab, you will be able to determine, simulate, and
verify a Thevenin equivalent circuit. Next, you will determine and simulate a Norton
equivalent circuit. Finally, you will also determine and verify what resistive load will
allow for maximum power transfer from the circuit to your load.
Preliminary:
1. Analyze the circuit and determine the Thevenin and Norton equivalent circuits.
In your laboratory write-up, you will need to show and explain how you
determined the Thevenin and Norton equivalent circuits. Using your equivalent
circuits, determine the voltage and power for loads of 0 ohms to 5000 ohms, using
500 ohm increments.
2. Simulate the circuit below using resistive loads of 0 ohms to 5000 ohms using 500
ohm increments. The results of your simulation will needed to be presented in the
write-up showing how you verified your two equivalent Thevenin and Norton
circuits.
3. Determine the value of the load (resistive only) required for maximum power
transfer and then find the closest resistance value to match.
R C A
1.5k
VOFF = 0 V1 2200p
L
VAMPL = 1 RL
2.2m
FREQ = 100K 1k
B
0
Laboratory Procedure:
1. Assemble the above circuit in the lab and using the signal generator and the dual
trace oscilloscope, verify your results. Remember, it is possible to determine the
phase shift using the two traces on the oscilloscope. To find the phase shift, place
one probe on the source and the second probe on the load. This should show a
time difference between the signals which is proportional to the phase difference.
Choose at least three different resistor values, based on your simulation results, to

see how the actual circuit performs. Record all your results and explain any
differences that are observed.
2. Using values for a load resistance of 10Ω, 500 Ω, 1K Ω, …. Up to 5000 Ω, create

a plot showing power transfer. Show on the plot what value of resistance allowed
for the maximum power transfer.
3. Finally, what would the Thevenin and Norton equivalent circuits be if the
frequency of the source were 200KHz and 50KHz. You are not required to build
and test these circuits.

Experiment 2
Resistor and Capacitor Circuits
Objectives:
The objective of this lab is to analyze and interpret the operation of resistor-capacitor
circuits when driven by square, triangular and sinusoidal sources. After completing the
steps for design, simulation, and analysis of an actual circuit, a method for measuring an
unknown capacitance should be developed.
Preliminary:
Consider the following circuit. Using this topology, and not necessarily the values
shown, you will explore R-C circuits. There are three phases to this lab: the Design
Phase, the Simulation Phase, and the Implementation Phase. The last phase is where you
will actually build a circuit and make measurements to compare with the results you
obtained in the design and simulation phases.
R1
50k
V1 = 0 V1
V2 = 1
TD = 0
TR = 1n C1
TF = 1n
PW = 500u 2200p
PER = 1m
Design Phase
In the design phase, you will need to perform an analysis on a R-C circuit, which has the
capacitor charging from a DC source then, having the capacitor discharging. This is to be
done at first by using only the variables of R and C without specific values. Then, using
the values in the above circuit, the time constant needs to be determined. Plot expected
charge and discharge curves for comparison with the simulation and actual circuit later.
Then, look at the circuit a third time with a sinusoidal input source. Make sure that you
choose a frequency such that it is easier to see the phase shift in the voltage across the

capacitor versus the voltage at the source. In this case, phasor analysis would probably
be the appropriate method of analysis.
Simulation Phase
To simulate the above circuit, use the VPULSE source to providing a DC source for the
charging and then discharging. The period of the source for the charge portion of the
cycle needs to be at least 5 time constants and the discharge is also at least 5 time
constants. Please answer why 5 time constants and what the approximate value the
capacitor has charged to in those 5 time constants and what it will have discharged to in 5
time constants. Compare the calculated and hand plotted to the simulation results.
Next, look at the circuit using a triangular wave voltage source and gain an understanding
of what you would expect from an actual circuit.
Finally, simulate the circuit using the sinusoidal source determined in the design phase
above.
Build the circuit using the nominal values used in the design and simulation portions of
the lab. Use the function generator and oscilloscopes to test and measure the results.
Compare these actual results with the design and simulation results and explain
differences which occur. What happens if source frequency were to increase to less than
one time constant?
For the final part of this lab, your instructor will provide you with a couple of capacitors.
You will need to determine their values based on what you have learned in preparing for
this lab.

Experiment 3
Resistor and Inductor Circuits
Objectives:
The objective of this lab is to analyze and interpret the operation of resistor-inductor
circuits when driven by a square wave, a triangular wave, and sinusoidal sources. The
lab will also explore adding two inductors in series and in parallel. Finally, a circuit is
constructed which will demonstrate ‘inductive kick’ and how the inductor’s ability to
keep current flowing can be used to create a larger voltage than what was originally
supplied to the circuit.
Preliminary:
Part 1:
For the first part of this lab, consider the following circuit. Using this topology, and not
necessarily the values shown, you will explore R-L circuits. As usual, there are three
phases to this lab: the Design Phase, the Simulation Phase, and the Implementation
Phase. In the last phase, (Implementation) you will actually build a circuit and make
measurements to compare with the results you obtained in the design and simulation
phases.
R1
1k
V
V
V1 = 0 V1
V2 = 2
TD = 0 L1
TR = 1n
TF = 1n 2.2mH
PW = 10u
PER = 20u
Design Phase
In the design phase, you will need to perform an analysis on a R-L circuit, which uses a
DC source. This is to be done at first by using only the variables of R and L without
specific values. Then, using the values in the above circuit, the time constant needs to be
determined. Plot expected curves for comparison with the simulation and actual circuit
later. In addition, consider the circuit where the inductor is changed by adding an
additional inductor in both parallel and series. This second inductor has a nominal value
of 1.0mH.
Finally, look at the circuit a third time with a sinusoidal input source. Make sure that you
choose a frequency such that it is easier to see the phase shift in the voltage across the

inductor versus the voltage at the source. In this case, phasor analysis would probably be
the appropriate method of analysis.
Simulation Phase
To simulate the above circuit, use the VPULSE source to provide a DC source. The
period of the source needs to be at least 5 time constants. Compare the calculated and
hand plotted to the simulation results. The VPULSE can also be used to create the
triangular wave input. For the sinusoidal input, use the VSIN source.
Next, look at the circuit (using only the above 2.2mH inductor value) using a triangular
wave voltage source and again, gain an understanding of what you would expect from an
actual circuit.
Part 2:
For the second part of this lab, please consider the following circuit. Using this topology,
you will explore R-L circuit which will demonstrate ‘inductive kick’. As usual, there are
three phases to this lab: the Design Phase, the Simulation Phase, and the Implementation
Phase.
Design Phase
In the design phase for this circuit, you will need to perform an analysis on the R-L
circuit where switches will connect and disconnect the DC source. Using the values in
the circuit below, the time constant needs to be determined and a plot should be made of
the voltage across the inductor and resistor R1 for comparison with the simulation and
actual circuit later.
V
V
TCLOSE = 0 TOPEN = 5us R2
1 2 1 2
U2 U1
1k
V1
V
5Vdc
R1
5k L1
2.2mH

Simulation Phase
To simulate the above circuit, use the switches with time specified to open and close the
contacts.
Build the circuits using the nominal values used in the design and simulation portions of
the lab. Use the function generator and oscilloscopes to test and measure the results.
Compare these actual results with the design and simulation results and explain any
differences that occur.
You will not need to actually have switches for the second part, as it really is only
necessary to be able to capture the events after the DC source is removed. To accomplish
this, just disconnecting the wire from the source to the circuit and having the trigger set
on the oscilloscope to capture the event. This is very difficult to catch with an analog
oscilloscope. But, with a slow enough sweep and triggering multiple times, it is possible
to see the maximum values and get an idea of the possible waveform shape.

Experiment 4
Capacitive and Inductive Reactance and Resonance
Objectives:
First, examine the response of the series R-L-C circuit to a square wave. Second,
examine the response of the series R-L-C circuit to a varying sinusoidal wave and gain an
understanding for resonance. Third, examine a circuit where the L and C are in parallel
and examine this circuit with a varying sinusoidal wave to understand its resonance
characteristics.
Preliminary:
DC Analysis of Series R-L-C circuit
The purpose of the preliminary analysis is to predict the performance of the circuit when
simulated and then, when it is actually constructed. The series R-L-C circuit has
basically three different responses to a D.C. switched source, or to a square wave of a
sufficiently long period. First, the circuit may be under damped. Second, the circuit may
be critically damped. Third, the circuit may be over damped. Each of these three
conditions is examined in this lab.
For the three different cases, the following circuit should be used. The resistor, R1, is the
resistor which will change and thus cause the circuit to have one of the three conditions.
For all cases, the current is the item of interest, current can be found by dividing the
voltage across R1 by the value of R1.
L1 C1
1mH
2200p
V2 R1
VOFF = 0
VAMPL = 1
FREQ = 100k
Under Damped Case:
Design Phase - For the under damped case, use a value for R1 that is about half of that
required to have the circuit critically damped. Using this value find the time constant and
angular frequency. Please refer to your textbook to apply the correct formulas.

Simulation Phase – Simulate the circuit using the value you found for R1 and compare
the results with your design phase calculated values.
Critically Damped Case:
Design Phase – For the critically damped case, find the value of the maximum current
using a voltage of 1 volt. Also, determine the time at which the maximum current occurs.
Simulation Phase – See how the simulated results compare with the calculated values.
Over Damped Case:
Design Phase – Plot the two separate exponential functions which occur when finding the
solution for the current. Then, plot the complete function and find the approximate value
of the maximum current. Use a resistance value for R1 that is double the critically
damped case.
Simulation Phase – As before, simulate the circuit and note how it compares to the
calculated values.
1. Connect the RLC elements used in the preliminary in series with the square wave
output of the function generator. Note that current can also be observed as a
function of the voltage across the resistor R2. Adjust the frequency of the
function generator until a good under damped response is obtained. Make a
sketch of the wave you obtain. Determine the angular frequency of the damped
sinusoid. Also, obtain data from which you can calculate the time constant.
Show the calculations in detail and compare the experimental results with the
theoretical results found in the preliminary section.
2. Place the value (as close as possible) of R1 to have a critically damped circuit.
Record the maximum value of current and make a sketch of the curve. Compare
the maximum value of current with the values found in the preliminary section.
3. Replace R1 with the value to have an over damped circuit. Measure the
maximum current and again compare with the preliminary results.
Resonance of R-L-C Series Circuit
Design Phase - Using the values in the circuit below, determine the resonant frequency.
Determine what the voltage should be at the three different points indicated in the circuit
at the resonant frequency. Determine the Q of the circuit and the bandwidth.
Simulation Phase – Verify the calculated results you determined in the design phase.

R1 L1 C1
330 1mH 2200p

V V V
V2
VOFF = 0
VAMPL = 1
FREQ = 100k
Build the circuit and measure and compare the results with what was calculated and then
simulated.
Resonance of R-L-C Parallel Circuit
Design Phase - Using the values in the circuit below, determine the resonant frequency.
Determine what the voltage should be at the two different points indicated in the circuit at
the resonant frequency. Determine the Q of the circuit and the bandwidth.
Simulation Phase – Verify the calculated results you determined in the design phase.
R1
330
V V
L1
V2 C1
VOFF = 0 1mH
VAMPL = 1 2200p
FREQ = 100k
Build the circuit and measure and compare the results with what was calculated and then
simulated.

Experiment 5
555 Timer and Oscillator
Objectives:
To understand how to use the 555 timer integrated circuit. First, design and build a one
second pulse extender (mono-stable). Second, build a 1kHz oscillator (a-stable). Third,
use the extender to drive an alarm, which consists of the oscillator in part two and a
speaker.
Preliminary:
• Get on the internet and download the data sheets for the LM555 and LM556 timer
ICs. You will need the information to complete this lab.
• For use in PSpice, you will need to find the 555 part. You will need to simulate
all three of the circuits.
• Use the 555 for the first part, building a pulse extender and the second part where
you build an oscillator. For the third part, you will need to physically use the 556
in order to have both timers for use. For simulation purposes, you will probably
have to use two separate 555 timers.
In operation, the 555 derives its timing pulse from the familiar RC circuit. In mono-
stable mode, it consists of exactly that: One R and One C. (The 0.01 uF cap on the
Control voltage pin is to prevent static buildup, which can change the operation
unexpectedly). In a-stable mode, R is split into Ra and Rb. The capacitor charges
through (Ra + Rb), and discharges through just Rb. This means the charge time is longer
than the discharge time. While the capacitor is charging, the output is HI. This means
the ON time is longer than the OFF time. Although, when Ra is small compared to Rb,
they are very close. Duty cycle means the percent of ON time to the total period. Thus, a
555 cannot get a 50% duty cycle, although as you will see, it can get very close.
• Build Mono-stable circuit. Use an LED as the visible output. Be sure to use a
suitable resistor to limit the current to about 10 mA. This is done by connecting
the resistor and LED in series from the ‘Output’ of the 555 timer to ground.
• Build A-stable circuit, using a different 555 (or you may choose to use a 556, the
dual version of the 555). Choose 1K ohm for Ra. Tune your square wave to be
precisely 1KHz, using the closest correct value of resister that you can find. What
duty cycle was calculated and what was measured.
• For the third circuit, connect the output of circuit 1 to the reset pin of circuit 2.
Circuit 2 output will power the speaker.

Experiment 6
Introduction to Op-Amps
Objectives:
The purpose of this experiment is to learn the characteristics of an ideal OP AMP and
become familiar with designing OP-Amp circuits. There are two parts to this lab. In the
first part, different Op-Amp circuits will be examined using ideal Op-Amp
characteristics.
In the second part of this lab, some of the actual limitations within the Op-Amps used
will be examined while designing and building a multistage amplifier.
Part 1
Preliminary:
Derive the transfer functions for the following circuits. Test your derivations on PSpice.
See lab procedure to determine simulation values.
Circuit 1: The Non-Inverting Amplifier

4
Vin
3
V+
+ Vout
1
OUT
2
2
V-
- Rf
11
Rin
Circuit 2: The Inverting Amplifier
Rf
2 1
11
Vin Rin
2 1 2
V-
- Vout
1
OUT
3
V+
+
4

Circuit 3: Inverting Summing Amplifier
R2 Rf
Vin2 2 1 2 1
11
R1
Vin1 2 1 2
V-
- Vout
1
OUT
3
V+
+
4
0
Circuit 4: Differential Amplifier
Rf
2 1
11
Vin1 Rin
2 1 2
- V- Vout
1
Rin OUT
Vin2 2 1 3
V+
+
4
Rf
Before beginning the actual laboratory, become familiar with the data sheets for the Op-
Amp that you will be using. For this lab, you will be using the LM348N (Quad 741 Op-
Amp).
Non-Inverting Amplifier: For this design, let Rin = 10K ohm and use a sine wave input of
Vin = 0.1 volts peak-to-peak. Build a non-inverting amp with a gain of 2 and one of 10.
Measure the frequency response of these circuits and make an amplitude vs frequency
plot of both from 100 Hz to 100 KHz on the same axis.
Inverting amplifier: Let Rin = 10K ohms and use a sine wave input of Vin = 0.1 volts
peak-to-peak. Build an inverting amp with a gain of 1, 10, and 100. Measure the
frequency response of these circuits and make an amplitude vs. frequency plot of all three
from 100 Hz to 100 KHz on the same axis. For the Av = 100 circuit, increase your input
amplitude until the output looks significantly different. Sketch it on and explain what
happened. This phenomenon is called clipping. Newer chip designs can amplify a signal

to within a few milli-volts of both supply voltages. This is called rail-to-rail
performance. How close to the rails did the signal get? Which side did it clip on first?
It may be necessary to use a voltage divider between the signal generator and your input
if the output signal is too large. Remember that a voltage divider is usually just two
resistors in series between the signal and ground. The junction between the resistors is
the output.
Inverting Summing Amplifier: Build a unity gain summer. Use the square wave from
the TTL output and a 1 KHz triangle wave from the signal generator. (Set the triangle
wave to be precisely the same amplitude as the square wave to make your analysis
easier.) Sketch the output. Include both inputs and the output on the same graph.
Explain why the output looks that way.
Difference Amplifier: Build a unity gain difference amplifier. Using the output from the
signal generator, feed identical signals into both sides of the amplifier. Make them about
10 volts in amplitude. What result do you get and why? The Common Mode Rejection
Ratio is the ratio, in dB, of the reduction of noise that is common to both signals. It is
found with the formula: CMRR – 20 log10 (Vin/Vout), where Vin and Vout refer to the
signal strength of the noise. For a 741, the CMRR is supposed to be about 80dB. You
can readily see that corresponds to a noise voltage reduction of 10,000. Calculate the
CMRR for the circuit.
Part 2
There are three characteristics that control the speed of an Op-amp: that is, how high a
frequency it can handle accurately. They are the Gain Bandwidth Product (GBW), high
frequency roll-off, and Slew rate (SR). GBW and SR are characteristics usually listed on
the first page of the Op-amp description. You have to find roll-off in the graph called
Large Signal Frequency Response, or something similar.
The GBW defines the high frequency gain envelope. It is the product of the frequency to
be amplified and the amount of gain you wish to get. Early op-amps had a GBW of
about 1 MHz. Thus, a 1kHz signal could be amplified by a factor of 1000 (assuming that
doesn’t exceed the output swing of the amp.) However, a 200KHz signal could only
have a gain of 5. Typical low-end op-amps today have a GBW of 3 MHz, while
expensive ones can reach hundreds of MHz.
Designs should not go beyond the GBW. They should not even be close to it. It will not
gain anything and is pointless. Designing beyond GBW at low frequency just gives a
lower gain than designed, because gain stops when the GBW envelope is hit. At higher
frequencies, trying to go beyond GBW does not matter either because it will not go that
far. The envelope at high frequencies (inexpensive op-amps is about 10KHz) is
controlled by roll-off, which is much tighter than GBW. The data books usually have a
Frequency Response graph that will show this curve. The result of ignoring the GBW
looks the same as high frequency roll-off. If you were amplifying an audio signal (20Hz

– 20kHz) a very large amount with one op-amp, you would see that the high frequencies
are not amplified as much as the lower ones.
Roll-off is caused primarily by the internal capacitance of the op-amp. Some of it can be
designed out, but op-amps typically have some capacitance deliberately built into them to
control instability and that is more difficult for the designers to work around.
You can get around these limitations by building multi-stage amplifiers, with each stage
providing part of the total gain. The number of stages makes the circuit more
complicated. Therefore, it is often cheaper to use a faster Op-amp.
Slew Rate refers to the op-amp’s ability to respond accurately to a fast changing signal,
like a video signal or a square wave. It is also caused by the internal capacitance. In
essence, it is the rate at which that capacitance can charge and discharge. It is easy to see
on a scope by looking at a square wave. The transitions are called edges, and they need
to go from LO to HI (or back down), instantly. Look at the edges of a pulse. They
should be straight up and down. However, you will see that they are actually sloped
inward, like a pyramid: The top of the pulse is narrower than the bottom. Slew Rate is
measured in Volts/microseconds (V/μS). If your pulse is 10 volts high, and the SR is
only 1V/uS, like the early 741s, it will take 10uS to rise and another 10uS to fall. That
means that for a frequency of only 50KHz, there will be no flat top at all, and for
anything faster, the signal won’t even have time to get up to full voltage. Today’s low-
end chips have a slew rate of 10-15 V/μS and fast ones can exceed 1000 V/μS.
Preliminary:
Design a four – Stage amplifier to the following specifications:
• The output may NOT be inverted.
• Use an output resistor of 1k ohm.
• The voltage gain Av = 1200 minimum at 100kHz (Gain at other frequencies is not
part of the spec.)
• The first stage must be designed to avoid loading the input signal. Loading refers
to the current draw from the signal. If there is a large current demand by your
amp, you can overload the signal’s ability to supply it. This can damage the
signal generator, but more likely, it will just not work well. The input and output
impedances of each stage control loading. If Zin of one stage is high compared to
Zout of the prior stage, loading will not be an issue. For an inverting amp, Zin is
Rin. For a non-inverting amp, Zin is Zin of the chip, which will be at least several
Meg ohm.
• The final stage is to be a voltage follower. Voltage followers are non-inverting

and have a gain of one. They have the input impedance of the op-amp, the
maximum possible. They are built like a non-inverting amp, but no resistors are

used. Instead, they are replaced with wires. Since there is only a wire connecting
Vin+ and Vout, Vout must equal Vin-. The difference between Vin+ and Vin- is
approximately zero. So, Vout = Vin+, and the gain is 1. Followers are used to
buffer the signal and protect the prior circuitry. They put virtually no load on the
other stages, because they have such high input impedance. They provide all the
power necessary for the load.
11
2
V-
-
Vout
1
OUT
Vin
3
V+
+
4
NOTE: By intent, the high frequency roll-off characteristic is dominant in this design. It
will require the designed gain to be much higher than otherwise necessary.
Build and test the above amplifier.

Experiment 7
Frequency Response
Objectives:
In this experiment, two filter circuits are studied in the frequency domain. The first is a
double L-section high pass R-C filter, and the second is a bridge-tee.
C1 C2
.047u .047u
Vin
V1
1Vac R2 R3 Vout
0Vdc 6.8k 6.8k
Double L-section
R1
33k
C3 C4
Vin 2200p 2200p

V2
1Vac R4 Vout
0Vdc 5.6k
Bridge-tee
Preliminary:
1. Calculate the transfer function, H(s) = Vout (s)/ Vin (s) for the two circuits.
2. Plot the pole-zero diagrams for both filters.
3. Draw the Bode diagrams, both magnitude and phase for the two networks.
4. Simulate both circuits and plot the frequency response.
Using an oscillator and an oscilloscope, measure the frequency response for both circuits.
Tabulate your results and also plot the experimental data on the previously drawn Bode
plots. Change the values of elements of the bridge-tee filter to R4 = 9KΩ, R1 = 10KΩ and
C1 = C2 = 2.2nf and again measure the frequency response. Show the data in tabular and
graphical form.

Experiment 8
Filter Design
Objectives:
The purpose of this lab is to review the principles of frequency response and the use of
the Bode plot. A passive and an active filter will be designed in the process.
Part 1
Discussion:
Understanding the frequency domain behavior of filter circuits is an essential aspect of
electrical engineering. Full comprehension is necessary to gain an intuitive
understanding of circuits (in other words, the ability to quickly size up how a circuit
works and what it is supposed to do by inspection and without detailed calculations).
Bode plots are covered thoroughly in Circuits II but experience has shown that it takes
practice to really grasp the subject. Experience has also shown that electronics is much
easier to learn if you develop the skill mentioned of circuit analysis by inspection. So,
with all of that in mind, we will begin with some basic filter design review.
Passive Filter Design: Passive filters are generally avoided where possible because of
their load-dependent performance, as you will see in the lab. However, there are
applications where there are no alternatives. The circuit shown in Figure 1 is a general
form of a second order passive filter (given that 2 of the elements are resistors) that can
be a low pass, high pass, band pass or band reject, depending on the choice of elements.
+ Z1 Z3
+
Vin Z2 Z4 Vout Rload
- -
Figure 1
Preliminary:
Design a low pass filter to meet the following:
• Load resistance is 50k ohms
• D.C. Gain is 0.9
• Pass band (< 3 dB of attenuation) is 0 – 5 kHz

• Output is attenuated by at least 35 dB at 50 kHz.
• Check the frequency response of the design using PSpice.
• Check the frequency response of the design using a load which is a factor of 2
greater than and 2 less than the designed load.
• Hint for Lab: One of the components should be a capacitor and another
component should be an inductor of about 50mH.
Verify proper operation of the design by measurement. Plot your measured data on 3
cycle semi-log paper along with the Bode approximations. Compare your results with
those from the preliminary analysis. Explain any discrepancies.
Part 2
Discussion:
Active Filter Design: The following figure shows the general form of an infinite gain,
multiple feedback filters. In practice, infinite gain is not attainable. However, gains as
high as 108 are possible. For the purpose of this lab (and most practical applications), the
op-amp can be considered as ideal. The filter can be configured as a band pass, band
reject, low pass, or high pass depending on the choice of elements. We will study the
band pass case. Second order functions (particularly those with complex poles or zeros)
are most conveniently described in the following form:
ωon
s2 + s + ωon2
H(s) =
_______________Qn
ωod
s2 + s + ωod2
Qd
Z4 Z5
Z1 Z3
+ -
Vin Z2 + +
Vo
- -

This transfer form of the circuit is useful because the coefficients relate directly to circuit
performance characteristics. The center frequency is ω and Q (Quality factor) relates to
the bandwidth (B) of the circuit. Bandwidth is defined as the frequency range in which
the output is attenuated by less than (or equal to) 3dB relative to the gain at the center
frequency:
B = ω2 – ω1 = ωo/Q
Note that the middle coefficient of the characteristic equation is the bandwidth in
radians/second. The –3dB frequencies (relative to maximum response) are ω1 and ω2.
Preliminary:
Let elements Z3 and Z4 in the circuit be capacitors (the others are resistors). Show that
the transfer function of the circuit then fits the form:
ωon
K s
H(s) =
___________ Qn
ωod
s2 + s + ωod2
Qd
K = gain factor
Using this circuit, design a band pass filter to meet the following specifications:
• Center frequency of 500 Hz
• Pass band gain of 10
• Quality factor (Q) of 10
• Input resistance greater than 10K ohms
• Allowable input signals from 5mV to 1 V peak.
• Hint for this circuit: Set Z1 equal to 10K ohms, and for the capacitor for Z3,
choose a value about 100 times that of the capacitor for Z4.
Use PSpice to plot the following:

• Frequency response of the filter you designed
• Frequency response of band pass filters with the same center frequency as yours,
with Q = .5, .707, 1, 5, and 50.
Verify the performance of your circuit by measurement. Plot both the measured
amplitude and phase response on 3-cycle semi-log paper along with the Bode
approximations. Explain why Bode approximations are not accurate in this case. Use
pole-zero diagrams and your PSpice analysis to illustrate. Explain any discrepancies
between your measurements and expected results. Find the maximum allowable input
signal amplitude and explain the limitation.

Tentative Lab Schedule
Week 1 Introduction, locker assignment, use of lab equipment and PSpice

introduction
Week 2 Experiment 1: Thevenin and Norton Circuits
Week 3 Finish Thevenin and Norton Circuits
Week 4 Experiment 2: Resistor and Capacitor Circuits
Week 5 Finish Resistor and Capacitor Circuits
Week 6 Experiment 3: Resistor and Inductor Circuits
Week 7 Finish Resistor and Inductor Circuits
Week 8 Experiment 4: Capacitive and Inductive Reactance and Resonance
Week 9 Finish Reactance and Resonance
Week 10 Experiment 5: 555 Timer and Oscillator
Week 11 Experiment 6: Introduction to Op-Amps
Week 12 Finish Op-Amps
Week 13 Experiment 7: Frequency Response
Week 14 Experiment 8: Filter Design
Week 15 Finish Filter Design
Finals week: No lab, but you must turn in the last report.

EE 2552 Circuits Laboratory: The University of Colorado at Denver Department of Electrical Engineering

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EE 2552 Circuits Laboratory: The University of Colorado at Denver Department of Electrical Engineering

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EE 2552

The University of Colorado at Denver

August 1, 2006 1 Duane Swigert

August 1, 2006 2 Duane Swigert

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• Experiment number and title

• Your name, partner’s name(s)

• Course and section number

• Date the work was completed

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Questions: Answer any questions which might be asked. Start by repeating or

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2) Visual impact is important. The appearance of your report is extremely important.

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Procedures and Etiquette

• Faulty or damaged equipment must be brought to the attention of the instructor.

• Always return components and equipment to their proper place.

• Do not remove probes from oscilloscopes.

• Do not remove equipment or components form the EE labs without prior

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Steps for Using PSpice

1. Start the OrCAD program and create a New Project.

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Suffix Mnemonic Exponential Form

MEG, meg Mega 1E 6

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13. At this point, the circuit will be ready to try a simulation.

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To create a sinusoidal wave, use the VSIN

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• Diodes – D1N4002 for regular diode, or D1N750 for zener diode.

• Transistors: npn – Q2N2222 or Q2N3904, pnp – Q2N2907A or Q2N2906

• JFETs – n-channel depletion J2N3819 or J2N4393

• MOSFETs – n-channel enhancement – IRF150, p-channel enhancement – IRF9140.

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2. Using values for a load resistance of 10Ω, 500 Ω, 1K Ω, …. Up to 5000 Ω, create

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DC Analysis of Series R-L-C circuit

Under Damped Case:

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Critically Damped Case:

Over Damped Case:

Resonance of R-L-C Series Circuit

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330 1mH 2200p

Resonance of R-L-C Parallel Circuit

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Circuit 1: The Non-Inverting Amplifier

Circuit 2: The Inverting Amplifier