Analog and Discrete Time Integrated Circuits Spring 2011

Home Work-3: CMOS layout and Noise in CMOS Circuits

Instructor: Rashad and Arslan
Submission Before: 16 May 2011

Q1: The total rms noise at the output of this circuit is KT/C.
Why Increasing R do not increase the total output noise.
Also calculate the similar expression for Inductor-resistor
Circuit?

Q2: Calculate the input referred thermal noise of the circuit below
when the output has load resistance of RL=10K and source has
input resistance Rs =1K attached to the circuit below.

B)

Q3: Download the data sheet for 741 Opamp and repeat the calculation below for both
inverting and non-inverting configurations.
 Analog and Discrete Time Integrated Circuits Spring 2011

Q4

Q5: Draw the five different layout variants of the circuit shown below and comment that
which is the most area efficient, which has better noise performance, and which has less
parasitic capacitance or high speed.