Hardware Reference Manual 3B21D Computer Physical Description

Processor Cabinet Arrangement

Processor Unit, J3T060AA-1
The Processor Unit, J3T060AA-1, supports the Central Control (CC), Direct Memory Access (DMA), Main Memory (MM), Disk File Controller (DFC), SCSI Peripheral Units (SPUs), DC-to-DC power conversion, power control, port switch with RS-232 interface, and IOP/PC functions. The SPUs include the UN375 through UN375F circuit packs, UN376 through UN376E circuit packs, and 9-track tape. The MM can be a KLW32, KLW40, KLW48, KLW64, KLW128, or KLW256 circuit pack. The Processor Unit also provides two KLW-size slots (EX 0 and EX 1) for future expansion capability. Figure 3-3 shows apparatus housing layout details for Processor Units 0 and 1. Table 3-1 identifies the equipage of the Processor Units 0 and 1 in the Processor Cabinet.

0 0 8

0 1 8

0 2 8

0 3 8

0 0 5 6 2 0

0 6 5

0 7 5

0 0 8 9 8 4

1 0 2

1 1 0

1 1 8

1 3 0

1 3 8

1 4 6

1 6 2

1 7 0

1 7 8

1 8 8

53

PROCESSOR UNIT 1 J3T060AA-1 (CU 1, DFC 1, IOP 1)

49

M A I N M E M O R Y
0 0 8 0 0 8

E X 0 S L O T

E X 1 S L O T

K L W 3 1

4 1 0 A A (A) U N 3 7 9

T N 1 8 2 1

DMA K K B B N N 1 1 5 5 (1) (0)

4 1 0 A A (D) 4 1 0 A A (C)

1 2 3 IOP COMM 2

1 2 IOP COMM 3 OR SPU 05

SPU 01

DFC 1 U N 5 8 0

4 1 0 A A (E)

45

4 1 0 A A (B)

K B N 1 0

T N 1 8 2 0
0 8 0 0 7 5

1 2 3 IOP COMM 0

1 2 3 IOP COMM 1

U N 3 7 7 SPU 03

0 1 8 0 1 8

0 2 8 0 2 8

0 3 8 0 3 8

0 5 0

0 6 0

0 6 5 0 6 5

0 0 8 9 8 4 0 0 8 9 8 4

1 0 2 1 0 2

1 1 0 1 1 0

1 1 8 1 1 8

1 3 0 1 3 0

1 3 8 1 3 8

1 4 6 1 4 6

1 5 4 1 6 2

1 7 0 1 7 0 1 7 8

1 8 6 1 8 8

0 0 5 6 2 0

28

PROCESSOR UNIT 0 J3T060AA-1 (CU 0, DFC 0, IOP 0)

24

M A I N M E M O R Y
0 0 8

E X 0 S L O T

E X 1 S L O T

K L W 3 1

4 1 0 A A (A) U N 3 7 9

T N 1 8 2 1

DMA K B N 1 5 (1)

4 K 1 B 0 N A 1 A 5 (0) (D)

DFC 0 U N 5 8 0

IOP COMM 2

IOP COMM 3 OR SPU 04

4 1 0 A A (E)

SPU 00

19

4 1 0 A A (B)

K B N 1 0

T N 1 8 2 0
0 8 0

4 1 0 A A (C)

1 2 3 IOP COMM 0

1 2 3 IOP COMM 1

SPU 02
1 0 2 1 1 0 1 1 8 1 3 0 1 3 8 1 4 6 1 5 4 1 7 0

SPU 54
1 8 6
.

0 1 8

0 2 8

0 3 8

0 5 0

0 6 0

0 6 5

0 0 8 9 8 4

Figure 3-3. Processor Unit, J3T060AA-1, Equipment Layout Front View

3-4

Issue 3.4

April 2006

254-303-105