Rajiv Gandhi Proudyogiki Vishwavidyalaya, Bhopal(M.P.

)
Scheme of Examination
Third Semester- Master of Engineering ( Embedded System and VLSI Design,Micro electronics and VLSI Design)
S.No. Subject Code Subject Name Periods per week Credits Maximum Marks (Theory Slot) End. Tests Assign Sem. (Two) ments Exam. /Quiz Maximum Marks (Practical Slot) End. Practical Sem. Record/ Practical Assignm /Viva ent/Quiz /Present ation 120 100 80 Total Marks

1. 2. 3. 4.

MEVD301 MEVD302 MEVD303 MEVD304

Elective I Elective II Seminar Preliminary Dissertation cum Synopsis Total

T: Tutorial -

3 3 -

1 1 -

4 8

4 4 4 8

70 70 -

20 20 -

10 10 -

100 100 100 200

12

20

140

40

20

120

180

500

L: Lecture -

P: Practical MEVD 302 Elective -II

w.e.f. July-2010

MEVD 301 Elective -I (A) (B) VLSI Test and Testability.

System On Chip (SOC) Design

(A) (B)

Communication RF IC Design Embedded System Programming