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Chuong 2 - Tong Quan Ve Vi Xu Ly
Chuong 2 - Tong Quan Ve Vi Xu Ly
TNG QUAN V H VI X L
Mc lc
2.1. Gii thiu chung 2.2. Cu trc mt h Vi x l in hnh 2.3. Chu k trong Vi x l 2.4. Tp lnh ca Vi x l 2.5. Ghp ni b nh
Vi x l
Loi a nng:
Phc v cho nhiu mc ch khc nhau V d: 8080, 8085 ca Intel 6800, 6802 ca Motorola
Hoc phn loi theo s lng bit: Vi x l 4bit, 8bit, 16bit, 32 bit v by gi l 64bit. Chip ca Intel dng nhiu trong my tnh cn ca Motorola dng nhiu trong vin thng
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1960 Intel: 4004, 8008, 8080 Fairchild Semiconductor: Chip bn dn u tin Thng mi ha chip bn dn
VLSI v 32 bit
K nguyn a li
Ch c mt b nh chung cho d liu v chng trnh c d liu v c lnh khng din ra ng thi
C cc bus c lp cho b nh chng trnh v d liu c d liu v c chng trnh din ra ng thi
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11
12
13
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uP
O
Control bus
uP: Vi x l M: B nh (Memory) I: Cng vo/Thit b vo d liu (Input) O: Cng ra/Thit b xut d liu (Output)
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B
Bus
Kt ni kiu kinh in
Kt ni kiu Bus
16
17
18
Phng php tin nh: xc nh trc quy lut, thi gian truy nhp
Tc cao S phn t t
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Nhc im:
Tc b hn ch do Bus l ng truyn chung
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D0 D7: 8 ng d liu vo
D STB OE Q0
Q0 Q7: 8 ng d liu ra STB: cht tn hiu STB = 1: cho php a d liu ra STB = 1->0: cht d liu u ra
D7
D STB OE
Q7
STB
OE
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- Ax: a ch ca thit b (Tn hiu sau gii m a ch) - IO/M: Tn hiu chn thit b: IO/M = 1 chn cng vo ra IO/M = 0 chn b nh - /RD: Lnh ch thao tc c thit b
Data bus
Address bus
Ax
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Address Bus
Ax = 1
Data Bus
Data t bn ngoi
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OE 8282 STB
Data bus
Address bus
Ax
Address Bus
Ax = 1
Data Bus
Data a ra ngoii
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26
14
1110
15 nh 3 2 1 0 11 10 1 0
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a ch offset
Segment n
Segment 1
a ch segment
Segment 0
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30
31
5 12 13 14 15 16 17 18 19 1 2 39 10 35 9 8 7 36 6
40
U5
SOD A8 A9 A10 A11 A12 A13 A14 A15 CLKOUT ALE HLDA INTA IO/M RD RSTOUT S0 S1 WR
4 21 22 23 24 25 26 27 28 37 30 38 11 34 32 3 29 33 31
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GND
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MEMR: cho php c t b nh MEMW: cho php ghi b nh I/OR: cho php c t cng vo I/OW: cho php ghi ra cng ra
4 2 5 /MEMR IO/(/M) 5 /WR 4 2 /MEMW
4 2 5 /I/OW
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35
36
37
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ID gii m lnh
IP ++
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43
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2.4. Tp lnh ca Vi x l
4 nhm lnh ch yu:
Nhm lnh di chuyn d liu
VD: MOV A, B
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2.4. Tp lnh ca Vi x l
Ngy nay, tp lnh ca VXL ngy cng phong ph, thi gian thc hin lnh ngy cng nhanh
Do s pht trin v cng ngh ch to Do mc tch hp cc thit b ngoi vi Do s a dng ca cc sn phm Do s a dng ca cc hng sn xut .
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2.5. Ghp ni b nh
2.5.1. Mt s chip nh thng dng 1. ROM
Thit k bi cng ngh NMOS, CMOS Dung lng thng 2Kbyte 64Kbyte D liu lu tr dng ma trn Khng b nh hng bi vic mt in 2716, 2732, .., 27256
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2.5. Ghp ni b nh
V d ROM 2716
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2.5. Ghp ni b nh
2. RAM Static RAM
Mi bt d liu c lu tr bi cp flip-flop Cu trc n gin Ghi v xa tn hiu bng in D liu mt i khi mt in Tiu th nng lng ln khi c in Kch thc ln khi dung lng ln 6216, 6232, ..62256
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2.5. Ghp ni b nh
Dynamic RAM
D liu ghi bng t D liu phi refresh tng 2ms -> phi c b iu khin refresh Dung lng ln Cu trc ma trn t tn hao in
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2.5. Ghp ni b nh
V d: RAM 62256
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2.5. Ghp ni b nh
2.5.2. Ghp ni nhiu b nh Ghp ni cc chip nh 2Kx8bit to ra b nh 4Kx8bit Mt s ch :
S lng bit a ch phi ph hp Thng nht tn hiu iu khin B nh 2Kx8bit c 11 bit a ch trong khi 4Kx8bit c 12bit a ch
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2.5. Ghp ni b nh
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 U3 A11 2 1 18 8 7 6 5 4 3 2 1 23 22 19 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 D1 D2 D3 D4 D5 D6 D7 D8 OE WE 9 10 11 13 14 15 16 17 20 21 U1 2016 D0 D1 D2 D3 D4 D5 D6 D7
Data[0..7]
A[0..11]
/RD /WR
CE
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
NOT
8 7 6 5 4 3 2 1 23 22 19
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
D1 D2 D3 D4 D5 D6 D7 D8 OE WE
9 10 11 13 14 15 16 17 20 21 U2 2016
D0 D1 D2 D3 D4 D5 D6 D7
/RD /WR
A11
18
CE
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2.5. Ghp ni b nh
2.5.3. Thit lp b nh ti a ch xc nh
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