THE UNIVERSITY OF THE WEST INDIES ST.

AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES FACULTY OF ENGINEERING Department of Electrical & Computer Engineering

Linking Modelsim 6.0SE/XE to Xilinx 6.3i/7.1i

Setting Modelsim 6.0SE as the default simulator
Click on Edit, then select Preferences. Select Integrated tools and search for the Modelsim executable, modelsim.exe. This can be found performing the following steps: double clicking on Modeltech_6.0 double click on win32,

You should see the Modelsim executable. Select modelsim.exe. Click Apply to save the settings.

Compiling HDL Library

Highlight the FPGA chip as shown in the diagram below.

THE UNIVERSITY OF THE WEST INDIES ST. AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES FACULTY OF ENGINEERING Department of Electrical & Computer Engineering Double-click Compile HDL Simulation Libraries as shown below. You will be prompted to specify the Target Simulator(If you are not prompted to specify the Target Simulator then you can proceed with your simulations). Click on Process, then Properties and a window will pop-up as shown in diagram below. Enter the following settings as shown in the diagram below:

Target Simulator: Modelsim SE Output Directory: search on the D-drive for the win32 folder Simulator Path: search on the D-drive for the win32 folder

Then click OK.

THE UNIVERSITY OF THE WEST INDIES ST. AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES FACULTY OF ENGINEERING Department of Electrical & Computer Engineering Double-click Compile HDL Simulation Libraries as shown below. Give the program a couple of minutes to compile the HDL simulation libraries.

When the HDL simulation libraries have been compiled you can proceed with your simulations. If you are using Modelsim 6.0XE then you will have to complete the license request using the license wizard. However this must be done on the computer in which the Modelsim software is to be used on since you will be given a license for that computer.