CHAPTER 5 PROBLEMS 5.1 Design a BCD to Excess-3 code converter using a: Remember to specify the input and output dimensions of your PLA, ROM, and PAL. {a) Logic network (two-level NAND gates) baba baba bybo\ 00 01 11-10 Bxbo\ 00 O1_11_10 ool ojo f-|t olo Gio o1 alae] -/ n ufd{o|-|< 10 wl ol-Kk e oe 5 o —— " ——= ca hs rt ngyi<|(b) PLA (as in Fig. 5.7) () ROM (as in Fig. 5.25) - em He Fe aid) Guile pe ena aw i att f at t ; Sat te: + = & = aan Ds FAS os (4) PAL (as in Fig. 5.30)5.2 Implement the following functions using a op 00 o1 1. 10 FU(A,B,C,D) = Ym(0,1,2,3,6,9,11) SA,B,C,D) = S>m(0,1,6,8,9) FA,B,C,D) = Yom(2,3,8,9,11) AB AB AB 9 01 11 10 CD\ 00 OL 1-30 CD\ oo a1 1 10 GyoJo[e oof do fo 4 oofo[olofr] Nolo ooo olololoa volo nfofololo uftjolol ijijolo wo (iyo fo wlasofofo fi=A4BYBD+ACD = f= BC+ABCD =f, = ABC ABC ABD (a) 4-10-16 decoder and logic gates (b) PLA (as in Fig. 5.7) i—-—p it Hey er + Soe Ht TS PFPOOC GO. ‘ TIED