Final Report

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Contents Page

1. Introduction and Project Objectives
2. Analog and Digital Signals
3. ADC and DAC Conversion Theory
4. Component Selection
5. Final Circuit Design and Block Diagram
6. Input Stage
7. Output Voltage Offset
8. Signal Processor
9. Mute Control
10. Modulator Feedback
11. Parallel Power Output
12. Bypass Filtering
13. Output Filter
14. Power Stage
15. Heat Management
16. Grounding and EMC Considerations
17. PCB Layout
18. Costs and Parts List
19. Performance and Testing
20. Bibliography
21. Appendix
!
1. Introduction and Project Objectives

This project is centered on the design considerations required for Class-T amplification.
More specifically, this report will document all design aspects associated with the project,
focusing on overall circuit design and analysis, component selection and placement,
electromagnetic compatibility and proper grounding, and printed circuit board (PCB)
design and layout. Furthermore, this report will provide a cost breakdown and parts list,
along with suggestions for retailers and PCB fabrication houses.

The perfect amplifier wouldnt introduce noise, distortion, or coloration of the original
audio signal, and would be capable of providing infinite power gain without
inefficiencies or heat management issues. Unfortunately this is not a perfect world, and
amplifier design is a delicate balancing act between different compromises and trade-offs.
With this in mind, a functional description needs to be established in order to design an
amplifier that fits certain performance characteristics.

! Functional Description

The overall goal of this project is to produce a high-quality Class-T amplifier capable of
powering both 4! and 8! stereo speakers continuously at levels around 90 dB SPL with
15 dB SPL of headroom in order to handle musical peaks with minimum distortion. This
design utilizes Tripath Technologys TC2001 signal processor and TP2050 power output
integrated circuits. Based off of the product specifications, the overall design will be
capable of providing 50W of continuous power per channel at .005% third order
harmonic distortion (THD). Using Tripaths proprietary Digital Power Processing
Technology will allow both the audio fidelity of Class-AB and the power efficiency of
Class-D amplifiers. A combination of both through-hole and surface mount components
will allow overall versatility and customization to a specific speaker type.

! Overall Design Goals
With the factors described above taken into account, this amplifier should:

1) Fit budget constraints ($500 max)
2) Have high-fidelity and accuracy
3) Sustain 90 dB SPL (+15 dB headroom)
4) Require minimum heat-sinking
5) Be compact in size
6) Look professional and high quality

!
!
!
!
2. Analog and Digital Signals

In a field once dominated by analog equipment, the use of digital technology is rapidly
gaining popularity in high-fidelity audio amplification. Naturally, there is a rift among
audiophile circles; each claiming that one type of amplification is superior to the other.
However, this is simply a matter of taste, as both can offer high-quality sound when
properly designed. Class-T is a digital signal processor and amplifier, and in order to
understand the theory behind how this is accomplished, it is important to understand the
basics of both analog and digital signals.

! Analog

Analog signal is simply a continuous time varying voltage. This means that over a given
time period, the amplitude of a voltage waveform is constantly changing. A common
example of an analog signal is a microphone. The electrical signal produced by a
microphone varies continuously with changes from the acoustic source. The input and
output of this Class-T amplifier are in analog form.

! Digital

Digital signal differs from analog in the fact that both time and amplitude of a signal has
been made discreet
1
. This simply means that the signal is broken up into individual
sections in both domains. In this design, time is broken up into individual sections set by
the sample rate. The voltage is also discreet, as it can only take the form of a set number
of voltages. This is set by the resolution, which will be described in the next section.

The following picture provides a visual representation of the content just covered
2
:

1
"Digital Signals," 2011, Wikipedia, 18 Apr. 2011
<http://en.wikipedia.org/wiki/Digital_signal>.
2
Michael Stutz, Practical Considerations of ADC Circuits, 2000, Design Science
Liscense, 18 Apr. 2011 < http://www.allaboutcircuits.com/vol_4/chpt_13/10.html>.
3. ADC and DAC Conversion Theory

At the heart of Tripaths signal processor design is the Sigma-Delta analog-to-digital
converter. Understanding the theory behind its operation is of the utmost importance, as
this converter is responsible for amplifying the analog audio input signal and converting
it to a digital switching pattern.

! Sigma-Delta Theory

The backbone of the sigma-delta converter consists of simple analog components (a
comparator, voltage reference, a switch, and one or more integrators and analog summing
circuits), and proprietary digital signal processing developed by Tripath
3
. Analog
Devices Design Center
4
provides a very clear visual explanation of the sigma-delta
topology as shown below.

For a basic explanation, a V
IN
of 1 Volt
will be used, and it will be assumed that
every component has been reset to zero.
The input voltage is first summed with the
output of a feedback digital-to-analog
converter (DAC). An integrator then adds
the output of this summing node to a value
it has stored from the previous integration
step (initially zero). A comparator outputs
logic 1 if the integrator output is greater
than or equal to zero volts and logic 0
otherwise. A 1-bit DAC feeds the output of
the comparator back to the summing node:
+V
REF
for logic 1 and -V
REF
for logic 0.
The major property behind sigma-delta is derived from this constant feedback loop. This
ensures that the average of the bitstream output represents the average input signal.
5
As
the input signal increases, more 1s are added to the bitstream, and conversely, as the input
signal decreases, more 0s are added to the bitstream. In order for this system to work so
that it adequately reflects the original audio input signal, a high sample rate is used (will
be covered in more detail shortly).

The screenshot on the following page shows the basic operation of each of the above
steps in the sigma-delta ADC. It should be noted that in this example the output
bitstream is represented by the Latch waveform, and not the comparator. The digital
clock frequency is set by the TC2001 at 650kHz.

3
Walt Kester, ADC Architectures III: Sigma-Delta ADC Basics, 2009, Analog
Devices, MT-022 Tutorial.
4
Sigma-Delta ADC Tutorial, 2011, Analog Devices, 18 Apr. 2011
<http://designtools.analog.com/dt/sdtutorial/sdtutorial.html>.
5
Uwe Beis, An Introduction to Delta Sigma Converters, 2008, Electronics, 18 Apr.
2011 <http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html>.

The previous description shows how an analog signal is encoded into a digital format
using the sigma-delta method to continuously reflect the average analog input level. In
order to avoid quantization noise produced by the conversion of analog signals to digital
signals, sigma-delta uses a combination of over-sampling and noise shaping to minimize
noise in the actual audio bandwidth.

The Nyquist Theorem states that a sample rate of two times the highest frequency should
be used in digital. A perfect sigma-delta ADC has an RMS quantization noise of q/!12
uniformly distributed within the Nyquist band of dc to fs/2 (where q is the value of an
LSB and fs is the sampling rate)
6
. The quantization noise produced using the Nyquist
theorem is shown in section A of figure on the following page. As you can see, the
amount of noise present in the signal is unacceptable.

To combat this effect, a process known as over-sampling is used. This simply means that
the sample rate is set much higher than the Nyquist Theorem definition. For example,
following the Nyquist Theorem, the sample rate would be two time 20kHz (the max
frequency in the audio band), resulting in 40kHz. The TC2001 signal processor used in
this Class-T amplifier design has a sample-rate of 650kHz. This spreads the quantization

6
Walt Kester, ADC Architectures III: Sigma-Delta ADC Basics, 2009, Analog
Devices, MT-022 Tutorial.
noise out over a larger area as shown in section B of the figure below. The high and low
pass filters set by separate section still set the audio band from 20Hz to 20kHz, but the
noise present in the audio band is now much less.

To further combat quantization noise present in the audio band, a process known as noise
shaping is used. This consists of proprietary digital filtering designed by Tripath
Technology, Inc. The effects of noise-shaping filters are shown in section C in the figure
below.
A

A low pass filter is required at the output of the amplified digital signal. In this amplifier
design, a passive low-pass crossover is used to demodulate the digital signal by taking the
average signal level out of the bitstream. You can regard the bitstream as a signal with
its information in the lower frequency band and lots of noise above it
7
.

7
Uwe Beis, An Introduction to Delta Sigma Converters, 2008, Electronics, 18 Apr.
2011 <http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html>.
4. Component Selection

Component selection for a circuit design is critical, as it has a significant impact on
overall performance. Knowledge of various component materials, their specific
applications, and cost versus performance is necessary. The following sub-sections cover
the major components used in this design, and why certain types were selected for their
intended purposes.

! Capacitors

Capacitor losses due to dielectric material have a noticeable effect on audio quality and
noise performance, and certain dielectric materials are more suited to specific
applications. Furthermore, capacitor construction and resonance plays an important role
in the performance of audio-grade capacitors. For an in depth technical paper about the
mechanical construction of capacitors, visit Humble Homemade Hifi
8
.

Decoupling capacitors, also known as bypass capacitors, play one of the most important
roles in this amplifier design. The purpose of a decoupling capacitor is to decouple one
part of an electrical network from another
9
. In the case of this design, decoupling
capacitors are used for two major purposes. First of all, decoupling capacitors are placed
in parallel (see picture below
10
) on every component power input pin to ground. This
serves the purpose of providing any AC signal that may be superimposed on the DC
power line with an immediate path to ground. In order to understand how this works we
need to only look at how a capacitor behaves with AC and DC signals.

For DC signal, a capacitor acts as an open circuit. Current will initially flow through the
capacitor until it is charged to the level of the applied source voltage (5VDC or 30VDC).
Once the capacitor reaches its charged state, it effectively blocks DC current from
passing through. This can be explained by the following formulae:

I = (Vs Vc) / R

Where I is the charging current, Vc is the voltage across the capacitor, Vs is the source
voltage, and R is the circuit resistance.

8
Tony Gee, Capacitor Test, 2011, Creative Commons, 24 Apr. 2011
<http://www.humblehomemadehifi.com/Cap.html>.
9
"Decoupling Capacitor," 2011, Wikipedia, 24 Apr. 2011
<http://en.wikipedia.org/wiki/Decoupling_capacitor>.
10
Kevin Ross, The Basics, 2009, Creative Commons, 24 Apr. 2011
<http://www.seattlerobotics.org/encoder/jun97/basics.html>.
At time zero, there is no voltage across the capacitor. Once the voltage across the
capacitor reaches the source voltage the current now become zero. This effectively
separates the DC voltage and current, and is the basis for a decoupling capacitor.

However, for an AC signal, the alternating current discharges the capacitor as it changes
current direction. This charging and discharging allows the capacitor to pass AC current.
This relates to decoupling because it will pass AC to ground, while blocking DC. Again,
this will separate any AC noise present in the power supply, thus improving noise related
issues in the circuitry.

In addition to their noise filtering functions, decoupling capacitor are also used to store
extra charge needed during peak loads. Music is very dynamic and decoupling capacitors
are used to hold and provide extra charge when the power supply levels droop due to
peak power conditions.

Different capacitor types are used for the different decoupling purposes described above.
Ceramic capacitors are used primarily for high frequency decoupling and are non-
polarized
11
. These are available in relatively low capacitance values, and are useful for
power supply bypassing, coupling, timing, and high-voltage applications, making them
suitable for Class-T circuit design. Aluminum electrolytics are commonly used as energy
storage decouplers, as they can store more charge. Great care is needed when using
these, as polarity is an issue. In many designs, including this one, a combination of the
two are used as decouplers to cover all the areas described above.

Finally, the proper placement of these components is highly important. Tripath
recommends keeping the decoupling capacitors as close as possible to the components
pins.

Coupling capacitors, also known as DC blockers, work with the same principles
explained above, but serve an entirely different purpose. Instead of being placed in
parallel with a signal source, they are placed in series. These are commonly used on the
inputs and outputs of individual component stages of an amplifier. In theory, this would
allow only the analog source signal to pass through to the amplifier circuitry, and vice
versa, would allow only an analog output signal to pass to the speakers. Coupling
capacitors were used only on the inputs of this design, while a DC voltage offset circuit is
used to limit the DC output at the speaker terminals.

Quality of the input capacitor is important. First of all, overall circuit noise is dependent
primarily on the quality of the first components in the audio chain. If an input component
introduces noise, this noise will then be amplified created a high noise floor. This is
obviously something to be avoided in a high-fidelity audio system. The input capacitor
also has an important role in shaping the sound of the amplifier. Therefore, a premium
film capacitor was chosen for this application. ClarityCaps ESA film capacitor were

11
Zed Audio, Capacitors, 2005, Zed Audio Corporation, 24 Apr. 2011
<http://www.zedaudiocorp.com/Technical/Capacitors.htm>.
chosen for input coupling capacitors, as they offer more clarity and spatiality
12
, while still
being affordable.

Filtering capacitors are also used in this amplifier circuit on the output filter. High-
quality film capacitors were chosen, as they are generally used in audio filters
13
, and can
withstand high ripple currents caused by the switching outputs. Tripath also recommends
the use of film capacitors for this application. The filtering capacitor is used with the
output inductor to form an LC low-pass filter (explained in detail in output filter section).

! Resistors

Resistor selection also has a significant impact on the overall tonal characteristics of an
amplifiers sound. In general, resistors add a glazed and hashy noise in the treble
region and can dilute stereo focus
14
. Some of the major resistor types that were
considered in this design were metal-film, carbon-film, and bulk-foil, as they are
commonly used resistors in audio applications. Choosing which type to use was
relatively easy due to availability and pricing. Of the three types, metal-film was readily
available and inexpensive.

! Inductors

Output inductor selection is yet another critical design step. Tripath states that the core
material and geometry of the output filter inductor affects the amplifier distortion levels,
efficiency, power dissipation and electromagnetic interference output. Core material also
has a direct effect on the produced magnetic field and core saturation. Iron powder
toroidal cores were chosen to minimize magnetic radiation and interference. 22AWG litz
wire was chosen to further minimize losses.

! Potentiometer

A high quality potentiometer is also necessary for high-quality stereo applications. An
ALPS Blue Velvet potentiometer was chosen because it offers quality sound and good
channel tracking. As discussed with the input capacitors, high quality is of importance,
as this component is first in the audio-chain. In order to control the volume of both
channels simultaneously, a duel-gang potentiometer with an audio taper was used. Duel-
gang means that two potentiometers are controlled by one input shaft. The Blue Velvet
was chosen due to minimal difference in channel control. An audio taper was chosen
because audio devices operate on a logarithmic (non-linear) scale. This is necessary so
that when the volume control is at the halfway point, the audio level is at half of its
maximum volume level.

12
Tony Gee, Capacitor Test, 2011, Creative Commons, 24 Apr. 2011
13
14
Martin Coloms, Piece de Resistance, 1996, SAS Audio Labs, 24 Apr. 2011
<http://www.sasaudiolabs.com/resistor.htm>.
! Through-Hole versus Surface-Mount

Certain components were chosen as through-hole or surface-mount to offer versatility in
this amplifiers design. Both the input stage components (explained later) and output
filter components (also explained later) are through-hole components so that the low-and
high-pass filters, and overall gain can be changed and experimented with. This also
allows for the customization of this amplifier for a specific set of speakers and was a
major design choice. All other components were surface-mount to minimize area, ground
loops, and to facilitated high frequencies.

5. Final Circuit Design and Block Diagram

The following schematic is the final circuit design for this Class-T amplifier. A larger
schematic is included in the Appendix for reference.

The following block diagram breaks down the above circuit into individual stages, which
will be described in the following sections.

6. Input Stage

The input stage of the circuit consists of the input signal
source, the volume potentiometer, the input capacitor
(CI), the input resistor (RI), and the feedback resistor
(RF). This stage and its components are responsible for
two important design factors.

The input resistor and feedback resistor provide the AC
gain for the input stage. The TC2001 signal processor is
configured as an inverting operational amplifier for each
channel. An inverting amplifiers gain set by the formula:

The resistors for R
F
and R
I
were chosen as through-hole
components in the final design so that the input stage gain
can be easily changed. In Tripaths test schematic, the
input stage gain is designed as a constant gain amplifier
with values of 20k! for each resistor. However, a
conventional line-level input may not have enough gain
for inefficient loudspeakers, especially if they're 8 ohms.
The peak-to-peak voltage for consumer audio line input is
.894 V
PP
and USA professional audio is 3.473 V
PP
15
. Tripath states that for maximum
performance, the input stage gain should be set so that the maximum input signal level
will drive the input stage output to 4V
PP
. In order to provide a balance between the two,
the component values chosen for this design were 28k! for the feedback resistor and
20k! for the input resistor, giving an overall stage gain of 1.4. This is subject to change,
and a final input stage gain will be decided after testing.

The other major section of this stage is the input capacitor. Its purpose is to act as an AC
coupler. As discussed in the previous section, the purpose behind this is to block any DC
components present in the audio input signal. The value for the input capacitor can be
calculated once a value for the input resistor has been determined. This calculation is
performed using the equation:

Given an input resistance of 20k!, the input capacitor value is calculated to be 2.2uF.

In addition, the quality of this component should be taken into consideration, as any
component early in the audio chain will have significant effects on the overall noise
present at the output of the amplifier.

The entire input stage also sets the lower limit of the overall bandwidth in the amplifier
design. The input capacitor and the input resistor set the low frequency pole. Tripath

15
"Line Level," 2011, Wikipedia, 24 Apr. 2011 <http://en.wikipedia.org/wiki/Line-
level>.
recommends that this pole be set below 10Hz. The high-pass cutoff frequency can be
calculated by the same formula below by rearranging it to solve for f
P
:

Finally, the input resistor sets the input impedance in conjunction with the volume
potentiometer seen by the signal source. In order to reduce noise pick-up while also
providing a manageable load to the input source, and potentiometer value of 50k! was
chosen to present an overall input impedance of 70k!.

7. Output Voltage Offset

The output voltage offset stage consists of the trimmer
potentiometer (ROFB), voltage-divider resistors (ROFA
and ROFC), and the decoupling capacitor (COF).

The main purpose behind this circuit sub-section is to
manually trim the DC offset on the output of the
TK2050 power output. The resistors ROFA and ROFC
are set up as a voltage divider in order to limit the DC
offset range allowing for more precise adjustment. The
capacitor (COF) is simply a decoupling capacitor used
to block AC noise interference from the 5V source,
which would ultimately show up at the speaker outputs.

8. Signal Processor

The signal processing stage consists of the
TC2001 signal processor, R54, R53,
RREF, and C7. It should be noted that all
of the recommended values from Tripath
were used, as they are critical to the
TC2001s performance.

The TC2001 integrated circuit houses the
sigma-delta analog-to-digital converter,
which was covered in a previous section.
For a recap, this signal processor is in
charge of amplifying the analog input
signal and converting it to a digital
switching pattern.

The resistors R54 and R53 are used to set
the over/under supply voltage sensing.
R54 is used to set the positive power stage
sensing and R53 is used to set the negative
power stage sensing. Any internal bias
currents will be disabled by locking out the TC2001 when the required voltage level is
above or below these levels.

The reference resistor (RREF) is used to set the internal reference voltage of the TC2001.
Tripath states that this level is about 1.2 VDC.

The operational amplifiers within the TC2001 are set
up as single-ended inputs (see picture on left). This
simply means that one of the inputs is receiving an
input signal, while the other is grounded. In the
TC2001 design, the non-inverting inputs are both
tied to a common ground through C7. One of the
frequent issues associated with single-ended inputs is
common-mode interference. Common-mode noise
is a result of any signal that is common in waveform
and phase on multiple conductors
16
. The value of C7
(BIASCAP) is selected to filter out any common-
mode voltages presented to the input amplifiers
17
.
The value of C7 was not deviated from, as it was
determined by Tripath in order to provide a 2.5 VDC
bias required by the TC2001.

16
G. Randy Slone, The Audiophiles Project Sourcebook (New York: McGraw-Hill,
2002) 294.
17
Tripath Technology, Inc, TK2050 Technical Information (Revision 1.1 October
2002)
9. Mute Control

The mute control stage consists of the MCP101 voltage
supervisory circuit and a decoupling capacitor (C1).

The MicroController MCP101 is an integrated circuit that
provides the TC2001 with a logic high voltage level on
the MUTE pin on power up and power down. This
prevents any thumps or transients from occurring on
the speaker outputs. The purpose of the capacitor is
simply to act as a decoupler. A test circuit was bread
boarded, and the following waveform shows the results
of the test:

The above screenshot shows that the MCP101 provides a logic high voltage level on
power up until it reaches a safe operating voltage level. The MCP101 threshold for this
level is 4.5VDC. Once this value is reached, the output pin produces a logic low voltage
level, which is required to un-mute the TC2001 signal processor.

After all the considerations taken in the design of this amplifier, I noticed that an error
was made in this subsection regarding the proper routing of the decoupling capacitor. As
shown in the schematic, I have it set up as an AC coupling capacitor, which will block
the necessary power supply voltage from entering the integrated circuit. This can be
fixed through the use of a few jumpers, and will be changed in the PCB layout for the
next prototype of this amplifier.

10. Modulator Feedback

The modulator feedback stage consists of feedback resistors
(RFBB and RFBC) and a feedback capacitor (CFB). As shown in
the picture to the left, there are four total feedback lines, as there is
a positive and negative feedback loop for each of the two channels.
The feedback is taken directly from the power output stage before
the output filter. Tripath recommends that this signal be routed
directly from the inductor pins to minimize any noise pick-up

The modulator is responsible for converting the signal from the
input stage to the high-voltage output signal
18
. In order to set the
appropriate gain level for the output signal, both the maximum
power supply voltage (30 VDC) and maximum modulator
feedback level need to be taken into consideration. Tripath states
that the maximum gain into the modulator section should be set to
about 4V
PP
to avoid clipping. Again, this is set by the input gain
stage through the resistors R
I
and R
F
, and is dependent of the input
signal level. The overall amplifier gain is the product of the input
stage gain and modulator stage gain as shown in the following
formula:

By looking at the above formula, it can be determined that the modulator gain is
dependent on the values of R
RBB
and R
FBC
. These values are set through the following
formula:

In this design, the value of V
CC
is 30VDC and the value for R
FBB
was chosen to be 1k!.
Plugging these values into the above formula gives a value of 14k! for the R
FBC
resistor.
Now that all the component values have been calculated, they can be plugged into the
A
VTK2050
gain formula, producing a final gain of 21.

Component selection for this stage is also critical to the overall performance of this stage.
The feedback resistor R
FBC
needs to be selected so that it has a power rating greater than
P
DISS
= V
CC
2
/(2R
FBC
) in order to dissipate enough heat without failure. In the case of this
design, the resistor power rating must be greater than .032W. 1/8-Watt resistors were
picked to meet this requirement.

18
2002)

The feedback delay capacitor C
FB
is responsible for lowering the idle switching
frequency and filtering high frequency noise present in the feedback signal, thus
improving amplifier performance
19
. Tripath states that the value of C
FB
should be offset
so that the idle switching frequency differs by 40 kHz. This is designed to reduce any
crosstalk and noise summation between channels. In this design, values of 390pF and
470pF were used and were based on the Tripath test schematic.

19
2002)
11. Parallel Power Output

The output power stage consists of two TP2050
power slug integrated circuits, and their associated
components. All the component values are critical
to the performance of the TP2050s, and were not
changed or deviated from in this design.

The TP2050 can be set up in two configurations.
For stereo mode, the TP2050 is set up as a dual full
bridge and can drive two 8! speakers with one chip.
The TP2050 can also be configured in parallel as a
single full bridge, which doubles the current
capacity, but requires the use of two chips for stereo
operation (one per channel). This amplifier design
utilizes one TC2001 signal processor to control one
TP2050 in parallel mode per channel, as it offers
impressive performance advantages.

The major decision factor for parallel configuration over stereo configuration was due to
performance factors. The following graphs indicate that the paralleled outputs have a
significant advantage in performance aspects. Furthermore, this set-up allows greater
versatility, as it can power both 8! and 4! loads.

Notice that the continuous power output in parallel (left) offers better performance than
stereo (right).

12. Bypass Filtering

The bypass filter stage for the power
output sections simply consist of a
capacitor (CHBR). The purpose of
these capacitors is to filter out AC noise
from the 30VDC power supply, and to
act as a high-frequency bypass to filter
unwanted switching frequencies. A
bypass capacitor must be placed from
VCC to ground for each of the four
MOSFET transistors in the TP2050. A
50V rating for these capacitors is
required because they are subjected to
the full supply range.

13. Output Filter

The output filter stage consists of output inductors (Lo)
and their corresponding output capacitors (Co), a Zobel
network consisting of a capacitor (CZ) and a resistor
(RZ), and a differential mode capacitor (CDM).

Through-hole for testing and customization

The output filter serves multiple purposes. First of all,
it is responsible for setting the low-pass cutoff
frequency for the amplifiers bandwidth. As stated
previously, the input stage determines the high-pass
cut-off frequency through the input resistor and
capacitor. Likewise, the output filter determines the
low-pass cut-off frequency through a second-order LC
low-pass filter consisting of the output inductor and
capacitor.

This section is also responsible for demodulating the amplified switching pattern from the
output of the TP2050. This acts as a passive filter that averages the output signal in order
to regain the original analog signal. The cutoff frequency and quality factor of the filter
are determined by the formulas:

f
c
= 1/(2!L
O
C
O
) and Q = R
L
C
O
/"L
O
C
O

The cut-off frequency using a 15uH inductor and .22uF capacitor gives a value of
87.6kHz. This will effectively filter out the analog components from the switching signal
while blocking quantization noise from the speaker outputs. Remember that the signal
shaping from the sigma-delta effectively pushes the quantization noise band out of the
audio bandwidth. The quality factor of the amplifier using an 8! and the same inductor
and capacitor values gives a Q of .96. Q is a dimensionless factor used to describe how
under-damped or over-damped a filter is
20
. Damping determines how quickly a signal
decays. In other words, the Q of a filter has a direct effect on the response of the
amplifier. A Q factor less than " is defined as over damped, meaning there is no
oscillation of an input signal and there is a very quick decay of the signal. Conversely, a
Q factor greater than " is defined as over damped, meaning there is possible of some
oscillation and a slower decay.

A major design choice in the output filter was to make all components through-hole.
This facilitates the ability to fine-tune this amplifier for a specific set of speakers. For
example a speaker with an impedance of 4! will behave differently than a speaker with
an impedance of 8!. The above Q value was calculated as .96, which is a slightly under-
damped response. By replacing the load with a set of speakers with a 4! impedance, the
Q factor now becomes .48, which is slightly under-damped. A final output filter Q will
be determined after testing is done with a specific set of speakers.

A second important section within the output filter is the RC Zobel network consisting of
a resistor (R
Z
) and a capacitor (C
Z
). The purpose of a Zobel network is to flatten out the
impedance seen by the amplifier power output stage. This is placed in parallel with the
speaker outputs. This wouldnt be necessary if we were dealing with a purely resistive
load. However, due to the reactive nature of loudspeakers, a consistent impedance is not
presented to the TP2050 input.

Finally, a differential capacitor is placed in parallel with the speaker outputs in order to
filter out any differential currents that may have resulted in the circuit.

20
"Q Factor," 2011, Wikipedia, 30 Apr. 2011
<http://en.wikipedia.org/wiki/Q_factor#Q_factor_and_damping>.

14. Power Stage

The power stage consists
of multiple sections and
filters with specific
purposes. These consist
of power indication,
supply decoupling for
both the 5V and VCC
voltages, a 5V voltage-
regulator, and power supply terminal and switch.

This stage consists mainly of decoupling capacitors and voltage regulator. As discussed
in a previous section, decouplers prevent any AC noise from interfering with the DC
power lines. Electrolytic capacitors were used in conjunction with ceramic capacitor to
provide decoupling for the TC2001 and TP2050 integrated circuits. Electrolytics were
used because they can store extra charge in order to supply any extra current needed for
peak current demands due to musical transients. These were placed as close as possible
to their respective ICs in order to facilitate immediate response. Ceramics were used due
to their ability to filter out any high-frequency content from the switching pattern.
The power indication portion of the power stage consists simply of an LED in series with
a resistor. As soon as power is switched on, a blue LED will light up indication current
flow. The resistor is there to limit the current entering the LED. The LEDs brightness
can be changed simply by replaced the resistor value.

An LM7805 voltage regulator from ST Microelectronics was picked to convert the
30VDC power supply voltage to 5VDC required by the TC2001 input section. This
voltage regulator was chosen for its thermal characteristics and availability. Heat sinking
was a major consideration when picking the voltage regulator case type. 25VDC need to
be dropped in order for the regulator to output 5V from a 30V source. The supply current
for the TC2001 is state in the Tripath specification sheet as 60mA. Therefore, the total
power that needs to be dissipated by the voltage regulator is 25V*60mA = 1.5W. The
LM7805 is available in multiple different packages, and the T0-220 case was picked
because it had the best thermal handling capabilities while taking up a small amount of
space. Just to be safe, a small heat sink rated at 1.5W was added.

A switch was picked that was rated above the 30VDC and 3.3A provided by the power
supply for safety purposes. A diode is going to be placed across the terminals to provide
a path for any current flow held by inductance of the overall circuit to prevent potentially
sparking.

15. Heat Management

Thermal management is incredibly important in amplifier design. The average amplifier
is horribly inefficient, and inefficiency creates heat. Therefore, heat management is
mandatory in order to prevent amplifier and component failure, and to meet safety
standards.

One major benefit of Class-T amplifier design is that it can theoretically reach 100%
efficiency. Like most things, in real life it doesnt quite work out this way. However, a
Class-T amplifier is still capable of achieving significantly higher efficiency than other
amplifier topologies. The following graph shows a realistic efficiency of this amplifier,
and was provided in the Tripath specification sheet:

The above graph shows that this amplifier can realistically achieve an efficiency of
around 90%. So is it really necessary to have heat sinking? This is entirely dependent of
the heat management abilities of the TP2050 integrated circuits. The junction-to-case
thermal resistance of the TP2050 power slug is the major factor determining overall
amplifier performance. The junction-to-case resistance value describes the cases
temperature rise in degrees Celsius relative to each Watt it is called upon to dissipate.
The actual value of the TP2050 is 2.5
o
C/W.

This can be applied to this design by considering the amount of power that needs to be
dissipated as heat. The TP2050 can realistically generate 40W of power per channel.
The power that needs to be dissipated can then be calculated by taking the inverse of the
efficiency and multiplying it by the power output for one channel. This results in a value
of 4 Watts that needs to be dissipated per channel. This would result in only a 10
o
C rise
per channel, for a total rise of 20
o
C. This is a realistic expectation of heat sinking
requirements. Due to the dynamic range of music, even if you pushed the volume of the
amplifier up until you heard considerable distortion from clipping, you still wouldnt be
close to an average power output to the speaker system
21
. This shows that one of the
major benefits of Class-T amplifiers is that it requires very little heat sinking.

In order to take care of the 20
o
C that needs to be dissipated, this amplifier design uses a
combination of conduction, convection, and radiation. This design utilizes an aluminum
plate on the underside of the PCB board, which thermally couples the TP2050s to the
aluminum enclosure. This serves two purposes. First of all, the aluminum plate acts as a
small heat sink in itself. Secondly, because aluminum is a good conductor, it passes the
thermal energy from the TP2050s to the aluminum case. Although the inside of the
enclosure will be above room temperature (25
o
C), it will still offer extra transfer of heat
through convection to the aluminum case. Also, due to large surface area of the
aluminum case, more of the heat will be transferred into the surrounding air by radiation.
Ultimately, this will cause the case to be warm to the touch
22
, and will appropriately
dispel of any heat that needs to be dissipated.

16. Grounding and EMC Considerations

One commonly overlooked factor in the design of circuits and printed circuit boards deals
with proper grounding techniques and its effect on electro-magnetic compatibility. Henry
Ott points out in this design paper Ground A place for Current to Flow
23
, that ground
is an often-neglected portion of circuit design and layout. According to his definition,
ground is considered an equipotential point or plane that serves as a source or sink for
current, and goes on to state that many designers dont actually concern themselves with
the path current takes to return to its source. Performance of a circuit can be significantly
increased if a few simple considerations are taken into account when laying out ground
routes.

The first important consideration for proper grounding deals with the fact that current
naturally returns to its source along the path of lowest impedance. Impedance is
described as an opposition to current flow, and consists of both resistive (real) and
reactive (imaginary) components.

By observing the flow of current from
the picture on the left, we can track the
current as it leaves the source and
passes through the load resistance. But
what happens after the load resistance
is grounded? When presented with
multiple impedance paths, the return
current will take the 1! impedance
path because it is less.

21
G. Randy Slone, The Audiophiles Project Sourcebook (New York: McGraw-Hill,
2002) 280.
22
Winsome Labs, Jay Hennigan. Personal interview. 4 Aug. 2011.
23
Henry Ott, Ground A Place for Current to Flow (New Jersey: Bell Laboratories,
1983) 1.
This simple example can also be directly transferred into circuit board design. Of the two
components dealing with an impedance path, the resistive portion will remain relatively
constant. It can then be concluded that minimizing the impedance is mainly dependent
on reactivity, and the main culprit behind reactive impedance can be directly linked to
ground path inductance.

This concept can be explained by considering the partial inductance of wires. The
formula for partial inductance is shown in the following formula:

in Henries

Although this looks relatively complex, it still tells us two very important things. The
inductive reactance is dependent on both r
w
(the radius of a trace or wire) and on l (length
of the signal path).
It was just shown that inductance is dependent on both trace width and the length of the
signal path. It should also be pointed out that the overall signal path length is determined
by the entire loop area (from source through ground back to source). The above formula
also shows that this loop area has the most significant impact on partial inductance of a
trace or wire. Therefore, allowing the current to return to its sources as locally and
compactly as possible can minimize loop length.

The use of a ground plane is a common solution that maximizes r
w
and minimizes the
loop area. A ground plane can only be used with multi-layer boards, as it is an entire
layer to itself. This has two noteworthy effects on ground loops. The first is that ground
is now a large-radius plane. This will decrease the overall reactive impedance by
increasing r
w
. Secondly, grounding to a plane will provide the signal path with an infinite
amount of possibilities to reach the source in the shortest way possible.

If a ground plane is used in a circuit board design, another important aspect of grounding
needs to be considered. As explained in a previous section, Class-T amplification deals
with both digital and analog signals. Sharing both signal types on the same ground plane
will result in problems as high-level noisy digital signals contaminate low-level analog
signals. Separating the digital ground currents from the analog ground currents is
accomplished through mixed signal partitioning.

One option for separating digital and analog signals is to completely separate the ground
plane layer (shown on left). However, in complex designs such as a Class-T amplifier,
there are many potential problems associated with doing this. The major problem is that
traces cannot be routed over a split in the plane. This would result in an increase in
radiation and crosstalk, and more importantly would result in a massive return loop
24
. As
discussed previously, a larger return loop would result in increased overall inductance,
ultimately affecting the ground loop impedance. A better option for separating the
ground planes is to connect them at a single point (shown on right).

24
Clayton R. Paul, Introduction to Electromagnetic Compatibility (New Jersey: Wiley-
Interscience, 2006) 358.
Henry Ott pointed out that although there is a small connection between the two planes
that it is actually a better layout. First of all, the ground planes are separated. Secondly,
the traces that need to cross planes will not go over a split. Furthermore, Henry went on
to explain that the return signal from the ground loop will not stray into a different
ground plane and introduce noise, but will follow the traces as closely as possible due to
magnetic field intensity created by a trace. All wires (or traces) produce some sort of
magnetic field as current passes through them. The return currents are attracted to these
magnetic fields, and so have a tendency to follow the source trace. The graph below
shows how as return current distribution in a ground plane as a percentage of the current
contained within an x/h distance from the center of the magnetic field produced by a
trace. By considering ground as a low impedance path for a return signal, and applying
the above material to a circuit board design, electromagnetic interference and any other
unwanted radiations can be prevented with no extra cost.

17. PCB Layout

After selecting the components to be used in the design, the printed circuit board (PCB)
layout began. The layout editor that was used in the project was the Easily Applicable
Graphical Layout Editor (EAGLE). All component layout was done to try and adhere to
EMC considerations, placing emphasis on proper grounding and component layout. The
following screenshots document my progress in designing .brd file in EAGLE for a
Class-T prototype. The following section shows my progress from a new .brd file
through my final Tampv23 version. A printout of the power and ground planes were also
added.

4/17/2011 1:23:20 PM f=0.95 \\mtucifs\dfshome\zacarlso\eagle\TAmp Project\Tampv2.brd
+
LEDMUTE
red
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WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
T
P
2
0
5
0
T
P
2
0
5
0
736880-49
736880-49
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
470p
470p
390p
390p
1k
1k
1k
1k
.1uF
1
0
0
u
F
.
1
u
F
.1uF
.
2
2
u
F
.22uF
.22uF
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.1uF
15
15
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.1uF
.1uF
.1uF
.1uF .1uF
.1uF
.1uF .1uF
.1uF .1uF
.1uF
.1uF
10k 10k
10k 10k
1
5
u
H
15uH
1
5
u
H
15uH
7805TV
.1uF .33uF
560uF
.
1
u
F
H1
6
.
2
k
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
T
K
2
0
5
0
T
P
2
0
5
0
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4 C7
C
S
A
L
C
S
C
E
R
CDM2
C
Z
1
CO2
CO1
C
O
3
C
O
4 C
Z
2
CDM1
RZ2
RZ1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C30-2
C14-2
C12-2
C18-2 C18-1
C12-1
C21-1 C21-2
C31-1 C31-2
C30-1
C14-1
R37-1 R37-2
R40-1 R40-2
L
O
1
LO2
L
O
3
LO4
IC1
COIC CIIC
CS1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
4/17/2011 1:26:51 PM f=1.43 \\mtucifs\dfshome\zacarlso\eagle\TAmp Project\Tampv7test.brd
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C
7
C
S
A
L
C
S
C
E
R
CDM2
C
Z
1
CO2
CO1
C
O
3
C
O
4 C
Z
2
CDM1
RZ2
RZ1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
C
S
C30-2
C14-2
C12-2
C18-2 C18-1
C12-1
C21-1 C21-2
C31-1 C31-2
C30-1
C14-1
R37-1 R37-2
R40-1 R40-2
L
O
1
LO2
L
O
3
LO4
IC1
C
O
I
C
C
I
I
C
C
S
1
C1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
4/17/2011 1:27:07 PM f=1.43 \\mtucifs\dfshome\zacarlso\eagle\TAmp Project\Tampv8.5.brd
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C 1 8 - 1
C
1
2
-
1
C 2 1 - 1
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 1
R
3
7
-
2
R 4 0 - 1
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
CDM2
C
Z
1
CO2
CO1
C
O
3
C
O
4 C
Z
2
CDM1
RZ2
RZ1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
C
S
L
O
1
LO2
L
O
3
LO4
IC1
C
O
I
C
C
I
I
C
C
S
1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C 1 8 - 1
C
1
2
-
1
C 2 1 - 1
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 1
R 3 7 - 2
R 4 0 - 1
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
CDM2
C
Z
1
CO2
CO1
C
O
3
C
O
4 C
Z
2
CDM1
RZ2
RZ1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
C
S
L
O
1
LO2
L
O
3
LO4
IC1
C
O
I
C
C
I
I
C
C
S
1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
CDM2
C
Z
1
CO2
CO1
C
O
3
C
O
4 C
Z
2
CDM1
RZ2
RZ1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
C
S
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
L
O
1
LO2
L
O
3
LO4
IC1
C
O
I
C
C
I
I
C
C
S
1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
CDM2
C
Z
1
CO2
CO1
C
O
3
C
O
4 C
Z
2
CDM1
RZ2
RZ1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
C
S
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
L
O
1
LO2
LO3
L
O
4
IC1
C
O
I
C
C
I
I
C
C
S
1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
CDM2
C
Z
1
CO2
CO1
C
O
3
C
O
4 C
Z
2
CDM1
RZ2
RZ1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
C
S
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
L
O
1
LO2
LO3
L
O
4
IC1
C
O
I
C
C
I
I
C
C
S
1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
l
u
e
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
IC1
C
O
I
C
C
I
I
C
CS1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
4/17/2011 1:30:15 PM \\mtucifs\dfshome\zacarlso\eagle\TAmp Project\Tampv12.brd
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
SWPWR
CI2- CI2+
CI1+ CI1-
+
L
E
D
V
C
C
b
lu
e
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I1
R
I2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
IC1
C
O
I
C
C
I
I
C
CS1
C
1
HEATSINK
R
V
C
C
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
IC1
C
O
I
C
C
I
I
C
CS1
C
1
HEATSINK
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7805TV
.
1
u
F
.
3
3
u
F
560uF
.
1
u
F
H1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
SWGND
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3 RCA4
RCA2 RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
LO3
L
O
4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
15uH
1
5
u
H
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
L
O
3
LO4
I
C
1
COIC
CIIC
CS1
C
1
H
E
A
T
S
I
N
K
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
JUMPER
JUMPER1
JUMPER2
JUMPER3
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
1
5
u
H
15uH
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
H
1
6.2k
T
P
2
0
5
0
T
P
2
0
5
0
5
0
0
k
5
0
0
k
5
0
0
k
5
0
0
k
.
1
u
F
.
1
u
F
4 7 0 p
4 7 0 p
3 9 0 p
3 9 0 p
1 k
1 k
1 k
1 k
. 1 u F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
.
1
u
F
.
1
u
F
. 1 u F
.
1
u
F
1 0 k
1
0
k
T
K
2
0
5
0
T
P
2
0
5
0
R
O
F
A
1
R
O
F
A
2
R
O
F
C
2
R
O
F
C
1
C
O
F
1
C
O
F
2
C F B 1
C F B 2
C F B 3
C F B 4
R F B B 1
R F B B 2
R F B B 3
R F B B 4
C 3 0 - 2
C
1
4
-
2
C
1
2
-
2
C 1 8 - 2
C
2
1
-
2
C
3
1
-
1
C
3
1
-
2
C 3 0 - 1
C
1
4
-
1
R 3 7 - 2
R
4
0
-
2
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3
RCA4
RCA2
RCA1
T
C
2
0
0
1
ROFB1
ROFB2
R
I
1
R
I
2
R
F
1
R
F
2
R
5
3
R
R
E
F
R
5
4
RFBC1
RFBC2
RFBC3
RFBC4
C7
C
S
A
L
C
S
C
E
R
C
D
M
2
C
Z
1
C
O
2
C
O
1
C
O
3
C
O
4
C
Z
2
C
D
M
1
R
Z
2
R
Z
1
CHBR1
CHBR2
CHBR3
CHBR4
CHBR5
CHBR8
CHBR6
CHBR7
CS
C
1
8
-
1
C
1
2
-
1
C21-1
R
3
7
-
1
R
4
0
-
1
LO1
L
O
2
L
O
3
LO4
I
C
1
COIC
CIIC
CS1
C
1
RVCC
WIPER1 WIPER2
GROUND1 GROUND2
INPUT1 INPUT2
JUMPER
JUMPER1
JUMPER2
JUMPER3
T
C
2
0
0
1
2
0
k
2
0
k
2
8
k
2
8
k
1
1
k
8
.
2
k
2
2
k
.1uF
1
0
0
u
F
.
1
u
F
.
1
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
2
2
u
F
.
1
u
F
1
5
1
5
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
.1uF
560uF
.
1
u
F
.
1
u
F
.1uF
1
0
k
1
0
k
15uH
1
5
u
H
1
5
u
H
15uH
7
8
0
5
T
V
.1uF
.33uF
560uF
.
1
u
F
6.2k
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3
RCA4
RCA2
RCA1
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3
RCA4
RCA2
RCA1
1
2
3
M
C
P
1
0
1
M
C
P
1
0
1
CH1-
CH1+
CH2+
CH2-
SLEEVE
TIP
SLEEVESHUNT
SWVCC
VCC
CI2- CI2+
CI1+ CI1-
+
LEDVCC
blue
RCA3
RCA4
RCA2
RCA1
1
2
3

18. Costs and Parts List

The parts list for this project was too extensive too put into a document in this report.
Eventually, the Excel sheet will be available on a Wordpress blog that is currently being
designed. Until then, please take note of the attached Excel sheet to view all the
component list. This will include information regarding retailers, manufacturers, and
EAGLE library part numbers. You can also contact the designer at zacarlso.mtu.edu for
more information.

The final cost of this project (including shipping) was:

19. Performance and Testing

This section will be filled out once the amplifier is fully built.

20. Bibliography
Beis, Uwe, An Introduction to Delta Sigma Converters, 2008, Electronics, 18 Apr. 2011
<http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html>.

Coloms, Martin, Piece de Resistance, 1996, SAS Audio Labs, 24 Apr. 2011
<http://www.sasaudiolabs.com/resistor.htm>.

Gee, Tony, Capacitor Test, 2011, Creative Commons, 24 Apr. 2011

Hennigan, Jay, Winsome Labs. Personal interview. 4 Aug. 2011.

Kester, Walt, ADC Architectures III: Sigma-Delta ADC Basics, 2009, Analog Devices, MT-
022 Tutorial.

Ott, Henry, Ground A Place for Current to Flow (New Jersey: Bell Laboratories, 1983).

Paul, R. Clayton, Introduction to Electromagnetic Compatibility (New Jersey: Wiley-
Interscience, 2006).

Ross, Kevin, The Basics, 2009, Creative Commons, 24 Apr. 2011
<http://www.seattlerobotics.org/encoder/jun97/basics.html>.

Slone, G. Randy, The Audiophiles Project Sourcebook (New York: McGraw-Hill, 2002).

Stutz, Michael, Practical Considerations of ADC Circuits, 2000, Design Science Liscense, 18
Apr. 2011 <http://www.allaboutcircuits.com/vol_4/chpt_13/10.html>.

Tripath Technology, Inc, TK2050 Technical Information (Revision 1.1 October 2002).

"Q Factor," 2011, Wikipedia, 30 Apr. 2011
<http://en.wikipedia.org/wiki/Q_factor#Q_factor_and_damping>.


"Decoupling Capacitor," 2011, Wikipedia, 24 Apr. 2011
<http://en.wikipedia.org/wiki/Decoupling_capacitor>.

"Digital Signals," 2011, Wikipedia, 18 Apr. 2011 <http://en.wikipedia.org/wiki/Digital_signal>.

"Line Level," 2011, Wikipedia, 24 Apr. 2011 <http://en.wikipedia.org/wiki/Line-level>.

Sigma-Delta ADC Tutorial, 2011, Analog Devices, 18 Apr. 2011
<http://designtools.analog.com/dt/sdtutorial/sdtutorial.html>.

21. Appendix

Tr i pat h TechnoI ogy, I nc. - Techni caI I nf or mat i on
!
1 TK2050 SB/1.0/8-02
!

TK2050
STEREO 50W (8:) CLASS-T" DIGITAL AUDIO AMPLIFIER
DRIVER USING DIGITAL POWER PROCESSING (DPP")
TECHNOLOGY

T e c h n i c a I I n f o r ma t i o n Re vi s i o n 1 . 1 - Oc t o b e r 2 0 0 2
!" #" $%& ' (" ) *$+ , - + .#'
The TK2050 ( TC2000/ TP2050 c hi ps et ) i s a 50W c ont i nuous av er age power per
c hannel , Cl as s - T Di gi t al Audi o Power Ampl i f i er us i ng Tr i pat h' s pr opr i et ar y Di gi t al
Power Pr oc es s i ng
T M
t ec hnol ogy . Cl as s - T ampl i f i er s of f er bot h t he audi o f i del i t y of
Cl as s - AB and t he power ef f i c i enc y of Cl as s - D ampl i f i er s . The per f or manc e of t he
TK2050 i s s i mi l ar t o t he TK2051, but t he TP2050 dr i v er us ed i n t he TK2050 i s a
t her mal l y enhanc ed PSOP pac k age, whi c h pr ov i des f or a mor e ef f ec t i v e and
f l ex i bl e heat r emov al s ol ut i on.

%, , & + *%- + .#) ' ' ' '
5.1-Channel DVD
Mini/Micro Component Systems
Home Theater
Stereo applications (6 / 8)
Mono applications (4)
/" #" 0 + - ) '
Single Supply Operation
Very High Efficiency
Wide Dynamic Range
Compact layout
0 " %- 1$" ) '
Class-T Architecture
High Output power
35W @ 6: < 1% THD+N
50W @ 8:, < 3% THD+N
117W @ 4:, < 10.0% THD+N
(paralleled outputs)
Audiophile Quality Sound
0.007% THD+N @ 30W 8:
0.005% THD+N @ 70W 4:
(paralleled outputs)
High Efficiency
92% @ 60W 8
85% @ 46W 6
89% @ 117W 4paralleled outputs)
Dynamic Range >100 dB

!
2 TK2050 SB/1.0/8-02
!"# $% &' ( ) *!+, *&*) -!' , ./# ) 0 ) ' 12 3 3 3 ) (Note 1)
SYMBOL PARAMETER VaIue UNITS
V5 5V Power Supply 6 V
Vlogic nput Logic Level V5+0.3V V
TA Operating Free-air Temperature Range -40 to 85 C
TSTORE Storage Temperature Range -55 to 150 C
TJMAX Maximum Junction Temperature 150 C
ESDHB ESD Susceptibility Human Body Model (Note 2), all pins

2000

V
!
)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
See the table below for Operating Conditions.
Note 2: Human body model, 100pF discharged through a 1.5K: resistor.

!"# $% &' ( ) *!+, *&*) -!' , ./# ) 0 ) ' 4 2 3 5 3 ) (Note 1)
VCC Power Supply 40 V
Vlogic nput Logic Level 5.5 V
TA Operating Free-air Temperature Range 0 to 70 C
TSTORE Storage Temperature Range -40 to 150 C
TJMAX Maximum Junction Temperature 150 C
ESDHB ESD Susceptibility Human Body Model (Note 2), all pins

2000

V
!
) )
$4 ( -!' , ./) 1$.6, ' , $.# ) 0 ) ' 12 3 3 3 ) (Note 1)
SYMBOL PARAMETER MIN. TYP. MAX. UNITS
V5

Supply Voltage 4.5 5 5.5 V
V
H
Logic nput High V5-1.0 V
V
LO
Logic nput Low 1 V
T
A
Operating Temperature Range -40 25 85 C
!
)
$4 ( -!' , ./) 1$.6, ' , $.# ) 0 ) ' 4 2 3 5 3 ) (Note 1))
VCC Power Supply 10 36 V
VH Logic nput High bias/10 + 500mV V
VLO Logic nput Low bias/5 + 1V V
TA Operating Temperature Range 0 25 70 C
!
)
' 7( -*!% ) 17!-!1' ( -, # ' , 1#
)
'12333)
TJA Junction-to-ambient Thermal Resistance (still air) 80 C/W
!

'42353))
TJC
Junction-to-case Thermal Resistance 2.5 C/W
!

!
3 TK2050 SB/1.0/8-02
! " ! #$ %& #'" ( #)'%'#$ ! %& * $ & #* ( + ( $ #, - - - (
5

Supply Current 60 mA
fsw Switching Frequency 650 kHz
V
N
nput Sensitivity 0 1.5 V
V
OUTH
High Output Voltage V5-0.5 V
V
OUTLO
Low Output Voltage 100 mV
R
N
nput mpedance 2 k
:

nput DC Bias 2.5 V
!
(
! " ! #$ %& #'" ( #)'%'#$ ! %& * $ & #* ( + ( $ . , - / - ( (
T
A
= 25 qC. See Application/Test Circuit. Unless otherwise noted, the supply voltage is V
CC
= 28V.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS
q
Quiescent Current
(No load, Mute = 0V)
VCC = +28V
V5 = 5V

125
27

60
mA
mA
MUTE
Mute Supply Current
(No load, Mute = 5V)
VCC = +31V
V5 = 5V

28
7

mA
mA
VH High-level input voltage (MUTE) H = See Mute Control Section 3.5 V
VL Low-level input voltage (MUTE) L = See Mute Control Section 1.0 V
SC Short-circuit current limit VCC = +30V, T=25
o
C 3.5 5 6.5 A
!

. ! %0 1%2'3#! ( #)'%'#$ ! %& * $ & #* ( + ( $ 4, - / - (
T
A
= 25 qC. Unless otherwise noted, V
CC
= 30V, f=1kHz, and the measurement bandwidth is 20kHz.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS
POUT Output Power
(Continuous Average/Channel)
(Note 13)
VCC = +30V, RL = 8:
THD+N < 0.01%
THD+N < 3.0%
THD+N < 10.0%
VCC = +23.5V, RL = 6:
THD+N < 0.05%
THD+N < 5.0%
THD+N < 10.0%
VCC = +30V, RL = 4: (par. output)
THD+N < 0.01%
THD+N < 10%

30
50
60

30
40
45

75
117

W
W
W

W
W
W

W
W
THD + N Total Harmonic Distortion Plus
Noise
POUT = 40W/Channel, RL = 8:
VCC = +30V
VCC = +23.5V
0.03

0.03

%

%
HF-M HF ntermodulation Distortion 19kHz, 20kHz, 1:1 (HF), RL = 8:
POUT = 30W/Channel
0.05 %
SNR Signal-to-Noise Ratio A-Weighted
0dB = 50W/Channel, RL = 8:
103 dB
CS Channel Separation 0dB = 10W, RL = 8:, f=1kHz 95 dB
AV Amplifier Gain POUT = 10W/Channel, RL = 8:,
See Application / Test Circuit
15 V/V
AVERROR Channel to Channel Gain Error POUT = 10W/Channel, RL = 8:
See Application / Test Circuit
0.5 dB
K Power Efficiency POUT = 60W/Channel, RL = 8:
92
85
%
%
eN Output Noise Voltage A-Weighted, input AC grounded 135 PV
!

!
4 TK2050 SB/1.0/8-02
! "# $ $ $ % &'() *% + ) ,-&. % / 0*"1 + + *0% / ) -% (1 + "0) / ! ) *-+ %

Pin Function Description
1 BASCAP
Bandgap reference times two (typically 2.5VDC). Used to set the common mode voltage
for the input op amps. This pin is not capable of driving external circuitry.
2, 6 FDBKP2, FDBKP1 Positive switching feedback.
3 DCMP
nternal mode selection. This pin must be grounded for proper device
operation.
4, 7 FDBKN2, FDBKN1 Negative switching feedback.
5 VPWR Test pin. Must be left floating.
8 HMUTE
Logic output. A logic high indicates both amplifiers are muted, due to the mute pin state, or
a "fault.
9, 12 Y1, Y2 Non-inverted switching modulator outputs.
10, 11 Y1B, Y2B nverted switching modulator outputs.
13 NC No connect
14 OCD2 Over Current Detect.
15 REF nternal reference voltage; approximately 1.2 VDC.
16 OCD1
Over Current Detect. This pin must be grounded for proper device
operation.
17 VnnSense Negative power stage over/under supply voltage sense resistor tie point.
18 OVRLDB A logic low output indicates the input signal has overloaded the amplifier.
19 VppSense Positive power stage over/under supply voltage sense resistor tie point.
20 AGND Ground
21 V5 5 Volt power supply input.
22, 27 OAout1, OAout2 nput stage output pins.
23, 28 Nv1, Nv2
Single-ended inputs. nputs are a "virtual ground of an inverting opamp with
approximately 2.4VDC bias.
24 MUTE
When set to logic high, both amplifiers are muted and in idle mode. When low (grounded),
both amplifiers are fully operational. f left floating, the device stays in the mute mode.
Ground if not used.
25, 26 BBM0, BBM1 Break-before-make timing control to prevent shoot-through in the output FETs.
!
!
! "# $ $ $ % &'() *% + ) ,-&. % / 0*"1 + + *0% / ) -*'! %
!
BASCAP
FDBKP2
DCMP
FDBKN2
VPWR
FDBKP1
FDBKN1
HMUTE
Y1
Y1B
Y2B
Y2
NC
OCD2
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
REF
OCD1
VnnSENSE
OVRLDB
VppSENSE
AGND
V5
OAout1
Nv1
MUTE
BBM1
BBM0
OAout2
Nv2

!
5 TK2050 SB/1.0/8-02
! " # $ % $ & " '() *& + ! ,-) & " . /& 0) + 1*. " ! . '/+ &

Pin Function Description
1 GND-SUB Substrate ground
35,36 VccSign Signal positive supply
15 Vcc1A Positive supply
12 Vcc1B Positive supply
7 Vcc2A Positive supply
4 Vcc2B Positive supply
14 GND1A Negative supply
13 GND1B Negative supply
6 GND2A Negative supply
5 GND2B Negative supply
16,17 OUT1A Output half bridge 1A
10,11 OUT1B Output half bridge 1B
8,9 OUT2A Output half bridge 2A
2,3 OUT2B Output half bridge 2B
29 N1A nput of half bridge 1A
30 N1B nput of half bridge 1B
31 N2A nput of half bridge 2A
32 N2B nput of half bridge 2B
21,22 Vdd 5V regulator referenced to ground
33,34 Vss 5V regulator referenced to Vcc
25 PWRDN Stand-by pin
26 TR-STATE Hi-Z pin
27 FAULT Fault output
24 CONFG Config input
28 TH-WAR Thermal warning output
19 GND-clean Logic ground
23 BAS Logic high voltage
18 NC Not connected
20 GND-Reg Ground for Vdd regulator

&
! " # $ % $ & " '() *& + ! ,-) & " . /'2!
(Top view with heat slug up)

OUT2B
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT2A
OUT1B
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
OUT1A
NC
GNDSUB 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18 GNDCLEAN
GNDREG
BAS
CONFG
PWRDN
TRSTATE
FAULT
TH_WAR
N1A
N1B
N2A
N2B
VSS
VSS
VCCSGN
VCCSGN
VCC
VCC
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36

!
6 TK2050 SB/1.0/8-02
!" " # $ %!& $ '() * ) & + , & ) -$ !./!0, )

Inputs and TC2000

ROFA
500K
COF
.1u;50V
RFBC
14K;1%
RFBB
1.0K;1%
V5
R
20K
C7
.1u;50V
ROFA
500K
RFBB
1.0K;1%
OUT1A
CFB
IN2
TC2000
IN1
ROFA
500K
ROFA
500K
CFB
470p;50V
ROFB
5K
1
3
2
R54
22K
!
C
2.2u;10V
V5
RFBC
14K;1%
RF
20K
!
C
2.2u;10V
CFB
390p;50V
COF
.1u;50V
RF
20K
R53
11K
OUT2A
CS
.1u;50V
14K;1%
RFBB
1.0K;1%
R
20K
ROFB
5K
1
3
RFBC
14K;1%
V5
J10
RCA_RT_ANG
1
2
1
2
RREF
8.2K
CFB
390p;50V
OUT1B
JP
JUMPER
1 2
J9
RCA_RT_ANG
1
2
1
2
CS
100u;16V
RFBB
1.0K;1%
OUT2B
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Y1B
HMUTE
Y1
Y2B
Y2
RFBC
470p;50V
REF
OCD0
VLO
OVRLDB
VH
GND
V5
VP1
N1
MUTE
BBM2
BBM1
VP2
N2
V5
!
V5
BASCAP
FDBKP2
DCMP
FDBKN2
VPWR
FDBKP1
FDBKN1
HMUTE
Y1
Y1B
Y2B
Y2
NC
OCD1
V5

TP2050 and Outputs

R
SN
(note 1)
20;1/4W
L
O
15u
R
Z
15;1W
R
SN
(note 1)
20;1/4W
15u
Y2B
VCC
C18
.1u
OUT1N
C30
.1u
C
HBR
.1u;50V
M3
M2
M4
M5
M15
M17
M14
M16
PROTECTON
&
LOGC
REGULATORS
U2
TP2050
.1u;50V
C21
.1u
15u
R37
10K
C31
.1u
OUT2B
VCC
VCC
.1u;50V
OUT1P
C14
.1u
C
Z
.22u;50V
R40
10K
SPEAKER
OUT2A
15u
C
DM
.1u;100V
C
O
.22u;50V
C
SN
(note 1)
330p;100V;NPO
C
SN
(note 1)
330p;100V;NPO
VCC
OUT1B
VCC
!
C
S
560u;50V
Y1
.1u;50V
.22u;50V
Y2
Y1B
C12
.1u
V5
1
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
OUT1A
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
OUT2B
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT2A
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
OUT1A
OUT1B
GNDSUB
NC
GNDCLEAN
GNDREG
VDD
VDD
BAS
CONFG
PWRDN
TRSTATE
FAULT
TH_WAR
N1A
N1B
N2A
N2B
VSS
VSS
VCCSGN
VCCSGN
C
O
L
O
L
O
L
O
C
HBR
C
HBR
C
HBR
1000p;50V
1000p;50V
R
Z
15;1W
OUT2N
OUT2P
C
Z
.22u;50V
SPEAKER
C
DM
.1u;100V
C
O
.22u;50V
.22u;50V
C
O
1000p;50V
C
CASE
(note 2)
1000p;50V
NOTE 1: C
SN
/R
SN
are optional locations, loaded only if required to reduce overshoot
NOTE 2: C
CASE
(4 locations) represent bypass capacitors mounted at the exit of the speaker cable from the cabinet. They are optional and
are used for EM supression. Lead lengths on these components must be kept short to be effective. They are shown in this schematic for
reference.
C
CASE
(note 2)
C
CASE
(note 2)
C
CASE
(note 2)

!
7 TK2050 SB/1.0/8-02
!" " # $ %!& $ '() * ) & + , & ) -$ !./!0, ) 1 '/) " !/!# # + # ) '" + /!& $ '()
)
nputs and TC2000

COF
.1u;50V
RFBC
14K;1%
R
20K
C7
.1u;50V
ROFA
500K
RFBB
1.0K;1%
TC2000
ROFA
500K
ROFB
5K
1
3
2
R54
22K
V5
RFBC
14K;1%
RF
20K
!
C
2.2u;10V
CFB
390p;50V
R53
11K
OUT2A
CS
.1u;50V
RFBB
1.0K;1%
V5
J10
RCA_RT_ANG
1
2
1
2
RREF
8.2K
CFB
390p;50V
JP
JUMPER
1 2
CS
100u;16V
OUT2B
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
HMUTE
Y2B
Y2
REF
OCD0
VLO
OVRLDB
VH
GND
V5
VP1
N1
MUTE
BBM2
BBM1
VP2
N2
V5
!
V5
BASCAP
FDBKP2
DCMP
FDBKN2
VPWR
FDBKP1
FDBKN1
HMUTE
Y1
Y1B
Y2B
Y2
NC
OCD1
V5
RFBD
RFBD
40K
40K

TP2050 and outputs

NOTE 1: C
SN
/R
SN
are optional locations, loaded only if required to reduce overshoot
NOTE 2: C
CASE
(4 locations) represent bypass capacitors mounted at the exit of the
speaker cable from the cabinet. They are optional and are used for EM supression.
Lead lengths on these components must be kept short to be effective. They are shown
in this schematic for reference.
VCC
C18
.1u
C30
.1u
C
HBR
.1u;50V
M3
M2
M4
M5
M15
M17
M14
M16
PROTECTON
&
LOGC
REGULATORS
U2
TP2050
.1u;50V
C21
.1u
R37
10K
C31
.1u
VCC
VCC
.1u;50V
C14
.1u
R40
10K
VCC
Y2
.1u;50V
Y2B
C12
.1u
V5
1
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
OUT2B
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT2A
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
OUT1A
OUT1B
GNDSUB
NC
GNDCLEAN
GNDREG
VDD
VDD
BAS
CONFG
PWRDN
TRSTATE
FAULT
TH_WAR
N1A
N1B
N2A
N2B
VSS
VSS
VCCSGN
VCCSGN
C
HBR
C
HBR
C
HBR
VCC
!
C
S
560u;50V
L
O
15u
15u
L
O
SPEAKER
R
Z
15;1W
C
Z
.22u;50V
20;1/4W
C
SN
(note1)
330p;100V;NPO
1000p;50V
1000p;50V
C
CASE
(note 2)
C
CASE
(note 2)
C
DM
.1u;100V
C
O
.22u;50V
C
O
.22u;50V
OUT2B
OUT2A
R
SN
(note1)
OUT2P
OUT2N

)
)
!
8 TK2050 SB/1.0/8-02
! "# ! $%&' ( )*+, *%! %# - ( .! - )$/ , # / *% (Refer to the Application/Test Circuit)

Component Description
R
nverting input resistance to provide AC gain in conjunction with R

F
. This input is
biased at the BASCAP voltage (approximately 2.5VDC).
R
F
Feedback resistor to set AC gain in conjunction with R
. Please refer to the Amplifier

Gain paragraph, in the Application nformation section.
C
AC input coupling capacitor, which, in conjunction with R
, forms a high pass filter at

) C R 2 ( 1 f
C
S
.
R
FBB
Feedback divider resistor connected to AGND. The value of this resistor depends
on the supply voltage setting and helps set the TK2050 gain in conjunction with R
,

R
F,
R
FBA,
and R
FBC
. Please see the Modulator Feedback Design paragraphs in the
Application nformation Section.
R
FBC
Feedback resistor connected from either the OUT1A/OUT2A to FDBKP1/FDBKP2
or OUT1B/OUT2B to FDBKN1/FDBKN2. The value of this resistor depends on the
supply voltage setting and helps set the TK2050 gain in conjunction with R
,
R
F,
R
FBA,

and R
FBB
. t should be noted that the resistor from OUT1/OUT2 to
FBKOUT1/FBKOUT2 must have a power rating of greater than
) (2R VPP P FBC
2
DSS
.
Please see the Modulator Feedback Design paragraphs in the Application
nformation Section.
C
FB
Feedback delay capacitor that both lowers the idle switching frequency and filters
very high frequency noise from the feedback signal, which improves amplifier
performance. The value of C
FB
should be offset between channel 1 and channel 2
so that the idle switching difference is greater than 40kHz. Please refer to the
Application / Test Circuit.
R
OFB
Potentiometer used to manually trim the DC offset on the output of the TK2050.
R
OFA
Resistor that limits the manual DC offset trim range and allows for more precise
adjustment.
R
REF
Bias resistor. Locate close to pin 15 and ground at pin 20.
C
S
Supply decoupling for the power supply pins. For optimum performance, these
components should be located close to the TC2000/TP2050 and returned to their
respective ground as shown in the Application/Test Circuit.
C
Z
Zobel capacitor, which in conjunction with R
Z
, terminates the output filter at high
frequencies. Use a high quality film capacitor capable of sustaining the ripple current
caused by the switching outputs.
R
Z
Zobel resistor, which in conjunction with C
Z
, terminates the output filter at high
frequencies. The combination of R
Z
and C
Z
minimizes peaking of the output filter
under both no load conditions or with real world loads, including loudspeakers which
usually exhibit a rising impedance with increasing frequency. The recommended
power rating is 1 Watt.
L
O
Output inductor, which in conjunction with C
O
, demodulates (filters) the switching
waveform into an audio signal. Forms a second order filter with a cutoff frequency
of ) C L 2 ( 1 f
O O C
S and a quality factor of
O O O L
C L C R Q .
C
O

Output capacitor, which in conjunction with L
O
, demodulates (filters) the switching
waveform into an audio signal. Forms a second order low-pass filter with a cutoff
frequency of ) C L 2 ( 1 f
O O C
S and a quality factor of
O O O L
C L C R Q . Use
a high quality film capacitor capable of sustaining the ripple current caused by the
switching outputs. Electrolytic capacitors should not be used.
C
HBR
High-frequency bypass capacitor for V
CC
GND on each supply pin. A 50V rating is
required for this component.
C
SN
Optional snubber capacitor, which in conjunction with R
SN
, reduces overshoot on
non-optimal layouts. Only required if switching output overshoot is above rated
voltage of TP2500. Use low-dissipation type (NPO).
R
SN
Optional snubber resistor, which in conjunction with C
SN
, reduces overshoot on non-
optimal layouts. Only required if switching output overshoot is above rated voltage
of TP2500. Required Watt rating.
C
DM
Differential mode capacitor.
!
9 TK2050 SB/1.0/8-02
! "# $ %&' ( # ) *+ ,*-&.%) ( %/&*&%! ) *$ 0 ! $ %0 (
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
2 100 5 10 20 50
Output Power (W)
T
H
D
+
N

(
%
)
THD+N vs Output Power
f = 1kHz
RL= 6:
VDD=23.5 V
AES 17 Filter
1
(
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
2 100 5 10 20 50
Output Power (W)
T
H
D
+
N

(
%
)
THD+N vs Output Power
f = 1kHz
RL= 8:
VDD=30V
AES 17 Filter
1
(
0.0005
1
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
20 20k 50 100 200 500 1k 2k 5k 10k
Frequency (Hz)
T
H
D
+
N

(
%
)
THD+N vs Frequency
Po = 10W/ch
RL = 6:
Vcc=23.5V
BW = 22kHz
(
0.0005
1
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
20 20k 50 100 200 500 1k 2k 5k 10k
Frequency (Hz)
T
H
D
+
N

(
%
)
THD+N vs Frequency
Po = 10W/ch
RL = 8:
Vcc=30V
BW = 22kHz
(
-140
+0
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
20 20k 50 100 200 500 1k 2k 5k 10k
Frequency (Hz)
A
m
p
l
i
t
u
d
e

(
d
B
r
)
ntermodulation Distortion
19kHz, 20kHz 1:1
Po = 16.6W/ch, 6:
0dBr = 10.0Vrms
Vcc=23.5V
BW = 22Hz - 30kHz
(
-140
+0
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
20 20k 50 100 200 500 1k 2k 5k 10k
Frequency (Hz)
A
m
p
l
i
t
u
d
e

(
d
B
r
)
ntermodulation Distortion
19kHz, 20kHz 1:1
Po = 12.5W/ch, 8 :
0dBr = 10.0Vrms
Vcc=30V
BW = 22Hz - 30kHz
(
(
!
10 TK2050 SB/1.0/8-02
! "# $ %&' ( # ) *+ ,*-&.%) ( %/&*&%! ) *$ 0 ! $ %0 ( !"#$%&'((
0
10
20
30
40
50
60
70
80
90
100
0 5 10 15 20 25 30 35 40 45 50 55 60
Output Power (W)
E
f
f
i
c
i
e
n
c
y

(
%
)
Vcc=23.5V
RL = 6:
AES 17 Filter
THD+N < 10%
Efficiency vs Output Power
(
0
10
20
30
40
50
60
70
80
90
100
0 5 10 15 20 25 30 35 40 45 50 55 60
Output Power (W)
E
f
f
i
c
i
e
n
c
y

(
%
)
Vcc=30V
RL = 8:
AES 17 Filter
THD+N < 10%
Efficiency vs Output Power
(
Channel Separation versus Frequency
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
30 20k 50 100 200 500 1k 2k 5k 10k
Hz
d
B
r
A
0dBr = 7.75V
BW = 22Hz - 20kHz(AES17)
S V = 23.5V
R
L
= 6:
(
Channel Separation versus Frequency
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
30 20k 50 100 200 500 1k 2k 5k 10k
Hz
d
B
r
A
0dBr = 8.95V
BW = 22Hz - 20kHz(AES17)
S V = 30V
R
L
= 8:
(
1 2 5 10 100 50 20 200
0.001
10
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
T
H
D
+
N

(
%
)
THD+N vs Output Power (paralleled outputs)
Vcc=30V
RL = 4
AES 17 Filter
f=1kHz
Output Power (W)
:
(
0
10
20
30
40
50
60
70
80
90
100
0 10 20 30 40 50 60 70 80 90 100 110 120
Output Power (W)
E
f
f
i
c
i
e
n
c
y

(
%
)
Vcc=30V
RL = 4:
AES 17 Filter
THD+N < 10%
Efficiency vs Output Power (paralleled outputs)
(
(
!
11 TK2050 SB/1.0/8-02

!" " # $ %!& $ '() $ (* '+,!& $ '()
TK2050 Basi c AmpI i f i er Oper at i on

The TC2000 is a 5V CMOS signal processor that amplifies the audio input signal and converts the
audio signal to a switching pattern. This switching pattern is spread spectrum with a typical idle
switching frequency of about 700kHz. The switching patterns for the two channels are not
synchronized and the idle switching frequencies should differ by at least 40kHz to avoid increasing
the audio band noise floor. The idle frequency difference can be accomplished by offsetting the value
of C
FB
for each channel. Typical values of C
FB
are 470pF for channel 1 and 390pF for channel 2.

The TP2050 is a MOSFET output stage that level-shifts the signal processor's 5V switching patterns
to the power supply voltages and drives the power MOSFETs. The power MOSFETs are N-channel
devices configured in full-bridges and are used to supply power to the output load. The outputs of the
power MOSFETs must be low pass filtered to remove the high frequency switching pattern. A
residual voltage from the switching pattern will remain on the speaker outputs when the
recommended output LC filter is used, but this signal is outside of the audio band and will not affect
audio performance.

Ci r cui t Boar d Layout

The TK2050 is a power (high current) amplifier that operates at relatively high switching frequencies.
The output of the amplifier switches between VPP and VNN at high speeds while driving large
currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the
amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads,
the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the
output inductance. To avoid subjecting the TK2050 to potentially damaging voltage stress, it is critical
to have a good printed circuit board layout. t is recommended that Tripath's layout and application
circuit be used for all applications and only be deviated from after careful analysis of the effects of any
changes.

The following components are important to place near their associated TC2000/TP2050 pins and are
ranked in order of layout importance, either for proper device operation or performance
considerations.

!" The capacitors C
HBR
provide high frequency bypassing of the amplifier power supplies and
will serve to reduce spikes across the supply rails. C
HBR
should be kept within 1/8 (3mm)
of the VCC pins. Please note that the four VCC pins must be decoupled separately. n
addition, the voltage rating for C
HBR
should be 50V as this capacitor is exposed to the full
supply range. Similarly, capacitor C
S
(one place) should be located as close as possible to
the V
CC
pins on TP2050.

!" C
FB
removes very high frequency components from the amplifier feedback signals and
lowers the output switching frequency by delaying the feedback signals. n addition, the
value of C
FB
is different for channel 1 and channel 2 to keep the average switching
frequency difference greater than 40kHz. This minimizes in-band audio noise.

!" To minimize noise pickup and minimize THD+N, R
FBC
should be located as close to the
TC2000 as possible. Make sure that the routing of the high voltage feedback lines is kept
far away from the input op amps or significant noise coupling may occur. t is best to shield
the high voltage feedback lines by using a ground plane around these traces as well as the
input section.

n general, to enable placement as close to the TC2000/TP2050, and minimize PCB parasitics, the
capacitors listed above should be surface mount types.
!
12 TK2050 SB/1.0/8-02
Some components are not sensitive to location but are very sensitive to layout and trace routing.

- To maximize the damping factor and reduce distortion and noise, the modulator feedback
connections should be routed directly to the pins of the output inductors, L
O
.

- The modulator feedback resistors, R
FBA
and R
FBB
should all be grounded and attached to
5V together. These connections will serve to minimize common mode noise via the
differential feedback.

TK2 0 5 0 Gr oundi ng

Proper grounding techniques are required to maximize TK2050 functionality and performance.
Parametric parameters such as THD+N, noise floor and cross talk can be adversely affected if proper
grounding techniques are not implemented on the PCB layout. The following discussion highlights
some recommendations about grounding both with respect to the TK2050 as well as general "audio
system design rules.

The TK2050 is divided into two sections: the input section, and the output (high power) section. On
the TK2050 evaluation board, the ground is also divided into distinct sections, one for the input and
one for the output. To minimize ground loops and keep the audio noise floor as low as possible, the
input and output ground must be only connected at a single point. Depending on the system design,
the single point connection may be in the form of a ferrite bead or a PCB trace.

ModuI at or Feedback Desi gn

The modulator converts the signal from the input stage to the high-voltage output signal. The
optimum gain of the modulator is determined from the maximum allowable feedback level for the
modulator and maximum supply voltage for the power stage. Depending on the maximum supply
voltage, the feedback ratio will need to be adjusted to maximize performance. The values of RFBB
and RFBC (see explanation below) define the gain of the modulator. Once these values are chosen,
based on the maximum supply voltage, the gain of the modulator will be fixed even with as the supply
voltage fluctuates due to current draw.

For the best signal-to-noise ratio and lowest distortion, the maximum differential modulator feedback
voltage should be approximately 4Vpp. This will keep the gain of the modulator as low as possible
and still allow headroom so that the feedback signal does not clip the modulator feedback stage.

The modulator feedback resistors are:

R
FBB
= User specified; typically1kO
FBB
FBB CC
FBC R
2V
R V
R |
.
|
\
| -
=

TK2050 AmpI i f i er Gai n

The gain of the TK2050 is the product of the input stage gain and the modulator gain. Please refer to
the sections, nput Stage Design, and Modulator Feedback Design, for a complete explanation of how
to determine the external component values.

MODULATOR V E VINPUTSTAG VTK2050 A * A A =

|
.
|
\
| +
~
FBB
FBB FBC
I
F
VTK2050
R
R R
R
R
A

!
13 TK2050 SB/1.0/8-02
For example, using a TK2050 with the following external components,

R
= 20k:
R
F
= 20k:
R
FBB
= 1k:
R
FBC
= 14k:

V
V
15
1k
) 1k 14k

20k
20k
AVTK2050
:
|

I nput St age Desi gn

The TC2000 input stage is configured as an inverting amplifier, allowing the system designer flexibility
in setting the input stage gain and frequency response. Figure 1 shows a typical application where
the input stage is a constant gain inverting amplifier. The input stage gain should be set so that the
maximum input signal level will drive the input stage output to 4Vpp.

TC2000
NPUT2
OAOUT2
V5
OAOUT1
!
"
C
!
"
NV1
NPUT1
BASCAP
AGND
RF
R
C
RF
AGND
NV2
V5
R

Figure 1: Input Stage

The gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting
amplifier: t should be noted that the input amplifiers are biased at approximately 2.5VDC. Thus, the
polarity of C

must be followed as shown in Figure 1 for a standard ground referenced input signal

F
E VNPUTSTAG
R
R
A

I nput Capaci t or SeI ect i on

C
can be calculated once a value for R
has been determined. C
and R
determine the input low

frequency pole. Typically this pole is set below 10Hz. C
is calculated according to:

P
R f 2
1
C
S

where:
R = nput resistor value in ohms.
P f = nput low frequency pole (typically 10Hz or below)
!
14 TK2050 SB/1.0/8-02
Mut e Cont r oI

When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low-
side transistors are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully
operational. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE
and the un-muting of the TK2050.

To ensure proper device operation, including minimization of turn on/off transients that can result in
undesirable audio artifacts, Tripath recommends that the TK2050 device be muted prior to power up
or power down of the 5V supply. The "sensing of the V5 supply can be easily accomplished by using
a "microcontroller supervisor or equivalent to drive the TC2000 mute pin high when the V5 voltage is
below 4.5V. This will ensure proper operation of the TK2050 input circuitry. A micro-controller
supervisor such as the MCP101-450 from Microchip Corporation has been used by Tripath to
implement clean power up/down operation.

f turn-on and/or turn-off noise is still present with a TK2050 amplifier, the cause may be other
circuitry external to the TK2050. While the TK2050 has circuitry to suppress turn-on and turn-off
transients, the combination of power supply and other audio circuitry with the TK2050 in a particular
application may exhibit audible transients. One solution that will completely eliminate turn-on and
turn-off pops and clicks is to use a relay to connect/disconnect that amplifier from the speakers with
the appropriate timing during power on/off.

TK2050 Out put Capabi I i t y

The TK2050 can drive two 8 Ohm loads with 45 Watts each at less than 0.05% THD+N. The
maximum sustained amplifier output power will be determined by a number of factors including the
TC2000/TP2050 junction temperatures, the load impedance and the power supply voltage.

Tripath does not recommend driving loads below 6 Ohms single ended as the amplifier efficiency will
be reduced and the amplifier will reach it's current limit at relatively low power output levels. With the
outputs connected in parallel, however, the TK2050 is capable of driving single channel loads down
to 4 Ohms with very high power capability. n such applications, special consideration must be give
to cooling of the TP2050 power device.

Par aI I eI ed Out put s

For stereo mode operation, the TK2050 is a dual full bridge. For parallel mode operation, the TK2050
can be configured as a single full bridge with double current capability by connecting the CONFG pin
to the Vdd pin of the TP2050. Please refer to the Applications/Test Diagram for parallel operation.

Out put VoI t age Of f set

The TK2050 does not have internal compensation for DC offset. f offset is a consideration for the
intended application, trimming of the input offset voltage will be required. Tripath has had success
with both active and passive circuits for this purpose; please consult with the Tripath applications
team for further information.

Out put Fi I t e r De s i gn

Tripath amplifiers generally have a higher switching frequency than PWM implementations, allowing
the use of higher cutoff frequency filters and reducing the load dependent peaking/drooping in the
20kHz audio band. This is especially important for applications where the end customer may attach
any speaker to the amplifier (as opposed to a system where speakers are shipped with the amplifier),
since speakers are not purely resistive loads and the impedance they present changes over
frequency and from speaker model to speaker model. An RC network, or "Zobel (R
Z
, C
Z
) should be
placed at the filter output to control the impedance "seen by the TP2050 when not attached to a
!
15 TK2050 SB/1.0/8-02
speaker load. The TK2050 works well with a 2
nd
order, 80kHz LC filter with L
O
= 10uH and C
O
=
0.47uF and R
Z
= 10 Ohm/1W and C
Z
= 0.47uF.

NOTE: Output inductor selection is a critical design step. The core material and geometry of the
output filter inductor affects the TK2050 distortion levels, efficiency, power dissipation and EM output.

Mi ni mum and Maxi mum SuppI y VoI t age Oper at i ng Range

The TK2050 can operate over a wide range of power supply voltages from +12V to +30V. n order to
optimize operation for either the low or high range, the user must select the proper values for R
FBB
,
and R
FBC
.

Pr ot ect i on Ci r cui t s

The TK2050 is protected against over-current, over / under-voltage and over-temperature conditions.

Over - t emper at ur e Pr ot ect i on

An over-temperature fault occurs if the junction temperature of the part exceeds approximately
165qC. The thermal hysteresis of the part is approximately 30qC, therefore the fault will automatically
clear when the junction temperature drops below 135qC.

HMUTE

The HMUTE pin is a 5V logic output that indicates various fault conditions within the device. t is not
normally used in product applications.

OVRLDB

The OVRLDB pin is a 5V logic output that is asserted just at the onset of clipping. When low, it
indicates that the level of the input signal has overloaded the amplifier resulting in increased distortion
at the output. The OVRLDB signal can be used to control a distortion indicator light or LED through a
simple buffer circuit, as the OVRLDB cannot drive an LED directly. There is a 20K resistor on chip in
series with the OVRLDB output.

Per f or mance Measur ement s of t he TK2050

The TK2050 operates by generating a high frequency switching signal based on the audio input. This
signal is sent through a low-pass filter (external to the Tripath amplifier) that recovers an amplified
version of the audio input. The frequency of the switching pattern is spread spectrum in nature and
typically varies between 100kHz and 1MHz, which is well above the 20Hz 20kHz audio band. The
pattern itself does not alter or distort the audio input signal, but it does introduce some inaudible
components.

The measurements of certain performance parameters, particularly noise related specifications such
as THD+N, are significantly affected by the design of the low-pass filter used on the output as well as
the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off
just beyond the audio band or the bandwidth of the measurement instrument is limited, some of the
inaudible noise components introduced by the TK2050 amplifier switching pattern will degrade the
measurement.

One feature of the TK2050 is that it does not require large multi-pole filters to achieve excellent
performance in listening tests, usually a more critical factor than performance measurements.
Though using a multi-pole filter may remove high-frequency noise and improve THD+N type
measurements (when they are made with wide-bandwidth measuring equipment), these same filters
!
16 TK2050 SB/1.0/8-02
degrade frequency response. The TK2050 Evaluation Board uses the Application/Test Circuit of this
data sheet, which has a simple two-pole output filter and excellent performance in listening tests.
Measurements in this data sheet were taken using this same circuit with a limited bandwidth setting in
the measurement instrument.
!
17 TK2050 SB/1.0/8-02
!"#$"%&' ( )*+,-".( +)' /' .#0111' '

!
18 TK2050 SB/1.0/8-02
!"#$"%&' ( )* +,-"./ +)' 0' 1!2343'

!
19 TK2050 SB/1.0/8-02
!
Tripath and Digital Power Processing are trademarks of Tripath Technology nc. Other trademarks
referenced in this document are owned by their respective companies.

Tripath Technology nc. reserves the right to make changes without further notice to any products
herein to improve reliability, function or design. Tripath does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under
its patent rights, nor the rights of others.

TRPATH'S PRODUCTS ARE NOT AUTHORZED FOR USE AS CRTCAL COMPONENTS N LFE
SUPPORT DEVCES OR SYSTEMS WTHOUT THE EXPRESS WRTTEN CONSENT OF THE
PRESDENT OF TRPATH TECHNOLOGY NC. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical
implant into the body, or (b) support or sustain life, and whose failure to perform, when properly
used in accordance with instructions for use provided in this labeling, can be reasonably expected
to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system, or to affect
its safety or effectiveness.

For more information on Tripath products, visit our web site at: www.tripath.com

Other useful documents concerning the TK2050 available on the Tripath website.

EB-TK2050 Six Channel Board Six-channel reference design using the TK2050.

Cont act I nf or mat i on
"#$ %&"'! "()'*+,+-./ ! $ *)!
2560 Orchard Parkway, San Jose, CA 95131
408.750.3000 - P
408.750.3001 - F

For more Sales nformation, please visit us @ www.tripath.com/cont_s.htm
For more Technical nformation, please visit us @ www.tripath.com/data.htm

This datasheet has been download from:
www.datasheetcatalog.com
Datasheets for electronics components.

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nverting input resistance to provide AC gain in conjunction with R

. Please refer to the Amplifier

AC input coupling capacitor, which, in conjunction with R

, forms a high pass filter at

can be calculated once a value for R

has been determined. C

determine the input low

is calculated according to:

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