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DELTA MODULATION/ DEMODULATION SYSTEM TRAINER MODEL-COM111

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SIGMA TRAINERS AHMEDABAD (INDIA)

INTRODUCTION This trainer has been designed with a view to provide practical & experimental knowledge of Delta Modulation /Demodulation technique as practically implemented in Digital Communication systems on a SINGLE P.C.B. of size 12 x 9. SPECIFICATIONS 1. Power supply requirement 2. Built in IC based power supply. 3. On Board AF Modulating signal generator - Sine wave Frequency Range : 300 Hz to 3.4 KHz in 3 ranges Amplitude : 0 to 5 Vpp. 4. On Board Sampling Pulse signal generator. Frequency Range : 10 KHz to 1000 KHz. Pulse width : Variable. 5. Step size 6. Modulator Sections 7. Demodulator Sections : 2 mV to 72 mV-switch selectable. : Comparator, S/H and Integrator. : Integrator, Low Pass Filter - Cut off fre. - 3.4 KHz. : 230V AC, 50 Hz.

8. All parts are soldered on single pin TAGS on single PCB of size 12" x 9" with complete circuit diagram screen printed. 9. Standard Accessories : 1. A Training Manual. 2. Connecting Patch cords.

CIRCUIT DETAILS OF DELTA MODULATION & DEMODULATION A block diagram of a Delta Modulation system is shown in Fig.3.3 It consists of following sections. 1. 2. Modulating Audio Signal Generator Delta modulator section A. Comparator. B. Sample and Hold circuit. C. Detector circuit. D. Integrator. Delta Demodulator section A. Detector Circuit. B. Integrator C. Buffer D. Low Pass Filter Sampling Pulse generator Power supply.

3.

4. 5.

(1) Modulating Audio Signal Generator section: IC 1 (ICL 8038) waveform generator IC is used generate sine wave siganl. Pot P2 (22K) is used to vary its frequency. The frequency range is 300 Hz to 3.4 Khz. Presets Pr1 and Pr2 are adjusted for proper peaks of sine wave signal. Pr3 is used to adjust duty cycle. The sine wave output signal is available at pin 2 of IC1 and it is then amplified by IC4. The amplified output is available output terminals. Pot P2 is used to vary the amplitude of Sine wave signal. The switch S1 is used for course variation of frequency. The output amplitude vary from 0 to 5Vpp. (2). Delta modulator section:(A) Comparator: This section is based on high-speed comparator IC IC710 (IC101). The IC710 works as Comparator. +12V and 5V supply are given to pin 8 & 3 respectively. Pin 2 is input. Pin 3 is for reference signal. Pin 7 is error output. The input signal X(t) applied at pin 2 is compared with its staircase approximated signal (at pin 3) and the error signal e(t) is available at pin 7. If X n > Y n-1 => e n = 1. X n < Y n-1 => e n = 0. Thus error output signal from IC710 is compatible with TTL logic; hence it is directly applied to the Sample and Hold circuit. (B) Sample and Hold Circuit: The sample and Hold circuit samples the error signal once per clock cycle at sampling frequency CK1 & holds the output signal Q(t) at the remaining clock cycle. Hence for this circuit D flipflop (IC7474) is used. IC102 (IC7474) receives e (t) signal at pin 12. +5v supply is given at pin 14 of IC102. Pin 7 is ground Pin . Pin 9 is output signal Q(t). Clock CK1 is applied to the Pin 11 from pulse generator. Also push reset switch is provided at pin 13 of IC102. This reset switch resets the output signal Q(t) to zero level. (C) Detector Circuit:The change in output digital signal Q(t) at nth pulse Q n with reference to n-1th pulse may be +ve or -ve. This change is detected by detector circuit. Accodding to +ve or -ve change in the output, charge on the capacitor in the integrator section is increased or decreased. Here IC 7400(IC103) is used for detection. Input to the IC103 are at pin 13 and 1. Two outputs V1 and V2 are available at pin 8 and 6. V1 = Q.CK1 and V2 = Q + CK1. 3

(D) Integrator:This section based on a Charge paracelling circuit. This circuit is also known as Bucket and Dipper circuit. It consists of Q1, Q2, Q3, Q4 (BC148B) and integrating capacitor. Integrating capacitor is switch selected from 3 different t values. The integrator produces the staircase approximated signal Y(t). (3). Delta demodulator section:(A) Detector Circuits This circuit functions similar to the detector circuit in delta modulator section. Here IC 201 (7400) is used. The output V1 and V2 are available are Pin6 and Pin 8, from input signal on applied at Pin 13. All parts are same as those are in delta Modulator. (B) Integrator This circuit functions same as in delta modulator section. All parts and processes are same as those are in delta modulator. Thus staircase approximated signal is available at test point Y n-1 . (C) Buffer The signal Y n-1 is given to Pin 3 of IC 202 (IC 741). This IC works as buffer. The output is available at Pin 6. +15V and -15V supply are applied at pin 7 and pin 4 respectively. The buffer is used before low pass filter for impedance matching as the output impedance of integrator is very high. C210 is used to block the dc component in the output of the integrator. (D) Low Pass Filter The low pass filter passes only low frequency signals while rejects high frequency signals. The staircase a approximated signal is of low frequency signal having high frequency noise (Quantization noise/error) at clock frequency CK1. Hence by passing the staircase signal Y(t) through low pass filter, original low frequency signal is recovered. IC 741 is used as active low pass filter having centre frequency fo = 1.6KHz and band width 3.2KHz. The final output signal is available at Pin 6 of IC 203 (IC741). Thus original signal is recovered back. This distortion in output signal depends upon clock frequency, input signal slope and amplitude. Also DC level of recovered signal is different from the input signal. (4). Sampling Pulse generator: IC NE7555 timer IC is used in astable mode to generate clock frequency from 100 KHz to 1MHz. To get variable frequency 22K pot is used. The output of 555 IC is available at Pin 3 is given to the pin 7 of IC 4528. IC 4528 is used to generate variable pulse width. (5) Power supply section:The regulated power supply is used for different supply voltages. Following output D.C. Voltages are required to operate delta modulation system. +15V, 100mA, + 5V, 500mA, - 5V, 50mA, -15V, 100mA Three terminal regulators are used for different output voltages i.e. IC 7805 for + 5V, IC 7815 for +15V, IC 7915 for -15V, IC 7905 for - 5V, are used. These ICs are supplied different dc input voltages by two Half-wave rectifiers consisting of D301-D304 and D305-D308 and C301, C302, C309, C313. The capacitors at each input and each output are for filtering purpose. ************** 4

EXPERIMENTS
(A) BLOCK DIAGRAM OF DELTA MODULATION / DEMODULATION
(A) Delta Modulator Modulating Audio Signal
AF

Comparator + e(t) Error signal

Sample/Hold ADM Signal Q(t)

X(t) Y(t)

S/H -

SPG

Sampling Pulse Generator

Integrator

(B) Delta Demodulator: -

DM Signal

Integrator

Raw data

LPF

Recovered Signal

(B) EXPERIMENT PROCEDURE:1. 2. 3. 4. 5. 6. 7. Connect output of Audio generator to MOD I/P terminal of Modulator. Connect CRO channel-1 at Sine O/P terminal. Adjust amplitude of sine wave to 2 Vpp and audio frequency to 1 KHz. ______Waveform (W1)

Connect CRO channel-2 at Sampling Clock terminal of Sampling Pulse generator. Keep Pulse frequency approx. 100 KHz and Pulse witdh at 50%. ______ Waveform (W2) Connect CRO Channel-2 at DM O/P terminal of Modulator. Trigger CRO by channel-1. The DM signal will be observed. ______ Waveform (W3) Connect CRO Channel-2 at RECV O/P terminal of Modulator. Trigger CRO by channel-1. Observe staircase approximated signal ______ Waveform (W4) Then connect CRO Channel-2 at demodulated output O/P of Low pass filter in demodulator section. Observe recovered sine wave signal. ______ Waveform (W5) Now vary amplitude of sine wave modulating signal and observe its effect on DM output as well as on recovered signal.

8. Vary frequency of sine wave modulating signal and observe its effect on DM output as well as on recovered signal. 9. Vary step size by step size select switch and observe its effect on DM output.

Conclusion:

The quantizing error in recovered signal: a. increases with increase in signal amplitude, b. increases with increase in signal frequency. c. decreases with increase in sampling pulse frequency. d. increases with decrease in sampling pulse width. ****************

TEST POINT WAVEFORMS W1. Modulating Sinewave signal: - (at Sine O/P terminal of Audio Oscillator) : 1 KHz, 2Vpp-

+ 1V
H = 0.5 ms V = 1.0 V Trig = CRO-1

-1V 1 ms

W2. Sampling Pulse Signal :-(at Sampling Pulse generator O/P) 100 KHZ +4V H = 5 us V = 2 V Trig = CRO-2

10 us
W3. DM Modulated Output Signal: +4V H = 0.5 ms V = 2 V Trig = CRO-2

W4. Staircase approximate Signal: - (at RECV Terminal of modulator)

+1V

H = 0.5 ms V = 1.0 V Trig = CRO-1

-1V W5. DM Demodulated signal (at O/P terminal of LPF): +1.25V

H = 0.5 ms V = 1.0 V Trig = CRO-1

-1.25V