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Ankovic - Projekat (PWM & PAM)
Ankovic - Projekat (PWM & PAM)
uNiu
Implementacijaimpulsnoirinske(PWM)i
impulsnoamplitudskemodulacije(PAM)
korienjemmikrokontroleraPIC16F877
Mentor:
Prof.Dr.MileStojev
Studenti:
MiliiNikola
BrankoviDragan
SADRAJ
1. Impulsnoirinskaiimpulsnoamplitudskamodulacija....................................1
ImpulsnoirinskamodulacijaPWM......................................................................................2
ImpulsnoamplitudskamodulacijaPAM................................................................................5
OsnovnekarakteristikePWMiPAMprimopredajnika............................................................6
StrukturaPWAMmodulacije...................................................................................................7
GlavneosobinePWAMsignala................................................................................................8
PWMModulator.....................................................................................................................10
PAMModulator......................................................................................................................11
2. Mikrokontroler...........................................................................................................14
Blokdijagrammikrokontrolera..............................................................................................16
Osnovnekarakteristikemikrokontrolera................................................................................18
Memorijskamapamikrokontrolera........................................................................................20
Programiranje.........................................................................................................................24
3. Kompajlerzamikrokontrolere................................................................................27
InstalacijaMikroCa................................................................................................................29
Pisanjekda...........................................................................................................................29
USARTterminal......................................................................................................................33
UbacivanjeFirmwareaumikrokontroler.............................................................................35
4. ImplementacijaPWAMpredajnika.......................................................................36
BlokemarealizovanogPWAMpredajnika.............................................................................36
Elektrinaema.......................................................................................................................37
5. Programskikod.............................................................................................................41
ProgramskikoduMikroCu.....................................................................................................41
ProgramskikoduAssembleru...............................................................................................47
6. LABORATORIJSKAVEBAZadatak.......................................................................79
Prilog...............................................................................................................................82
Zakljuak........................................................................................................................92
Literatura.......................................................................................................................93
Oautorima...................................................................................................................94
Uvod
1.Impulsnoirinskaiimplusnoamplitudskamodulacija
ImpulsnoirinskamodulacijaPWM
Impulsno irinska modulacija (skraeno PWM) je vrsta upravljanja koja
predstavljanaindaseoddigitalnogsignalanapravisignalanalognevrednosti.
Odnos impuls/pauza se modulie tako da odgovara specificiranom nivou
analognogsignala.
Opisimpulsnoirinskemodulacije
PWM kontrola je mona tehnika za upravljanje analognim kolima
pomou digitalnih izlaza.PWMjeprimenjena uirokomspektruaplikacija,od
primene u merenjima i komunikacijama, sve do primene u kontroli snage i
konverzijama elektrine energije u druge oblike (zvuk, mehaniku energiju .).
esto se u literaturi PWM moe pronai pod imenom PWM (eng. Pulse Wide
Modulation) ta su to analogni signali i zato se odluuje za digitalno
upravljanjepomouPWM?
Analogni signal ima kontinualno promenljivu vrednost amplitude, kao i
beskonanu rezoluciju i po vremenskoj osi i po amplitudi. Jedan od primera
analognogureajajebaterijaod9V,priemunjenizlaznijetano9Vnegose
menjauvremenuimoedauzmevrednostbilokogrealnogbrojaublizini9V.
Slino i struja koja tee iz baterije nije ograniena brojem moguih vrednosti.
Analogni signali se razlikuju od digitalnog jer se kod digitalnog signala uvek
uzimavrednostizkonanogskupapredefinisanihmoguihvrednosti,kaotoje
npr.skup{0V,5V}.
Analogninaponistrujasemogukoristitizadirektnukontrolu,kaotoje
jaina zvuka na radiju. Okretanjem potenciometra se poveava i smanjuje
otpornostnakrajevimapotenciometraitimeseproporcionalnomenjaistruja
koja tee kroz njega. Ova promena utie i na promenu struje koja tee kroz
zvunikpatimeutieinajainuzvuka.
Glavna prednost analognih kola je uglavnom jednostavnost kako to na
prvi pogled izgleda. Ali izbor analognog reenja esto nije praktian,
ekonomian i dovoljno atraktivan. Analogna kola takoe vremenom menjaju
svojeosobine.Preciznaanalognakolaukojimajetajproblemreenmogubiti
velikaiskupa.Takoepostojiproblemdisipacijejerjeonasrazmernanaponu
nakrajevimakolaistrujikojakrozkolotee,pajepotrebnonjegovohlaenje.
Analognakolasutakoeosetljivanaum.
Slika1.PWMsignalisarazliitimfaktorimaispune
f.1.
3
f.2.
JedanodnainaprimenePWMsignalajeprikazannasl.2.Prikazanoje
jednostavnokoloukomseputemPWMsignalaupravljaprekidaemzapaljenje
igaenjesijalice.Uperiodukadajeprekidaukljuensijalicagori,auperiodu
kada je prekida iskljuen sijalica jeugaena. Promenom faktora ispune PWM
signala menja se period u kom sijalica gori. Ako je perioda PWM signala
dovoljno mala tada se ne primeti treperenje sijalice a ako je rezolucija velika
finosemoeupravljatijainomsvetlostisijalice.
Slika2.Jednostavnokolozaupravljanjejainomsvetlostisijalice
Primenaimpulsnoirinskemodulacije
PWM signal je naao iroku primenu u mnogim oblastima. Pored
prethodnonavedenihtusuiprimenauregulacijinaponanapajanja.Uregulaciji
napona napajanja postiu se rezultati sa visokim koeficijentom korisnog
dejstva.PWMseponekadkoristizasintezuzvukajermogudasepostignulepi
efekti.Primenauaudiotehnicijenovaklasaaudiopojaavaakojapostajesve
popularnija. Zove se "klasaD" audio pojaavaa. Ovi pojaavai proizvode
PWM ekvivalent analognog ulaznog signala, koji se vodi na zvunike putem
odgovarajuemreefiltara.Timesesignalvraanaoriginalniaudiosignal.Ovi
pojaavaisekarakteriuvisokimfaktoromkorisnogdejstvakojijeakipreko
90%,kaoimalimprostoromiteinomuodnosunaizlaznusnagu.PWMsignal
seirokokoristizakontrolubrzineDCiACmotora,zaupravljanjeinvertorimai
mnogimdrugimoblastimauelektroniciielektroenergetici.
4
ImpulsnoamplitudskamodulacijaPAM
Slika3.IslustracijaImpulsnoamplitudskemodulacije
OsnovnekarakteristikePWMiPAMprimopredajnika
Slika4.a)2bitni,b)4PAMprimopredajnikc)PWMkodiranisignal
6
StrukturaPWAMmodulacije
Naslici5aprikazanajeemaPWAMprimopredajnika,gdeipAkoristi4
bitniPWAMtransmiterkakobipreneoodmerenepodatkeitaktprekokanala
svedoipaBkojirekonstruiepodatkeitakt.Naslici5bimamo4stepeniPWM
(4PWM)i5stepeniPAM(5PAM)kojiprenosi4bitapodatakaisistemskitakt
preko kanala. PWAM kodirani signali ne mogu da postignu velike brzine zbog
PAMformataalimoguznatnodaredukujuukupanbrojpinovaidaobezbede
lakoobnavljanjetaktsignalauzpomoPWMfunkcije.
Slika5.emaPWAMprimopredajnika
PWAMprimopredajniksesastojiod2bitnogPWMmodulatorai2bitnog
PAMmodulatora.PWMkodiranisignalimaimpulsesa4razliiteduine.irina
impulsajekvantovanau4nivoadabiseprikazalaTxbit0iTxbit1.ZatimPAM
7
modulatorkonvertujeTxbit2iTxbit3uPWAMkodiranisignal(slika5c).Izlaz
sekonvertujeu5stepeniPAMsignal,kvantovanu4razliitaamplitudskanivoa
predstavljajuiTxbit2iTxbit3ijedandodatninivozaPWMkodiraniresetna
poetnu vrednost (reset to initialsRI). Talasni oblici se mogu videti 2D
modulacionomtehnikomkoristeiimpulsnumodulacijunaxosioamplitudsku
nayosi.
Slika6.Impulsnomodulisanital.oblicinaxosi,amplitudskinayosi.
SvakiPWAMsimbolnosipojedanRInivozaPWMsignalizaciju.Potoje
RI nivo smeten u sredini PAM signala (slika 5c), nivoi amplituda PWAM
podataka su simetrini. Na slici 6 imamo ostale oblike PWAM formata koji su
asimetrine prirode. Oni rezultuju veim razmkom izmeu RI nivoa i ostalih
nivoa (slika 5c). Ali PWAM format na slici 5c, je bolji i praktiniji zbog male
razlikeuamplitudamauodnosunaRInivoiimaotrijupromenunivoaibolju
ISIkarakteristiku.
GlavneosobinePWAMsignala
Govorilismookodiranjubinarnihpodatakauimpulserazliitihamplituda
iirina,paemosadnabrojatinekeodnajvanijihosobinaPWAMa:
1)
SakarakteristikomPWM,neophodnakomponentaTAKTseumee
u kodirani signal, pa stoga, u prijemniku imamo konvencionalni PLL koji lako
obnavlja takt signal ulaznih podataka, a viefazni izlaz naponski kontrolisanog
oscilatora(Vco)uPLLusekoristizademodulacijuPWMkodiranogsignala.
2)
Za datu brzinu, PAM ema sa vie nivoa smanjuje brzinu prenosa
podatakauodnosunakonvencionalni2PAMsistem.Redukcijabrzinesmanjuje
8
Slika7.PWAMprimopredajnik
Slika8.MikrofotgrafskisnimakPWAMprimopredajnika
PWMModulator
Slika9.
10
PDdetektujefaznurazlikuizmeudvaulaza,kojasekoristizaupravljanje
(kontrolu) struje u transformatoru, tako to se puni ili prazni niskopropusni
filtar. VCDL je kontrolisan filtriranim kontrolnim naponom i koga se zatim
prilagoeniizlazniklokvraanaPD.Tokompovratnespregedolazidokanjenja
signala jednog od klokova izmeu dva ulazna signala, neposredno pred klok
sinhronizaciju. DLL se koristi da bi se generisale 7stepene sekvence, pa se 5
faza ustvari koristi za PWM signalizaciju. U faznom kontroleru promenom
faznoprekidake sekvence (Slika 9) proizvodi se PWM signal. irina impulsa
zavisiodulaznihbitovaTxbit0iTxbit1.Vremeaktivnogizlaza(Txpwm)dobija
seizformule(n+2)/7,gdejen=0,...,3.Faznikontrolerjeprikazannaslici10.
Slika10.
PAMmodulator
PAMsignalizacijasekoristidabiseinformacijamodulovalaizTxbit2iTx
bit3.Naslici8aprikazanajekompletnaemaPAMmodulatora,kojasesastoji
od 3bitnog d/a konvertora (DAC) koji generie 5 amplitudnih nivoa kako bi
predstavioPAMsignal.
11
Slika11.PAMmodulator(emaidijagramoka)
Strujanaizlazu5PAMmodulacionogkolamoeseizraunatiizsledeeg
obrasca:
,
1
NaizlazuimamopetnivoazaprikazPAMfunkcije.KadajePWMnaviem
nivou,izlazsevodina2I,3I,5Ii6IprekoTxbit2iTxbit3.KadasePWMsignal
vratinanulu,strujanaizlazupostaje4I,toustvariznaidasevratioudefault
nivo signala. Referentna struja I se generie preko Vr/(4R). Optereenje
elemenata se smanjuje odreenom vrednou R u samom kanalu. PAM
kodiranastanjasuprikazananaslici8b.PotojevrednostVjednakaIRnpr.za
Vr/4, IR nivo postaje Vr, to predstavlja referentni napon, koji moe da se
podeava.
PojednostavljenivremenskidijagramokaPAMkolaprikazanjenaslici11.
Neophodnojepredstavitivremenskiintervalt,kojisedefiniekaovremenska
razlikaizmeupoetkasvakogbitauTxbit2iTxbit3pasvedopozitivneivice
TxPWMsignala.Akojetnegativnoiliveeodt1,kakojeprikazanonaslici8b,
PWM kolo ne moe da dekodira izlazni signal. Zapaamo i to da je t2
ekvivalentan(2/7)Tck,kojijelocirannanekomniemnivouTxPWM.Dabise
izbegaoovajproblem,vremeokidanjasistemskogklokadolazeihpodatakTx
12
bit2iTxbit3trebalobidasenaublizut1tj.t<t1,kaotojeprikazanonaslici
11. Drugaiji pristup otkrivanja ovakvog problema moe se videti na slici 10.
Digitalni podaci su sinhronizovani fazom o, koja je u fazi sa sistemskim
klokom,gdeserastuaivicaPWMsignalaokidafazom1.Ovogarantujedaje
vremenskarazlikatekvivalentnaTck/7imanjaodt1,pastogaPAMkolomoe
bezgreakagenerisatiPWAMkodiranesignale.
13
2.Mikrokontroler
14
RASPOREDPINOVAPIC16F877DIP40
Slika12.RasporedpinovamikrokontroleraukuituDIP40
15
Blokdijagrammikrokontrolera
Sablokdijagramakojegdajeproizvoa(Slika13)moeseustanovitida
se koncepcija ovog mikrokontrolera ne razlikuje mnogo od koncepcije RISC
mikrokontrolera drugih proizvoaa prisutnih na tritu. Uoavaju se
standardnekomponente:
Flashprogramskamemorija8kiloreiobima14bita
RAM(FileRegisters)368bajtova
Aritmetikologikajedinica(ALU)
Akumulator(WorkingRegister)
Hardverskimagacin(Stack)organizivanu8nivoa
EEPROMmemorijapodatakaobima256bajtova
ViekanalniA/Dkonvertor,USART(univerzalnisinhroniiasinhroni
primopredajnik),tajmere,portoveitd.
PIC16F877podravatehnikuprekida(eng.interrupts).Postojiukupno14
izvoraprekida,tospoljanjih,tounutranjih.Svakiprekidnemasopstveni
interaptvektor, ve postoji jedinstvena adresa (0x0004) od koje se
nastavlja izvravanje programa kada se dogodi bilo koji od njih. Tada je na
programeru da prozivanjem zastavica/markera pojedinih prekida (eng.
interruptflagspolling)ustanovikotraiprekidiuputiprogramnaizvravanje
odgovarajue rutine za obradu. Adresa na koju se program treba vratiti po
obradiprekidauvaseautomatskiuhardverskommagacinuiuprogramski
brojavraaizvravanjeminstrukcijeRETFIE.
16
Sl.13.ArhitekturamikrokontroleraPIC16F877A
17
Osnovnekarakteristikemikrokontrolera
Ostalekarakteristike:
RISCmikroprocesorvisokihperformansi
35instrukcijaobimajednerei
Radnafrekvencijado20MHz
Trajanjetaktnogintervala200ns,prifrekvenciji20MHz
Opkdobima14bita
Harverskimagacinsaosamnivoa
Trinainaadresiranja(direktno,indirektnoirelativno)
Programskaflashmemorijakapaciteta8kX14bitnihrei
MemorijezapodatketipaRAMkapaciteta368X8bita
MemorijezapodatkeEEPROMtipakapaciteta256X8bita
Prekidi(do14izvoraprekida)
U/Iportovi:A,B,C,D,E
Tritajmera:
Timer0(TMR0):8bitnitajmer/broja_dogaaja
Timer1(TMR1):16bitnitajmer/broja_dogaaja
Timer2(TMR2):8bitnitajmer/broja_dogaaja
10bitni8kanalnianalognodigitalni(A/D)konvertor
Serijskakomunikacija:MSSP,USART
Paralelnakomunikacija:PSP
18
PoweronResetresetpriukljuenjunapajanja(POR)
Poweruptimerunoenjekanjenjanakonukljuenjanapajanja
(PWRT)
OscillatorStartupTimerunoenjekanjenjanakon
stabilizovanjaradnefrekvencijeoscilatora(OST)
Sleepmodereimradasamalimutrokomenergije
WatchdogtajmersasopstvenimintegrisanimRCoscilatoromza
nezavisnirad
Izbortipaoscilatora
Radninaponod2Vdo5.5V
Malapotronjaenergije:
0.6mAprinaponuod3Viradnojfrekvencijiod4MHz
20Aprinaponuod3Viradnomtaktuod32kHz
1Austandbyreimurada.
19
Memorijskamapamikrokontrolera
Programskamemorija
Memorijapodataka
EEPROMmemorijapodataka.
Odvojenoodnavedenihmemorijskihblokovaegzistirazasebnastruktura
magacin(stack),kojasesastojiodosam13bitnihregistara.Stekpointersene
moe itati i upisivati. Prilikom izvrenja instrukcije CALL ili prilikom poziva
prekidamikrokontrolera,adresasledeeinstrukcijesestavljanamagacin.
Ponovno vraanje starog sadraja programskog brojaa izaziva izvrenje
instrukcije RETURN, RETFIE ili RETLW. Magacin radi na principu cirkularnog
bafera, to znai da se u njega moe staviti osam razliitih adresa, a da
pokuaj unoenja devete izaziva brisanje prve i tako redom. Programski se
nemoeutvrditidalijedolodoprepunjavanjamagacina.
Organizacijaprogramskememorije
PIC16F877mikrokontroleriimaju13bitniprogramskibroja(PC)koji
je moe da adresira memorijski prostor od 8k programskih rei od 14 bita.
Resetvektorje0x0000iodnjegapoinjeizvravanjeprograma.Interaptvektor
je0x0004.Mapaprogramskememorijeimagacinprikazanisudijagramom
naSlici14
20
Slika14Mapaprogramskememorije
Organizacijamemorijepodataka
Slika15.IzboreljenebankeprekobitovaRP0iRP1
21
Slika16.Maparegistaramikrokontrolera
Svakabankamoedasadrido128registara(0x7F).Nielokacijeu
bancizauzimajuspecijalniregistri,aostatakprostorapopunjavajuregistriopte
namene implementirani kao statiki RAM. Neki specijalni registri koji se
estokoristemapiranisuusvebankedabiseomoguiobripristupiredukcija
kda.
MaparegistaraprocesoraPIC16F877AprikazanajenaSliki16.Nekoliko
specijalnih registara su registri jezgra, usko povezani sa funkcionisanjem
CPU.Ostaliregistrisuvezanizaperifernemoduleisluenjihovomupravljanjui
kontrolistatusa.
22
Opisnekolikonajvanijihinajeekorienihregistarajezgra:
23
Programiranje
Setinstrukcija
Byteoriented(operacijesaitavimregistrima),
Bitoriented(operacijesapojedinimbitovima),
Literal&Control(operacijesakonstantamaiupravljake).
Slika17.Formatinstrukcije
24
Tabela1.Setinstrukcijamikrokontrolera
Napomene:
1.
KadasevrimodifikacijaI/Oregistra,auinstrukcijisekoristiprethodno
njegovostanje(npr.MOVFPORTB,1),kaooperandsekorististanjeproitanosa
pinova porta. Tako je mogue da se u le pina konfigurisanog kao ulaz i
postavljenog na nulu preko spoljanjih elektronskih komponenti, posle
izvrenjainstrukcijeupienula.
25
2.
AkoseovainstrukcijaizvrinadregistromTMR0(iakojed=1,gdejeto
mogue),preskalerebitiresetovan,akojedodeljentajmerskommodulu.
3.
Akojemodifikovanprogramskibroja(PC)ilijerezultatlogikogtesta
pozitivan,zaizvrenjeinstrukcijebiepotrebnadvamainskaciklusa.Udrugom
ciklusupraktinoseizvravanaredbaNOP(Nooperation).
26
3.Kompajlerzamikrokontrolere
OsnovnekarakteristikeMikroCasu:
PisanjeCkdakorienjemkvalitetnogipreglednogeditora,tose
ogleda u automatskoj kontroli i upozorenjima vezanim za sintaksu kda,
korienihparametara,kaoiautomatskojkorekcijipojedinihgreaka
Programerimanaraspolaganjuvelikibrojintegrisanihbibliotekai
rutina,kojeznaajnoubrzavajupisanjeprograma
MikroC,dodue,odstupaodANSIstandardakojasunainjenauciljuda
se olaka programiranje,kao i zbog hardverskih ogranienja PIC
mikrokontrolera.
SpecifinostMikroCa:
mikroCtretiraoznaavanjeconstkaotrueconstans(kodC++),
to omoguava korienje const objekta na mestima gde ANSIC oekuje
constant izraz .Ukoliko se tei ka prenosivosti programa, treba koristiti
tradicionalnopretprocesorskodefinisanjekonstanti
27
mikroC dozvoljava C++ stil jednolinijskih komentara, koristei dve
kosecrte(//).Komentarmoedaponebilogdeitrajedosledeenovelinije
programskogkda
UrealizacijiovogseminarskogradakorienjesoftverskialatmikroCkoji
jedelofirmeMikroelektronikaizBeograda.
Inae,ogranienaverzija(do2KBprograma)moedaspreuzmesasajta
beogradske Mikroelektronike (www.mikroe.com). Za punu verziju programa,
trebaplatitilicencukojaiznosi250$ivaisamozajedanraunar.
28
InstalacijaMikroCa
Pisanjekda
Slika18.KreiranjenovogprojektaprekoopcijeProjectNewProject
29
Slika19.Podeavanjeparametaraprojekta(nazivmikrokontrolera,takta,reseta...)
Slika20.Ueditorutrebanapisatiprogram(kd)mikrokontrolera
30
Slika21.Ueditorjeunetnekiprogram
Slika22.PrevoenjeprogramaprekokomandeProjectBuild
31
Slika23.Izgledprozoraposleprevoenjasaizvetajem(Messages)
Slika24.Posleprevoenja(kompilacije/kompajliranja)generiesenekoliko
fajlova:asemblerskikd(ASM),heksadecimalnikd(HEX),izvetajiitd.
32
USARTterminal
PokretanjeinternogsoftverskogterminalamikroCakojisekoristiza
komunikacijuraunaraimikrokontroleraostvarujesenasledeinain:
ToolsUSARTTerminal
Slika25.IzgledprozorakodUSARTkomunikacionogterminala
Kaotosevidi,moguejepodesitiveibrojparametara.
Naveemosamonajvanije:
Ukljuivanje/iskljuivanjehandshakingsignala(RTSiDTR)
Izborformatapodatkakojisealje(ASCII,heksadecimalniHEXili
dekadniDEC)
Nainslanja(odmahpokucanjuilikadasekliknenaopcijuSEND)
itd.
Slika26.IzgledprozorasoftverskogUSARTterminalakadajepokrenut
34
UbacivanjeFirmwareaumikrokontroler
35
4.ImplementacijaPWAMpredajnika
BlokemarealizovanogPWAMpredajnika
NaSlici27.jeprikazanablokemaPWAMpredajnikarealizovanogpreko
mikrokontroleraPIC16F877ioperacionogpojaavaaLF353.
Slika27.BlokemaPWAMpredajnikarealizovanogpomoumikrokontrolera
NaSlici28.jeprikazanaelektrinaemaPWAMpredajnikarealizovanog
prekomikrokontroleraPIC16F877ioperacionogpojaavaaLF353.
MikrokontrolerPIC16F877radinafrekvencijiod4Mhz.
Poto se koristi transformator bez srednje take, za formiranje vri se
jednostrano usmeravanje/ ispravljanje i pozitivnog i negativnog napona. Oba
naponasestabilizujuprekoregulatoranapona7805i7905,respektivno.
Komunikacija mikrokontrolera sa PC raunarom se ostvaruje preko
interfejsnogkolaMAX232.Pomenutakomunikacijajebezhandshakinga.
36
Elektrinaema
Slika28.ElektrinaemaPWAMpredajnikarealizovanogpomou
mikrokontrolera
IC1
D1
Vin
C12
Gnd
1N4002
TRAFO
Vout
C2
100nF
C5
LM7805
C6
330uF
100nF
100uF
100nF
C11
C10
C4
330uF
100nF IC2
C7
C8
100uF
100nF
1
2
3
4
5
6
7
8
C9
C1+
Vcc
V+
Gnd
C1T1out
C2+
R1in
C2- R1out
VT1in
T2out T2in
R2in R2out
16
15
14
13
12
11
10
9
MAX232
C3
CN2
IC4
C1
100nF
15V~
1
2
100nF
JP1
1
6
2
7
3
8
4
9
5
C13
220nF
DB9/F
Gnd
100nF
D2
Vin
Vout
CN3
1
2
3
4
5
LM7905
1N4002
RN1
1
2
3
4
5
6
7
8
8x10K
R1
IC3
SW1
4
3
2
1
SW2
SW3
S1
5
6
7
8
C14
27pF
Y1
C15
27pF
4MHz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MCLR PB7
PA0
PB6
PA1
PB5
PA2
PB4
PA3
PB3
PA4
PB2
PA5
PB1
RD
PB0
WR
VDD
CS
VSS
VDD
PD7
VSS
PD6
OSC1 PD5
OSC2 PD4
PC0
PC7
PC1
PC6
PC2
PC5
PC3
PC4
PD0
PD3
PD1
PD2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
R8
R6
10K
10K
R9
R7
10K
10K
R2
10K
R3
27K
R4
27K
10K
OutA V+
A- OutB
A+
BVB+
Q1
2N3906
LF353
Q2
2N3906
IC5
R5
6.8K
PIC16F877-04
37
38
Slika29.tampanaploa(PCB)PWAMpredajnikarealizovanogpomou
mikrokontrolera
Slika29a.FinalnarealizacijaPWAMpredajnika
39
Slika29b.FinalnarealizacijaPWAMpredajnikasatransformatorom
40
ProgramskikodumikroCu
unsignedshorti=0,j=0,k=0,l=0;
unsignedshortm=0,n=0,t=0,o=0,q=0;
voidmain(){
//Definisanje
//pinovaPORTA
TRISB=0x00;
PORTB=0b01100000;
TRISD=0x00;
PORTD=0x00;
TRISA=0b111111;
ADCON0=0;
//DefinisanjedigitalnihsignalaAporta
ADCON1=6;
Usart_Init(2400);//InicijalizacijaUSARTmodula
//(8bita,2400bauda)
do{
//Otvaranjebeskonacnepetlje
j.F0=PORTA.F4;
j.F1=PORTA.F5;
if(Usart_Data_Ready()){
i=Usart_Read();
//Citanjeprimljenogpodatka
Usart_Write(i);
//Slanjeposlatogpodatka
41
k.F1=i.F7;
k.F0=i.F6;
l.F1=i.F5;
l.F0=i.F4;
m.F1=i.F3;
m.F0=i.F2;
n.F1=i.F1;
n.F0=i.F0;
if(PORTA.F2==1){
o=j+1;
PORTB.F7=!k.F1;
PORTB.F6=!k.F1&&!k.F0;
PORTB.F5=!k.F0;
delay_ms(1);
PORTB.F4=1;
Vdelay_ms(o);
PORTB.F4=0;
PORTB.F7=!l.F1;
PORTB.F6=!l.F1&&!l.F0;
PORTB.F5=!l.F0;
delay_ms(1);
PORTB.F4=1;
Vdelay_ms(o);
PORTB.F4=0;
PORTB.F7=!m.F1;
PORTB.F6=!m.F1&&!m.F0;
PORTB.F5=!m.F0;
delay_ms(1);
//Razbijanje8bitnerecina
//2bitnereci
42
PORTB.F4=1;
Vdelay_ms(o);
PORTB.F4=0;
PORTB.F7=!n.F1;
PORTB.F6=!n.F1&&!n.F0;
PORTB.F5=!n.F0;
delay_ms(1);
PORTB.F4=1;
Vdelay_ms(o);
PORTB.F4=0;
PORTB.F7=0;
PORTB.F6=1;
PORTB.F5=1;
if(PORTA.F2==0){
o=l+1;
q=n+1;
PORTB.F7=!k.F1;
PORTB.F6=!k.F1&&!k.F0;
PORTB.F5=!k.F0;
delay_ms(1);
PORTB.F4=1;
Vdelay_ms(o);
PORTB.F4=0;
43
PORTB.F7=!m.F1;
PORTB.F6=!m.F1&&!m.F0;
PORTB.F5=!m.F0;
delay_ms(1);
PORTB.F4=1;
Vdelay_ms(q);
PORTB.F4=0;
PORTB.F7=0;
PORTB.F6=1;
PORTB.F5=1;
}
}
if(PORTA.F0==0){
PORTB=0b11100000;
delay_ms(1);
PORTB=0b00100000;
delay_ms(1);
PORTB=0b00000000;
delay_ms(1);
PORTB=0b10000000;
delay_ms(1);
PORTB=0b01100000;
delay_ms(4);
//Napritisaktasteragenerise
//setestnaPWAMsekvenca
44
PORTB=0b11100000;
delay_ms(2);
PORTB=0b00100000;
delay_ms(2);
PORTB=0b00000000;
delay_ms(2);
PORTB=0b10000000;
delay_ms(2);
PORTB=0b01100000;
delay_ms(4);
PORTB=0b11100000;
delay_ms(3);
PORTB=0b10000000;
delay_ms(3);
PORTB=0b00100000;
delay_ms(3);
PORTB=0b00000000;
delay_ms(3);
PORTB=0b01100000;
delay_ms(4);
PORTB=0b00000000;
delay_ms(4);
PORTB=0b10000000;
delay_ms(4);
PORTB=0b11100000;
delay_ms(4);
45
PORTB=0b00100000;
delay_ms(4);
PORTB=0b01100000;
delay_ms(4);
}while(1);
}//~!
//Krajbeskonacnepetlje
46
ProgramskikoduAssembleru
;ASMcodegeneratedbymikroVirtualMachineforPICV.6.2.1.0
;Date/Time:15.7.200817:11:14
;Info:http://www.mikroelektronika.co.yu
GOTO_main
$0004$
_Mul_32x32_U:
$0004$1303
BCF STATUS,RP1
$0005$1283
BCF STATUS,RP0
$0006$3022
MOVLW
34
$0007$00FC
MOVWF STACK_12
CLRF STACK_8
$0008$01F8
$0009$01F9
CLRF STACK_9
$000A
$01FA
CLRF STACK_10
$000B$01FB
CLRF STACK_11
$000C$
_NEXT:
$000C$03FC
DECF STACK_12,F
$000D
$1903
BTFSCSTATUS,Z
$000E$283A
GOTO_EXIT2
$000F$1003
BCF STATUS,C
$0010$
_LOOP:
$0010$0CFB
RRF STACK_11,F
$0011$0CFA
RRF STACK_10,F
$0012$0CF9
RRF STACK_9,F
$0013$0CF8
RRF STACK_8,F
$0014$0CF3
RRF STACK_3,F
$0015$0CF2
RRF STACK_2,F
$0016$0CF1
RRF STACK_1,F
$0017$0CF0
RRF STACK_0,F
$0018$1C03
BTFSSSTATUS,C
$0019$280C
GOTO_NEXT
$001A
$03FC
DECF STACK_12,F
$001B$1903
BTFSCSTATUS,Z
$001C$282C
GOTO_EXIT1
$0874
MOVFSTACK_4,W
$001D
47
$001E$07F8
ADDWF
STACK_8,F
$001F$0875
MOVFSTACK_5,W
$0020$1803
BTFSCSTATUS,C
$0021$0F75
INCFSZ
STACK_5,W
$0022$07F9
ADDWF
STACK_9,F
$0023$0876
MOVFSTACK_6,W
$0024$1803
BTFSCSTATUS,C
$0025$0F76
INCFSZ
STACK_6,W
$0026$07FA
ADDWF
STACK_10,F
$0027$0877
MOVFSTACK_7,W
BTFSCSTATUS,C
$0028$1803
$0029$0F77
INCFSZ
STACK_7,W
$002A
$07FB
ADDWF
STACK_11,F
$002B$2810
GOTO_LOOP
$002C$
_EXIT1:
$002C$0874
MOVFSTACK_4,W
$002D
$07F8
ADDWF
STACK_8,F
$002E$0875
MOVFSTACK_5,W
$002F$1803
BTFSCSTATUS,C
$0030$0F75
INCFSZ
STACK_5,W
$0031$07F9
ADDWF
STACK_9,F
$0032$0876
MOVFSTACK_6,W
$0033$1803
BTFSCSTATUS,C
$0034$0F76
INCFSZ
STACK_6,W
$0035$07FA
ADDWF
STACK_10,F
$0036$0877
MOVFSTACK_7,W
$0037$1803
BTFSCSTATUS,C
$0038$0F77
INCFSZ
STACK_7,W
$0039$07FB
ADDWF
STACK_11,F
$003A
$
_EXIT2:
$003A
$0008
RETURN
$003B$
_Usart_Data_Ready:
$003B$3000
MOVLW
0
$003C$1303
BCF STATUS,RP1
$003D
$1283
BCF STATUS,RP0
$003E$1A8C
BTFSCPIR1,5
$003F$3001
MOVLW
1
$0040$00F1
MOVWF STACK_1
$0041$0871
MOVFSTACK_1,0
$0042$00F0
MOVWF STACK_0
48
$0043$0008
RETURN
$0044$
_Usart_Read:
$0044$1303
BCF STATUS,RP1
$0045$1283
BCF STATUS,RP0
$0046$081A
MOVFRCREG,0
$0047$00A6
MOVWF Usart_Read_tmp_L0
$0048$1C98
BTFSSRCSTA,1
$0049$284C
GOTOL_Usart_Read_2
$004A
$1218
BCF RCSTA,4
$004B$1618
BSF RCSTA,4
$004C$
L_Usart_Read_2:
$004C$0826
MOVFUsart_Read_tmp_L0,0
$004D
$00F0
MOVWF STACK_0
$004E$0008
RETURN
$004F$
_Usart_Write:
$004F$
L_Usart_Write_3:
$004F$3000
MOVLW
0
$0050$1303
BCF STATUS,RP1
$0051$1683
BSF STATUS,RP0
$0052$1898
BTFSCTXSTA,1
$0053$3001
MOVLW
1
$0054$00F1
MOVWF STACK_1
$0055$0871
MOVFSTACK_1,0
$0056$3A00
XORLW
0
BTFSSSTATUS,Z
$0057$1D03
$0058$285B
GOTOL_Usart_Write_4
$0059$0000
NOP
$005A
$284F
GOTOL_Usart_Write_3
$005B$
L_Usart_Write_4:
$005B$1283
BCF STATUS,RP0
$005C$0826
MOVFFARG_Usart_Write+0,0
$005D
$0099
MOVWF TXREG
$005E$0008
RETURN
$005F$
_VDelay_ms:
;delays.c,68::
voidVDelay_ms(unsignedTime_ms){
;delays.c,70::
NumberOfCyc=Clock_KHz()>>2;//thiswillbedone
bycompiler,noasmwillbegenereatedexceptthatforassignment;
$005F$30E8
MOVLW
232
$0060$1303
BCF STATUS,RP1
$0061$1283
BCF STATUS,RP0
49
$0062$00A8
MOVWF VDelay_ms_NumberOfCyc_L0
$0063$3003
MOVLW
3
$0064$00A9
MOVWF VDelay_ms_NumberOfCyc_L0+1
$0065$01AA
CLRF VDelay_ms_NumberOfCyc_L0+2
$0066$01AB
CLRF VDelay_ms_NumberOfCyc_L0+3
;delays.c,71::
NumberOfCyc*=Time_ms;
$0067$0826
MOVFFARG_VDelay_ms+0,0
$0068$00F0
MOVWF STACK_0
$0069$0827
MOVFFARG_VDelay_ms+1,0
$006A
$00F1
MOVWF STACK_0+1
$006B$01F2
CLRF STACK_0+2
$006C$01F3
CLRF STACK_0+3
$30E8
MOVLW
232
$006D
$006E$00F4
MOVWF STACK_4
$006F$3003
MOVLW
3
$0070$00F5
MOVWF STACK_4+1
$0071$3000
MOVLW
0
$0072$00F6
MOVWF STACK_4+2
$0073$3000
MOVLW
0
$0074$00F7
MOVWF STACK_4+3
$0075$2004
CALL _mul_32x32_u
$0076$0870
MOVFSTACK_0,0
$0077$00A8
MOVWF VDelay_ms_NumberOfCyc_L0
$0078$0871
MOVFSTACK_0+1,0
MOVWF VDelay_ms_NumberOfCyc_L0+1
$0079$00A9
$007A
$0872
MOVFSTACK_0+2,0
$007B$00AA
MOVWF VDelay_ms_NumberOfCyc_L0+2
$007C$0873
MOVFSTACK_0+3,0
$007D
$00AB
MOVWF
VDelay_ms_NumberOfCyc_L0+3
;delays.c,72::
if(NumberOfCyc<690)
$007E$3000
MOVLW
0
$007F$0273
SUBWF
STACK_0+3,0
$0080$1D03
BTFSSSTATUS,Z
$0081$288C
GOTOL_VDelay_ms_5
$0082$3000
MOVLW
0
STACK_0+2,0
$0083$0272
SUBWF
$0084$1D03
BTFSSSTATUS,Z
$0085$288C
GOTOL_VDelay_ms_5
$0086$3002
MOVLW
2
50
$0087$0271
SUBWF
STACK_0+1,0
$0088$1D03
BTFSSSTATUS,Z
$0089$288C
GOTOL_VDelay_ms_5
$008A
$30B2
MOVLW
178
$008B$0270
SUBWF
STACK_0,0
$008C$
L_VDelay_ms_5:
$008C$1803
BTFSCSTATUS,C
$008D
$288F
GOTOL_VDelay_ms_2
;delays.c,73::
return;
$008E$0008
RETURN
$008F$
L_VDelay_ms_2:
;delays.c,74::
NumberOfCyc=690;
178
$008F$30B2
MOVLW
$0090$00F0
MOVWF STACK_0
$0091$3002
MOVLW
2
$0092$00F1
MOVWF STACK_0+1
$0093$01F2
CLRF STACK_0+2
$0094$01F3
CLRF STACK_0+3
$0095$0828
MOVFVDelay_ms_NumberOfCyc_L0,0
$0096$00F4
MOVWF STACK_4
$0097$0829
MOVFVDelay_ms_NumberOfCyc_L0+1,0
$0098$00F5
MOVWF STACK_4+1
$0099$082A
MOVFVDelay_ms_NumberOfCyc_L0+2,0
$009A
$00F6
MOVWF STACK_4+2
$009B$082B
MOVFVDelay_ms_NumberOfCyc_L0+3,0
$009C$00F7
MOVWF STACK_4+3
$009D
$0870
MOVFSTACK_0,0
$009E$02F4
SUBWF
STACK_4,1
$009F$0871
MOVFSTACK_0+1,0
$00A0
$1C03
BTFSSSTATUS,C
$00A1
$0F71
INCFSZ
STACK_0+1,0
$00A2
$02F5
SUBWF
STACK_4+1,1
$00A3
$0872
MOVFSTACK_0+2,0
$00A4
$1C03
BTFSSSTATUS,C
$00A5
$0F72
INCFSZ
STACK_0+2,0
$00A6
$02F6
SUBWF
STACK_4+2,1
$00A7
$0873
MOVFSTACK_0+3,0
$00A8
$1C03
BTFSSSTATUS,C
$00A9
$0F73
INCFSZ
STACK_0+3,0
$00AA
$02F7
SUBWF
STACK_4+3,1
51
$00AB
$0874
MOVFSTACK_4,0
$00AC
$00A8
MOVWF
VDelay_ms_NumberOfCyc_L0
$00AD
$0875
MOVFSTACK_4+1,0
$00AE
$00A9
MOVWF
VDelay_ms_NumberOfCyc_L0+1
$00AF$0876
MOVFSTACK_4+2,0
$00B0$00AA
MOVWF VDelay_ms_NumberOfCyc_L0+2
$00B1$0877
MOVFSTACK_4+3,0
$00B2$00AB
MOVWF VDelay_ms_NumberOfCyc_L0+3
;delays.c,75::
NumberOfCyc=NumberOfCyc>>5;//DecandWhile
belowtakearound32instructions
5
$00B3$3005
MOVLW
$00B4$00F0
MOVWF STACK_0
$00B5$0874
MOVFSTACK_4,0
$00B6$00A8
MOVWF VDelay_ms_NumberOfCyc_L0
$00B7$0875
MOVFSTACK_4+1,0
$00B8$00A9
MOVWF VDelay_ms_NumberOfCyc_L0+1
$00B9$0876
MOVFSTACK_4+2,0
$00BA
$00AA
MOVWF
VDelay_ms_NumberOfCyc_L0+2
$00BB
$0877
MOVFSTACK_4+3,0
$00BC
$00AB
MOVWF
VDelay_ms_NumberOfCyc_L0+3
$00BD
$0870
MOVFSTACK_0,0
$00BE$
L_VDelay_ms_6:
$00BE$1903
BTFSCSTATUS,Z
GOTOL_VDelay_ms_7
$00BF$28C7
$00C0$0CAB
RRF VDelay_ms_NumberOfCyc_L0+3,1
$00C1$0CAA
RRF VDelay_ms_NumberOfCyc_L0+2,1
$00C2$0CA9
RRF VDelay_ms_NumberOfCyc_L0+1,1
$00C3$0CA8
RRF VDelay_ms_NumberOfCyc_L0,1
$00C4$13AB
BCF VDelay_ms_NumberOfCyc_L0+3,7
$00C5$3FFF
ADDLW
255
$00C6$28BE
GOTOL_VDelay_ms_6
$00C7$
L_VDelay_ms_7:
;delays.c,76::
while(NumberOfCyc)
$00C7$
L_VDelay_ms_3:
$00C7$0828
MOVFVDelay_ms_NumberOfCyc_L0,0
$00C8$00F0
MOVWF STACK_0
52
$00C9$0829
MOVFVDelay_ms_NumberOfCyc_L0+1,0
$00CA
$00F1
MOVWF STACK_0+1
$00CB
$082A
MOVFVDelay_ms_NumberOfCyc_L0+2,0
$00CC
$00F2
MOVWF STACK_0+2
$00CD
$082B
MOVFVDelay_ms_NumberOfCyc_L0+3,0
$00CE$00F3
MOVWF STACK_0+3
$00CF$3001
MOVLW
1
$00D0
$02A8
SUBWF
VDelay_ms_NumberOfCyc_L0,1
$00D1
$1C03
BTFSSSTATUS,C
$00D2
$02A9
SUBWF
VDelay_ms_NumberOfCyc_L0+1,1
$00D3
$1C03
BTFSSSTATUS,C
$00D4
$02AA
SUBWF
VDelay_ms_NumberOfCyc_L0+2,1
$00D5
$1C03
BTFSSSTATUS,C
$00D6
$02AB
SUBWF
VDelay_ms_NumberOfCyc_L0+3,1
$00D7
$0870
MOVFSTACK_0,0
$00D8
$0471
IORWF
STACK_0+1,0
$00D9
$0472
IORWF
STACK_0+2,0
$00DA
$0473
IORWF
STACK_0+3,0
$00DB
$1903
BTFSCSTATUS,Z
$00DC
$28E6
GOTOL_VDelay_ms_4
;delays.c,78::
asmnop;
NOP
$00DD
$0000
;delays.c,79::
asmnop;
$00DE
$0000
NOP
;delays.c,80::
asmnop;
$00DF
$0000
NOP
;delays.c,81::
asmnop;
$00E0$0000
NOP
;delays.c,82::
asmnop;
$00E1$0000
NOP
;delays.c,83::
asmnop;
$00E2$0000
NOP
;delays.c,84::
asmnop;
$00E3$0000
NOP
;delays.c,85::
asmnop;
$00E4$0000
NOP
53
;delays.c,86::
}
$00E5$28C7
GOTOL_VDelay_ms_3
$00E6$
L_VDelay_ms_4:
;delays.c,87::
}
$00E6$0008
RETURN
$00E7$
GlobalIniPr:
$00E7$3000
MOVLW
0
$00E8$1303
BCF STATUS,RP1
$00E9$1283
BCF STATUS,RP0
$00EA
$00A1
MOVWF _i+0
$00EB$3000
MOVLW
0
$00EC$00A0
MOVWF _j+0
$00ED
$3000
MOVLW
0
MOVWF _k+0
$00EE$00A2
$00EF$3000
MOVLW
0
$00F0$00A3
MOVWF _l+0
$00F1$3000
MOVLW
0
$00F2$00A4
MOVWF _m+0
$00F3$3000
MOVLW
0
$00F4$00A5
MOVWF _n+0
$00F5$0008
RETURN
$00F6$
_Usart_Init:
$00F6$1303
BCF STATUS,RP1
$00F7$1683
BSF STATUS,RP0
$00F8$1698
BSF TXSTA,5
144
$00F9$3090
MOVLW
$00FA$1283
BCF STATUS,RP0
$00FB$0098
MOVWF RCSTA
$00FC$1683
BSF STATUS,RP0
$00FD
$1787
BSF TRISC,7
$00FE$1307
BCF TRISC,6
$00FF$
L_Usart_Init_0:
$00FF$1283
BCF STATUS,RP0
$0100$1E8C
BTFSSPIR1,5
$0101$2905
GOTOL_Usart_Init_1
$0102$081A
MOVFRCREG,0
$0103$00AA
MOVWF Usart_Init_tmp_L0
$0104$28FF
GOTOL_Usart_Init_0
$0105$
L_Usart_Init_1:
$0105$0008
RETURN
54
$0106$
_main:
;Pr.c,3::
voidmain(){
;Pr.c,6::
TRISB=0x00;
$0106$20E7
CALL GlobalIniPr,1
$0107$1683
BSF STATUS,RP0
$0108$0186
CLRF TRISB,1
;Pr.c,7::
PORTB=0x00;
$0109$1283
BCF STATUS,RP0
$010A
$0186
CLRF PORTB,1
;Pr.c,8::
TRISD=0x00;
$010B$1683
BSF STATUS,RP0
$010C$0188
CLRF TRISD,1
;Pr.c,9::
PORTD=0x00;
$010D
$1283
BCF STATUS,RP0
$010E$0188
CLRF PORTD,1
;Pr.c,10::
TRISA=0b111111;
$010F$303F
MOVLW
63
$0110$1683
BSF STATUS,RP0
$0111$0085
MOVWF TRISA
;Pr.c,12::
ADCON0=0;//ParametriA/Dkonvertora
BCF STATUS,RP0
$0112$1283
$0113$019F
CLRF ADCON0,1
;Pr.c,13::
ADCON1=6;
$0114$3006
MOVLW
6
$0115$1683
BSF STATUS,RP0
$0116$009F
MOVWF ADCON1
;Pr.c,15::
Usart_Init(2400);//InicijalizacijaUSARTmodula
$0117$3067
MOVLW
103
$0118$0099
MOVWF SPBRG
$0119$1518
BSF TXSTA,BRGH
$011A
$20F6
CALL _Usart_Init
do{
;Pr.c,17::
$011B$
L_main_0:
;Pr.c,20::
j.F0=PORTA.F5;
$011B$3000
MOVLW
0
$011C$1A85
BTFSCPORTA,5
$011D
$3001
MOVLW
1
$011E$00F1
MOVWF STACK_1
$011F$3000
MOVLW
0
$0120$1871
BTFSCSTACK_1,0
55
$0121$3001
MOVLW
1
$0122$0620
XORWF
_j,0
$0123$3901
ANDLW
1
$0124$06A0
XORWF
_j,1
;Pr.c,21::
j.F1=PORTA.F6;
$0125$3000
MOVLW
0
$0126$1B05
BTFSCPORTA,6
$0127$3001
MOVLW
1
$0128$00F1
MOVWF STACK_1
$0129$3000
MOVLW
0
$012A
$1871
BTFSCSTACK_1,0
2
$012B$3002
MOVLW
$012C$0620
XORWF
_j,0
$012D
$3902
ANDLW
2
$012E$06A0
XORWF
_j,1
;Pr.c,24::
if(Usart_Data_Ready()){//Ifdataisreceived
$012F$203B
CALL _Usart_Data_Ready
$0130$0870
MOVFSTACK_0,0
$0131$1903
BTFSCSTATUS,Z
$0132$2A98
GOTOL_main_2
;Pr.c,25::
i=Usart_Read();//Readthereceiveddata
$0133$2044
CALL _Usart_Read
$0134$0870
MOVFSTACK_0,0
$0135$00A1
MOVWF _i
;Pr.c,26::
Usart_Write(i);//SenddataviaUSART
$0136$0870
MOVFSTACK_0,0
$0137$00A6
MOVWF FARG_Usart_Write+0
$0138$204F
CALL _Usart_Write
;Pr.c,28::
k.F1=i.F7;
$0139$3000
MOVLW
0
$013A
$1BA1
BTFSC_i,7
$013B$3001
MOVLW
1
$013C$00F1
MOVWF STACK_1
$013D
$3000
MOVLW
0
$013E$1871
BTFSCSTACK_1,0
$013F$3002
MOVLW
2
$0140$0622
XORWF
_k,0
$0141$3902
ANDLW
2
$0142$06A2
XORWF
_k,1
;Pr.c,29::
k.F0=i.F6;
56
$0143$3000
MOVLW
0
$0144$1B21
BTFSC_i,6
$0145$3001
MOVLW
1
$0146$00F1
MOVWF STACK_1
$0147$3000
MOVLW
0
$0148$1871
BTFSCSTACK_1,0
$0149$3001
MOVLW
1
$014A
$0622
XORWF
_k,0
$014B$3901
ANDLW
1
$014C$06A2
XORWF
_k,1
;Pr.c,30::
l.F1=i.F5;
0
$014D
$3000
MOVLW
$014E$1AA1
BTFSC_i,5
$014F$3001
MOVLW
1
$0150$00F1
MOVWF STACK_1
$0151$3000
MOVLW
0
$0152$1871
BTFSCSTACK_1,0
$0153$3002
MOVLW
2
$0154$0623
XORWF
_l,0
$0155$3902
ANDLW
2
$0156$06A3
XORWF
_l,1
;Pr.c,31::
l.F0=i.F4;
$0157$3000
MOVLW
0
$0158$1A21
BTFSC_i,4
$0159$3001
MOVLW
1
$015A
$00F1
MOVWF STACK_1
$015B$3000
MOVLW
0
$015C$1871
BTFSCSTACK_1,0
$015D
$3001
MOVLW
1
$015E$0623
XORWF
_l,0
$015F$3901
ANDLW
1
$0160$06A3
XORWF
_l,1
;Pr.c,32::
m.F1=i.F3;
$0161$3000
MOVLW
0
$0162$19A1
BTFSC_i,3
$0163$3001
MOVLW
1
$0164$00F1
MOVWF STACK_1
$0165$3000
MOVLW
0
$0166$1871
BTFSCSTACK_1,0
$0167$3002
MOVLW
2
57
$0168$0624
XORWF
_m,0
$0169$3902
ANDLW
2
$016A
$06A4
XORWF
_m,1
;Pr.c,33::
m.F0=i.F2;
$016B$3000
MOVLW
0
$016C$1921
BTFSC_i,2
$016D
$3001
MOVLW
1
$016E$00F1
MOVWF STACK_1
$016F$3000
MOVLW
0
$0170$1871
BTFSCSTACK_1,0
$0171$3001
MOVLW
1
_m,0
$0172$0624
XORWF
$0173$3901
ANDLW
1
$0174$06A4
XORWF
_m,1
;Pr.c,34::
n.F1=i.F1;
$0175$3000
MOVLW
0
$0176$18A1
BTFSC_i,1
$0177$3001
MOVLW
1
$0178$00F1
MOVWF STACK_1
$0179$3000
MOVLW
0
$017A
$1871
BTFSCSTACK_1,0
$017B$3002
MOVLW
2
$017C$0625
XORWF
_n,0
$017D
$3902
ANDLW
2
$017E$06A5
XORWF
_n,1
;Pr.c,35::
n.F0=i.F0;
$017F$3001
MOVLW
1
$0180$0521
ANDWF
_i,0
$0181$00F0
MOVWF STACK_0
$0182$3000
MOVLW
0
$0183$1870
BTFSCSTACK_0,0
$0184$3001
MOVLW
1
$0185$0625
XORWF
_n,0
$0186$3901
ANDLW
1
XORWF
_n,1
$0187$06A5
;Pr.c,38::
if(PORTA.F2==1){
$0188$3000
MOVLW
0
$0189$1905
BTFSCPORTA,2
$018A
$3001
MOVLW
1
$018B$00F1
MOVWF STACK_1
58
$018C$0871
MOVFSTACK_1,0
$018D
$3A01
XORLW
1
$018E$1D03
BTFSSSTATUS,Z
$018F$2A3A
GOTOL_main_3
;Pr.c,40::
if(k==3){
$0190$0822
MOVF_k,0
$0191$3A03
XORLW
3
$0192$1D03
BTFSSSTATUS,Z
$0193$2995
GOTOL_main_4
;Pr.c,41::
PORTB=0b00000000;
$0194$0186
CLRF PORTB,1
;Pr.c,42::
}
$0195$
L_main_4:
;Pr.c,44::
if(k==2){
$0195$0822
MOVF_k,0
$0196$3A02
XORLW
2
$0197$1D03
BTFSSSTATUS,Z
$0198$299B
GOTOL_main_5
;Pr.c,45::
PORTB=0b00100000;
$0199$3020
MOVLW
32
$019A
$0086
MOVWF PORTB
;Pr.c,46::
}
$019B$
L_main_5:
;Pr.c,48::
if(k==1){
$019B$0822
MOVF_k,0
$019C$3A01
XORLW
1
$019D
$1D03
BTFSSSTATUS,Z
$019E$29A1
GOTOL_main_6
;Pr.c,49::
PORTB=0b10000000;
$019F$3080
MOVLW
128
$01A0
$0086
MOVWF PORTB
;Pr.c,50::
}
$01A1
$
L_main_6:
;Pr.c,52::
if(k==0){
$01A1
$0822
MOVF_k,0
0
$01A2
$3A00
XORLW
$01A3
$1D03
BTFSSSTATUS,Z
$01A4
$29A7
GOTOL_main_7
;Pr.c,53::
PORTB=0b11100000;
$01A5
$30E0
MOVLW
224
59
$01A6
$0086
MOVWF PORTB
;Pr.c,54::
}
$01A7
$
L_main_7:
;Pr.c,55::
Vdelay_ms(j+1);
$01A7
$0820
MOVF_j,0
$01A8
$3F01
ADDLW
1
$01A9
$00A6
MOVWF FARG_VDelay_ms+0
$01AA
$01A7
CLRF FARG_VDelay_ms+1
$01AB
$1803
BTFSCSTATUS,C
$01AC
$0AA7
INCF FARG_VDelay_ms+1,1
$01AD
$205F
CALL _VDelay_ms
;Pr.c,57::
if(l==3){
BCF STATUS,RP1
$01AE
$1303
$01AF$1283
BCF STATUS,RP0
$01B0$0823
MOVF_l,0
$01B1$3A03
XORLW
3
$01B2$1D03
BTFSSSTATUS,Z
$01B3$29B5
GOTOL_main_8
;Pr.c,58::
PORTB=0b00000000;
$01B4$0186
CLRF PORTB,1
;Pr.c,59::
}
$01B5$
L_main_8:
;Pr.c,61::
if(l==2){
$01B5$1303
BCF STATUS,RP1
$01B6$1283
BCF STATUS,RP0
MOVF_l,0
$01B7$0823
$01B8$3A02
XORLW
2
$01B9$1D03
BTFSSSTATUS,Z
$01BA
$29BD
GOTOL_main_9
;Pr.c,62::
PORTB=0b00100000;
$01BB
$3020
MOVLW
32
$01BC
$0086
MOVWF PORTB
;Pr.c,63::
}
$01BD
$
L_main_9:
;Pr.c,65::
if(l==1){
$01BD
$1303
BCF STATUS,RP1
$01BE$1283
BCF STATUS,RP0
$01BF$0823
MOVF_l,0
$01C0$3A01
XORLW
1
$01C1$1D03
BTFSSSTATUS,Z
60
$01C2$29C5
GOTOL_main_10
;Pr.c,66::
PORTB=0b10000000;
$01C3$3080
MOVLW
128
$01C4$0086
MOVWF PORTB
;Pr.c,67::
}
$01C5$
L_main_10:
;Pr.c,69::
if(l==0){
$01C5$1303
BCF STATUS,RP1
$01C6$1283
BCF STATUS,RP0
$01C7$0823
MOVF_l,0
$01C8$3A00
XORLW
0
$01C9$1D03
BTFSSSTATUS,Z
$01CA
$29CD
GOTOL_main_11
;Pr.c,70::
PORTB=0b11100000;
$01CB
$30E0
MOVLW
224
$01CC
$0086
MOVWF PORTB
;Pr.c,71::
}
$01CD
$
L_main_11:
;Pr.c,72::
Vdelay_ms(j+1);
$01CD
$1303
BCF STATUS,RP1
$01CE$1283
BCF STATUS,RP0
$01CF$0820
MOVF_j,0
$01D0
$3F01
ADDLW
1
$01D1
$00A6
MOVWF FARG_VDelay_ms+0
$01D2
$01A7
CLRF FARG_VDelay_ms+1
$01D3
$1803
BTFSCSTATUS,C
$01D4
$0AA7
INCF FARG_VDelay_ms+1,1
$01D5
$205F
CALL _VDelay_ms
;Pr.c,74::
if(m==3){
$01D6
$1303
BCF STATUS,RP1
$01D7
$1283
BCF STATUS,RP0
$01D8
$0824
MOVF_m,0
$01D9
$3A03
XORLW
3
$01DA
$1D03
BTFSSSTATUS,Z
$01DB
$29DD
GOTOL_main_12
;Pr.c,75::
PORTB=0b00000000;
$01DC
$0186
CLRF PORTB,1
;Pr.c,76::
}
$01DD
$
L_main_12:
;Pr.c,78::
if(m==2){
61
$01DD
$1303
BCF STATUS,RP1
$01DE
$1283
BCF STATUS,RP0
$01DF
$0824
MOVF_m,0
$01E0$3A02
XORLW
2
$01E1$1D03
BTFSSSTATUS,Z
$01E2$29E5
GOTOL_main_13
;Pr.c,79::
PORTB=0b00100000;
$01E3$3020
MOVLW
32
$01E4$0086
MOVWF PORTB
;Pr.c,80::
}
$01E5$
L_main_13:
;Pr.c,82::
if(m==1){
$01E5$1303
BCF STATUS,RP1
$01E6$1283
BCF STATUS,RP0
$01E7$0824
MOVF_m,0
$01E8$3A01
XORLW
1
$01E9$1D03
BTFSSSTATUS,Z
$01EA
$29ED
GOTOL_main_14
;Pr.c,83::
PORTB=0b10000000;
$01EB$3080
MOVLW
128
$01EC$0086
MOVWF PORTB
;Pr.c,84::
}
$01ED
$
L_main_14:
if(m==0){
;Pr.c,86::
$01ED
$1303
BCF STATUS,RP1
$01EE$1283
BCF STATUS,RP0
$01EF$0824
MOVF_m,0
$01F0$3A00
XORLW
0
$01F1$1D03
BTFSSSTATUS,Z
$01F2$29F5
GOTOL_main_15
;Pr.c,87::
PORTB=0b11100000;
$01F3$30E0
MOVLW
224
$01F4$0086
MOVWF PORTB
;Pr.c,88::
}
$01F5$
L_main_15:
Vdelay_ms(j+1);
;Pr.c,89::
$01F5$1303
BCF STATUS,RP1
$01F6$1283
BCF STATUS,RP0
$01F7$0820
MOVF_j,0
$01F8$3F01
ADDLW
1
62
$01F9$00A6
MOVWF FARG_VDelay_ms+0
$01FA$01A7
CLRF FARG_VDelay_ms+1
$01FB$1803
BTFSCSTATUS,C
$01FC$0AA7
INCF FARG_VDelay_ms+1,1
$01FD
$205F
CALL _VDelay_ms
;Pr.c,91::
if(n==3){
$01FE$1303
BCF STATUS,RP1
$01FF$1283
BCF STATUS,RP0
$0200$0825
MOVF_n,0
$0201$3A03
XORLW
3
$0202$1D03
BTFSSSTATUS,Z
$0203$2A05
GOTOL_main_16
;Pr.c,92::
PORTB=0b00000000;
$0204$0186
CLRF PORTB,1
;Pr.c,93::
}
$0205$
L_main_16:
;Pr.c,95::
if(n==2){
$0205$1303
BCF STATUS,RP1
$0206$1283
BCF STATUS,RP0
$0207$0825
MOVF_n,0
$0208$3A02
XORLW
2
$0209$1D03
BTFSSSTATUS,Z
$2A0D
GOTOL_main_17
$020A
;Pr.c,96::
PORTB=0b00100000;
$020B$3020
MOVLW
32
$020C$0086
MOVWF PORTB
;Pr.c,97::
}
$020D
$
L_main_17:
;Pr.c,99::
if(n==1){
$020D
$1303
BCF STATUS,RP1
$020E$1283
BCF STATUS,RP0
$020F$0825
MOVF_n,0
$0210$3A01
XORLW
1
$0211$1D03
BTFSSSTATUS,Z
GOTOL_main_18
$0212$2A15
;Pr.c,100::
PORTB=0b10000000;
$0213$3080
MOVLW
128
$0214$0086
MOVWF PORTB
;Pr.c,101::
}
$0215$
L_main_18:
63
;Pr.c,103::
if(n==0){
$0215$1303
BCF STATUS,RP1
$0216$1283
BCF STATUS,RP0
$0217$0825
MOVF_n,0
$0218$3A00
XORLW
0
$0219$1D03
BTFSSSTATUS,Z
$021A
$2A1D
GOTOL_main_19
;Pr.c,104::
PORTB=0b11100000;
$021B$30E0
MOVLW
224
$021C$0086
MOVWF PORTB
;Pr.c,105::
}
$021D
$
L_main_19:
;Pr.c,106::
Vdelay_ms(j+1);
$021D
$1303
BCF STATUS,RP1
$021E$1283
BCF STATUS,RP0
$021F$0820
MOVF_j,0
$0220$3F01
ADDLW
1
$0221$00A6
MOVWF FARG_VDelay_ms+0
$0222$01A7
CLRF FARG_VDelay_ms+1
$0223$1803
BTFSCSTATUS,C
$0224$0AA7
INCF FARG_VDelay_ms+1,1
$0225$205F
CALL _VDelay_ms
;Pr.c,108::
PORTB=0b01100000;
MOVLW
96
$0226$3060
$0227$1303
BCF STATUS,RP1
$0228$1283
BCF STATUS,RP0
$0229$0086
MOVWF PORTB
;Pr.c,109::
delay_ms(4);
$022A
$3006
MOVLW
6
$022B$00FB
MOVWF STACK_11
$022C$30FF
MOVLW
255
$022D
$00FA
MOVWF STACK_10
$022E$0BFB
DECFSZ
STACK_11,F
$022F$2A31
GOTO$+2
$0230$2A34
GOTO$+4
STACK_10,F
$0231$0BFA
DECFSZ
$0232$2A31
GOTO$1
$0233$2A2E
GOTO$5
$0234$302C
MOVLW
44
$0235$00FA
MOVWF STACK_10
64
$0236$0BFA
DECFSZ
STACK_10,F
$0237$2A36
GOTO$1
$0238$0000
NOP
$0239$0000
NOP
;Pr.c,111::
}
$023A
$
L_main_3:
;Pr.c,113::
if(PORTA.F2==0){
$023A
$3000
MOVLW
0
$023B$1303
BCF STATUS,RP1
$023C$1283
BCF STATUS,RP0
$023D
$1905
BTFSCPORTA,2
$023E$3001
MOVLW
1
$023F$00F1
MOVWF STACK_1
$0240$0871
MOVFSTACK_1,0
$0241$3A00
XORLW
0
$0242$1D03
BTFSSSTATUS,Z
$0243$2A98
GOTOL_main_20
;Pr.c,115::
if(k==3){
$0244$0822
MOVF_k,0
$0245$3A03
XORLW
3
$0246$1D03
BTFSSSTATUS,Z
$0247$2A49
GOTOL_main_21
;Pr.c,116::
PORTB=0b00000000;
$0248$0186
CLRF PORTB,1
;Pr.c,117::
}
$0249$
L_main_21:
;Pr.c,119::
if(k==2){
$0249$1303
BCF STATUS,RP1
$024A
$1283
BCF STATUS,RP0
$024B$0822
MOVF_k,0
$024C$3A02
XORLW
2
$024D
$1D03
BTFSSSTATUS,Z
$024E$2A51
GOTOL_main_22
;Pr.c,120::
PORTB=0b00100000;
32
$024F$3020
MOVLW
$0250$0086
MOVWF PORTB
;Pr.c,121::
}
$0251$
L_main_22:
;Pr.c,123::
if(k==1){
$0251$1303
BCF STATUS,RP1
65
$0252$1283
BCF STATUS,RP0
$0253$0822
MOVF_k,0
$0254$3A01
XORLW
1
$0255$1D03
BTFSSSTATUS,Z
$0256$2A59
GOTOL_main_23
;Pr.c,124::
PORTB=0b10000000;
$0257$3080
MOVLW
128
$0258$0086
MOVWF PORTB
;Pr.c,125::
}
$0259$
L_main_23:
;Pr.c,127::
if(k==0){
$0259$1303
BCF STATUS,RP1
$025A
$1283
BCF STATUS,RP0
$025B$0822
MOVF_k,0
$025C$3A00
XORLW
0
$025D
$1D03
BTFSSSTATUS,Z
$025E$2A61
GOTOL_main_24
;Pr.c,128::
PORTB=0b11100000;
$025F$30E0
MOVLW
224
$0260$0086
MOVWF PORTB
;Pr.c,129::
}
$0261$
L_main_24:
;Pr.c,130::
Vdelay_ms(l+1);
$0261$1303
BCF STATUS,RP1
$0262$1283
BCF STATUS,RP0
$0263$0823
MOVF_l,0
$0264$3F01
ADDLW
1
$0265$00A6
MOVWF FARG_VDelay_ms+0
$0266$01A7
CLRF FARG_VDelay_ms+1
$0267$1803
BTFSCSTATUS,C
$0268$0AA7
INCF FARG_VDelay_ms+1,1
$0269$205F
CALL _VDelay_ms
;Pr.c,131::
PORTB=0b01100000;
$026A
$3060
MOVLW
96
$026B$1303
BCF STATUS,RP1
BCF STATUS,RP0
$026C$1283
$026D
$0086
MOVWF PORTB
;Pr.c,133::
if(m==3){
$026E$0824
MOVF_m,0
$026F$3A03
XORLW
3
66
$0270$1D03
BTFSSSTATUS,Z
$0271$2A73
GOTOL_main_25
;Pr.c,134::
PORTB=0b00000000;
$0272$0186
CLRF PORTB,1
;Pr.c,135::
}
$0273$
L_main_25:
;Pr.c,137::
if(m==2){
$0273$1303
BCF STATUS,RP1
$0274$1283
BCF STATUS,RP0
$0275$0824
MOVF_m,0
$0276$3A02
XORLW
2
BTFSSSTATUS,Z
$0277$1D03
$0278$2A7B
GOTOL_main_26
;Pr.c,138::
PORTB=0b00100000;
$0279$3020
MOVLW
32
$027A
$0086
MOVWF PORTB
;Pr.c,139::
}
$027B$
L_main_26:
;Pr.c,141::
if(m==1){
$027B$1303
BCF STATUS,RP1
$027C$1283
BCF STATUS,RP0
$027D
$0824
MOVF_m,0
$027E$3A01
XORLW
1
BTFSSSTATUS,Z
$027F$1D03
$0280$2A83
GOTOL_main_27
;Pr.c,142::
PORTB=0b10000000;
$0281$3080
MOVLW
128
$0282$0086
MOVWF PORTB
;Pr.c,143::
}
$0283$
L_main_27:
;Pr.c,145::
if(m==0){
$0283$1303
BCF STATUS,RP1
$0284$1283
BCF STATUS,RP0
$0285$0824
MOVF_m,0
$0286$3A00
XORLW
0
BTFSSSTATUS,Z
$0287$1D03
$0288$2A8B
GOTOL_main_28
;Pr.c,146::
PORTB=0b11100000;
$0289$30E0
MOVLW
224
$028A
$0086
MOVWF PORTB
67
;Pr.c,147::
}
$028B$
L_main_28:
;Pr.c,148::
Vdelay_ms(n+1);
$028B$1303
BCF STATUS,RP1
$028C$1283
BCF STATUS,RP0
$028D
$0825
MOVF_n,0
$028E$3F01
ADDLW
1
$028F$00A6
MOVWF FARG_VDelay_ms+0
$0290$01A7
CLRF FARG_VDelay_ms+1
$0291$1803
BTFSCSTATUS,C
$0292$0AA7
INCF FARG_VDelay_ms+1,1
$0293$205F
CALL _VDelay_ms
;Pr.c,149::
PORTB=0b01100000;
$0294$3060
MOVLW
96
$0295$1303
BCF STATUS,RP1
$0296$1283
BCF STATUS,RP0
$0297$0086
MOVWF PORTB
;Pr.c,152::
}
$0298$
L_main_20:
;Pr.c,154::
}
$0298$
L_main_2:
;Pr.c,158::
if(PORTA.F0==0){
$0298$3001
MOVLW
1
$0299$1303
BCF STATUS,RP1
BCF STATUS,RP0
$029A
$1283
$029B$0505
ANDWF
PORTA,0
$029C$00F1
MOVWF STACK_1
$029D
$0871
MOVFSTACK_1,0
$029E$3A00
XORLW
0
$029F$1D03
BTFSSSTATUS,Z
$02A0
$2BED
GOTOL_main_29
;Pr.c,160::
PORTB=0b11100000;//5
$02A1
$30E0
MOVLW
224
$02A2
$0086
MOVWF PORTB
;Pr.c,161::
delay_ms(1);
$02A3
$3002
MOVLW
2
$02A4
$00FB
MOVWF STACK_11
$02A5
$30FF
MOVLW
255
$02A6
$00FA
MOVWF STACK_10
$02A7
$0BFB
DECFSZ
STACK_11,F
68
$02A8
$2AAA
GOTO$+2
$02A9
$2AAD
GOTO$+4
$02AA
$0BFA
DECFSZ
STACK_10,F
$02AB
$2AAA
GOTO$1
$02AC
$2AA7
GOTO$5
$02AD
$304A
MOVLW
74
$02AE
$00FA
MOVWF STACK_10
$02AF$0BFA
DECFSZ
STACK_10,F
$02B0$2AAF
GOTO$1
;Pr.c,162::
PORTB=0b00100000;//+2.5
$02B1$3020
MOVLW
32
MOVWF PORTB
$02B2$0086
;Pr.c,163::
delay_ms(1);
$02B3$3002
MOVLW
2
$02B4$00FB
MOVWF STACK_11
$02B5$30FF
MOVLW
255
$02B6$00FA
MOVWF STACK_10
$02B7$0BFB
DECFSZ
STACK_11,F
$02B8$2ABA
GOTO$+2
$02B9$2ABD
GOTO$+4
$02BA
$0BFA
DECFSZ
STACK_10,F
$02BB
$2ABA
GOTO$1
$02BC
$2AB7
GOTO$5
$02BD
$304A
MOVLW
74
$02BE$00FA
MOVWF STACK_10
$02BF$0BFA
DECFSZ
STACK_10,F
$02C0$2ABF
GOTO$1
;Pr.c,164::
PORTB=0b00000000;//+5
$02C1$0186
CLRF PORTB,1
;Pr.c,165::
delay_ms(1);
$02C2$3002
MOVLW
2
$02C3$00FB
MOVWF STACK_11
$02C4$30FF
MOVLW
255
$02C5$00FA
MOVWF STACK_10
$02C6$0BFB
DECFSZ
STACK_11,F
$02C7$2AC9
GOTO$+2
$02C8$2ACC
GOTO$+4
$02C9$0BFA
DECFSZ
STACK_10,F
$02CA
$2AC9
GOTO$1
$02CB
$2AC6
GOTO$5
69
$02CC
$304A
MOVLW
74
$02CD
$00FA
MOVWF STACK_10
$02CE$0BFA
DECFSZ
STACK_10,F
$02CF$2ACE
GOTO$1
;Pr.c,166::
PORTB=0b10000000;//2.5
$02D0
$3080
MOVLW
128
$02D1
$0086
MOVWF PORTB
;Pr.c,167::
delay_ms(1);
$02D2
$3002
MOVLW
2
$02D3
$00FB
MOVWF STACK_11
$02D4
$30FF
MOVLW
255
$02D5
$00FA
MOVWF STACK_10
$02D6
$0BFB
DECFSZ
STACK_11,F
$02D7
$2AD9
GOTO$+2
$02D8
$2ADC
GOTO$+4
$02D9
$0BFA
DECFSZ
STACK_10,F
$02DA
$2AD9
GOTO$1
$02DB
$2AD6
GOTO$5
$02DC
$304A
MOVLW
74
$02DD
$00FA
MOVWF STACK_10
$02DE
$0BFA
DECFSZ
STACK_10,F
$02DF
$2ADE
GOTO$1
;Pr.c,168::
PORTB=0b01100000;//0
$02E0$3060
MOVLW
96
$02E1$0086
MOVWF PORTB
;Pr.c,169::
delay_ms(4);
$02E2$3006
MOVLW
6
$02E3$00FB
MOVWF STACK_11
$02E4$30FF
MOVLW
255
$02E5$00FA
MOVWF STACK_10
$02E6$0BFB
DECFSZ
STACK_11,F
$02E7$2AE9
GOTO$+2
$02E8$2AEC
GOTO$+4
$02E9$0BFA
DECFSZ
STACK_10,F
GOTO$1
$02EA
$2AE9
$02EB$2AE6
GOTO$5
$02EC$302C
MOVLW
44
$02ED
$00FA
MOVWF STACK_10
$02EE$0BFA
DECFSZ
STACK_10,F
$02EF$2AEE
GOTO$1
70
$02F0$0000
NOP
$02F1$0000
NOP
;Pr.c,171::
PORTB=0b11100000;//5
$02F2$30E0
MOVLW
224
$02F3$0086
MOVWF PORTB
;Pr.c,172::
delay_ms(2);
$02F4$3003
MOVLW
3
$02F5$00FB
MOVWF STACK_11
$02F6$30FF
MOVLW
255
$02F7$00FA
MOVWF STACK_10
$02F8$0BFB
DECFSZ
STACK_11,F
$02F9$2AFB
GOTO$+2
GOTO$+4
$02FA$2AFE
$02FB$0BFA
DECFSZ
STACK_10,F
$02FC$2AFB
GOTO$1
$02FD
$2AF8
GOTO$5
$02FE$3096
MOVLW
150
$02FF$00FA
MOVWF STACK_10
$0300$0BFA
DECFSZ
STACK_10,F
$0301$2B00
GOTO$1
;Pr.c,173::
PORTB=0b00100000;//+2.5
$0302$3020
MOVLW
32
$0303$0086
MOVWF PORTB
;Pr.c,174::
delay_ms(2);
$0304$3003
MOVLW
3
$0305$00FB
MOVWF STACK_11
$0306$30FF
MOVLW
255
$0307$00FA
MOVWF STACK_10
$0308$0BFB
DECFSZ
STACK_11,F
$0309$2B0B
GOTO$+2
$030A
$2B0E
GOTO$+4
$030B$0BFA
DECFSZ
STACK_10,F
$030C$2B0B
GOTO$1
$030D
$2B08
GOTO$5
$030E$3096
MOVLW
150
MOVWF STACK_10
$030F$00FA
$0310$0BFA
DECFSZ
STACK_10,F
$0311$2B10
GOTO$1
;Pr.c,175::
PORTB=0b00000000;//+5
$0312$0186
CLRF PORTB,1
71
;Pr.c,176::
delay_ms(2);
$0313$3003
MOVLW
3
$0314$00FB
MOVWF STACK_11
$0315$30FF
MOVLW
255
$0316$00FA
MOVWF STACK_10
$0317$0BFB
DECFSZ
STACK_11,F
$0318$2B1A
GOTO$+2
$0319$2B1D
GOTO$+4
$031A
$0BFA
DECFSZ
STACK_10,F
$031B$2B1A
GOTO$1
$031C$2B17
GOTO$5
$031D
$3096
MOVLW
150
MOVWF STACK_10
$031E$00FA
$031F$0BFA
DECFSZ
STACK_10,F
$0320$2B1F
GOTO$1
;Pr.c,177::
PORTB=0b10000000;//2.5
$0321$3080
MOVLW
128
$0322$0086
MOVWF PORTB
;Pr.c,178::
delay_ms(2);
$0323$3003
MOVLW
3
$0324$00FB
MOVWF STACK_11
$0325$30FF
MOVLW
255
$0326$00FA
MOVWF STACK_10
STACK_11,F
$0327$0BFB
DECFSZ
$0328$2B2A
GOTO$+2
$0329$2B2D
GOTO$+4
$032A
$0BFA
DECFSZ
STACK_10,F
$032B$2B2A
GOTO$1
$032C$2B27
GOTO$5
$032D
$3096
MOVLW
150
$032E$00FA
MOVWF STACK_10
$032F$0BFA
DECFSZ
STACK_10,F
$0330$2B2F
GOTO$1
;Pr.c,179::
PORTB=0b01100000;//0
MOVLW
96
$0331$3060
$0332$0086
MOVWF PORTB
;Pr.c,180::
delay_ms(4);
$0333$3006
MOVLW
6
$0334$00FB
MOVWF STACK_11
$0335$30FF
MOVLW
255
72
$0336$00FA
MOVWF STACK_10
$0337$0BFB
DECFSZ
STACK_11,F
$0338$2B3A
GOTO$+2
$0339$2B3D
GOTO$+4
$033A
$0BFA
DECFSZ
STACK_10,F
$033B$2B3A
GOTO$1
$033C$2B37
GOTO$5
$033D
$302C
MOVLW
44
$033E$00FA
MOVWF STACK_10
$033F$0BFA
DECFSZ
STACK_10,F
$0340$2B3F
GOTO$1
NOP
$0341$0000
$0342$0000
NOP
;Pr.c,182::
PORTB=0b11100000;//5
$0343$30E0
MOVLW
224
$0344$0086
MOVWF PORTB
;Pr.c,183::
delay_ms(3);
$0345$3004
MOVLW
4
$0346$00FB
MOVWF STACK_11
$0347$30FF
MOVLW
255
$0348$00FA
MOVWF STACK_10
$0349$0BFB
DECFSZ
STACK_11,F
$034A
$2B4C
GOTO$+2
$034B$2B4F
GOTO$+4
$034C$0BFA
DECFSZ
STACK_10,F
$034D
$2B4C
GOTO$1
$034E$2B49
GOTO$5
$034F$30E2
MOVLW
226
$0350$00FA
MOVWF STACK_10
$0351$0BFA
DECFSZ
STACK_10,F
$0352$2B51
GOTO$1
;Pr.c,184::
PORTB=0b10000000;//2.5
$0353$3080
MOVLW
128
$0354$0086
MOVWF PORTB
;Pr.c,185::
delay_ms(3);
$0355$3004
MOVLW
4
$0356$00FB
MOVWF STACK_11
$0357$30FF
MOVLW
255
$0358$00FA
MOVWF STACK_10
$0359$0BFB
DECFSZ
STACK_11,F
73
$035A
$2B5C
GOTO$+2
$035B$2B5F
GOTO$+4
$035C$0BFA
DECFSZ
STACK_10,F
$035D
$2B5C
GOTO$1
$035E$2B59
GOTO$5
$035F$30E2
MOVLW
226
$0360$00FA
MOVWF STACK_10
$0361$0BFA
DECFSZ
STACK_10,F
$0362$2B61
GOTO$1
;Pr.c,186::
PORTB=0b00100000;//+2.5
$0363$3020
MOVLW
32
$0364$0086
MOVWF PORTB
;Pr.c,187::
delay_ms(3);
$0365$3004
MOVLW
4
$0366$00FB
MOVWF STACK_11
$0367$30FF
MOVLW
255
$0368$00FA
MOVWF STACK_10
$0369$0BFB
DECFSZ
STACK_11,F
$036A
$2B6C
GOTO$+2
$036B$2B6F
GOTO$+4
$036C$0BFA
DECFSZ
STACK_10,F
$036D
$2B6C
GOTO$1
$036E$2B69
GOTO$5
$036F$30E2
MOVLW
226
$0370$00FA
MOVWF STACK_10
$0371$0BFA
DECFSZ
STACK_10,F
$0372$2B71
GOTO$1
;Pr.c,188::
PORTB=0b00000000;//+5
$0373$0186
CLRF PORTB,1
;Pr.c,189::
delay_ms(3);
$0374$3004
MOVLW
4
$0375$00FB
MOVWF STACK_11
$0376$30FF
MOVLW
255
$0377$00FA
MOVWF STACK_10
DECFSZ
STACK_11,F
$0378$0BFB
$0379$2B7B
GOTO$+2
$037A
$2B7E
GOTO$+4
$037B$0BFA
DECFSZ
STACK_10,F
$037C$2B7B
GOTO$1
$037D
$2B78
GOTO$5
74
$037E$30E2
MOVLW
226
$037F$00FA
MOVWF STACK_10
$0380$0BFA
DECFSZ
STACK_10,F
$0381$2B80
GOTO$1
;Pr.c,190::
PORTB=0b01100000;//0
$0382$3060
MOVLW
96
$0383$0086
MOVWF PORTB
;Pr.c,191::
delay_ms(4);
$0384$3006
MOVLW
6
$0385$00FB
MOVWF STACK_11
$0386$30FF
MOVLW
255
$0387$00FA
MOVWF STACK_10
$0388$0BFB
DECFSZ
STACK_11,F
$0389$2B8B
GOTO$+2
$038A
$2B8E
GOTO$+4
$038B$0BFA
DECFSZ
STACK_10,F
$038C$2B8B
GOTO$1
$038D
$2B88
GOTO$5
$038E$302C
MOVLW
44
$038F$00FA
MOVWF STACK_10
$0390$0BFA
DECFSZ
STACK_10,F
$0391$2B90
GOTO$1
$0392$0000
NOP
NOP
$0393$0000
;Pr.c,193::
PORTB=0b00000000;//+5
$0394$0186
CLRF PORTB,1
;Pr.c,194::
delay_ms(4);
$0395$3006
MOVLW
6
$0396$00FB
MOVWF STACK_11
$0397$30FF
MOVLW
255
$0398$00FA
MOVWF STACK_10
$0399$0BFB
DECFSZ
STACK_11,F
$039A
$2B9C
GOTO$+2
$039B$2B9F
GOTO$+4
$039C$0BFA
DECFSZ
STACK_10,F
$039D
$2B9C
GOTO$1
$039E$2B99
GOTO$5
$039F$302C
MOVLW
44
$03A0
$00FA
MOVWF STACK_10
$03A1
$0BFA
DECFSZ
STACK_10,F
75
$03A2
$2BA1
GOTO$1
$03A3
$0000
NOP
$03A4
$0000
NOP
;Pr.c,195::
PORTB=0b10000000;//2.5
$03A5
$3080
MOVLW
128
$03A6
$0086
MOVWF PORTB
;Pr.c,196::
delay_ms(4);
$03A7
$3006
MOVLW
6
$03A8
$00FB
MOVWF STACK_11
$03A9
$30FF
MOVLW
255
$03AA
$00FA
MOVWF STACK_10
$03AB
$0BFB
DECFSZ
STACK_11,F
$2BAE
GOTO$+2
$03AC
$03AD
$2BB1
GOTO$+4
$03AE
$0BFA
DECFSZ
STACK_10,F
$03AF$2BAE
GOTO$1
$03B0$2BAB
GOTO$5
$03B1$302C
MOVLW
44
$03B2$00FA
MOVWF STACK_10
$03B3$0BFA
DECFSZ
STACK_10,F
$03B4$2BB3
GOTO$1
$03B5$0000
NOP
$03B6$0000
NOP
;Pr.c,197::
PORTB=0b11100000;//5
$03B7$30E0
MOVLW
224
MOVWF PORTB
$03B8$0086
;Pr.c,198::
delay_ms(4);
$03B9$3006
MOVLW
6
$03BA
$00FB
MOVWF STACK_11
$03BB
$30FF
MOVLW
255
$03BC
$00FA
MOVWF STACK_10
$03BD
$0BFB
DECFSZ
STACK_11,F
$03BE$2BC0
GOTO$+2
$03BF$2BC3
GOTO$+4
$03C0$0BFA
DECFSZ
STACK_10,F
$03C1$2BC0
GOTO$1
$03C2$2BBD
GOTO$5
44
$03C3$302C
MOVLW
$03C4$00FA
MOVWF STACK_10
$03C5$0BFA
DECFSZ
STACK_10,F
76
$03C6$2BC5
GOTO$1
$03C7$0000
NOP
$03C8$0000
NOP
;Pr.c,199::
PORTB=0b00100000;//+2.5
$03C9$3020
MOVLW
32
$03CA
$0086
MOVWF PORTB
;Pr.c,201::
delay_ms(4);
$03CB
$3006
MOVLW
6
$03CC
$00FB
MOVWF STACK_11
$03CD
$30FF
MOVLW
255
$03CE$00FA
MOVWF STACK_10
$03CF$0BFB
DECFSZ
STACK_11,F
$2BD2
GOTO$+2
$03D0
$03D1
$2BD5
GOTO$+4
$03D2
$0BFA
DECFSZ
STACK_10,F
$03D3
$2BD2
GOTO$1
$03D4
$2BCF
GOTO$5
$03D5
$302C
MOVLW
44
$03D6
$00FA
MOVWF STACK_10
$03D7
$0BFA
DECFSZ
STACK_10,F
$03D8
$2BD7
GOTO$1
$03D9
$0000
NOP
$03DA
$0000
NOP
;Pr.c,202::
PORTB=0b01100000;//0
$03DB
$3060
MOVLW
96
$03DC
$0086
MOVWF PORTB
;Pr.c,203::
delay_ms(4);
$03DD
$3006
MOVLW
6
$03DE
$00FB
MOVWF STACK_11
$03DF
$30FF
MOVLW
255
$03E0$00FA
MOVWF STACK_10
$03E1$0BFB
DECFSZ
STACK_11,F
$03E2$2BE4
GOTO$+2
$03E3$2BE7
GOTO$+4
$03E4$0BFA
DECFSZ
STACK_10,F
$03E5$2BE4
GOTO$1
$03E6$2BE1
GOTO$5
$03E7$302C
MOVLW
44
$03E8$00FA
MOVWF STACK_10
$03E9$0BFA
DECFSZ
STACK_10,F
77
$03EA
$2BE9
GOTO$1
$03EB$0000
NOP
$03EC$0000
NOP
;Pr.c,205::
}
$03ED
$
L_main_29:
;Pr.c,207::
}while(1);
$03ED
$291B
GOTOL_main_0
;Pr.c,208::
}//~!
$03EE$2BEE
GOTO$
78
LABORATORIJSKAVEBAZadatak
COM1iliCOM2(zavisnonakojiportjepovezanokolo)
Brzina 2400 Bauda, 1 stopbit (One Stop Bit), Space bit parnosti
(Parity), osam bitova ini karakter/podatak (Data bits), iskljuen RTS
(Off)
PodesitedaprenosmikrokontrolerPCbudeHEX
ekiratiSendasnumber.
Slika30.Rasporedtasteraiprekidaa
Slika31.Postavljanjesondeosciloskopa
79
RasporedtasteraiprekidaajenaSlici30.
PritiskomnatasterSW1vriseresetovanjemikrokontrolera
Pritiskom na taster SW2 vri se generisanje testnog signala, koji je
prikazan na donjoj slici. Testni signal sadri 4 sekvence 00101101,
00101101, 00011011 i 11010001, to je uokvireno u crvenom
prozoru(Slika32).
Kada je prekida S1 u stanju logike 1, to znai da se iz USART
terminala alju 4 dvobitna PAM signala, a da se irinska modulacija
definieprekidaimaS3iS4(00,01,10,11).Dakle,svaetirisignala
se amplitudski moduliu po obrascu: 00 (3.5V), 01 (1.75V), 10
(1.75V),11(3.5V).Zatimsevriirinskamodulacijazavisnoodstanja
prekidaaS3iS4(00,01,10,11).
Kada je prekida S1 u stanju logike 0, to znai da se iz USART
terminalaalju4dvobitnaPAMsignala,priemusesaprvadvabita
definie amplitudska modulacija, sa sledea dva irinska modulacija.
Istoseodnosiinasledeinibl(etvorku).StanjaprekidaaS3iS4seu
ovomsluajuprogramskinetretiraju.
Slika32.Izgledtestnesekvencejeuokvirenacrvenimprozorom
80
Slika33.ZadavanjesekvenciizUSARTterminala
81
Prilog
82
83
84
85
86
87
88
89
90
91
Zakljuak
92
Literatura
PWMandPAMsignalingChingYuanYang,YuLee
AllPICprogramator,InfoElektronikaNi
o ICProg,http://www.icprog.com
o mikroC,firmaMikroelektronika,http://mikroe.com
PIC16F877,MicrochipTecnology,http://www.microchip.com
SpregamikrokontroleraPIC16f877saparalelnimperiferijskim
interfejsom8255AiD/AkonvertorimDAC832LCVSlaviaPopovi,
MladenPavlovi,SiniaStoilkoviElektronskifakultetNi,(seminarski
rad)
KomunikacijamikrokontroleraPIC16F87720prekoSPImodulaDuan
orevi,arkooreviElektronskifakultetNi,(seminarskirad)
93
OAutorima:
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