Lab 1: Introduction to Combinational Design

Post-Lab Questions: a)
Vin 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Vout 3.8 3.77 3.79 0.38 0.12 0.12 0.12 0.12 0.12 0.12 0.12

Voltage readings when varying the input voltage

Voltage Transfer Characteristics

4.5 4 3.5 3 2.5 Vout 2 1.5 1 0.5 0 0 2 V(in) 4 6

Graph of the Voltage Transfer Characteristics In this graph, Logic 1 is an output for the (0.0-1.0) voltage range. The output is Logic 0 for the (1.5-5.0) voltage range. b) The time period of oscillation that I observed in Experiment 2 was 67 ns. This gave me a frequency of 14.9 MHz. I was able to calculate this because we know that the frequency is equal to one divided by the period. If the delay of one inverter was 10ns, then the frequency would be 2.38 MHz.

c) The signals at P, Q, R, and S in Figure 1.2 are periodic. Their time period is equal to the period for the whole ring oscillator, divided by the number of inverters, in this case 5. So for my case the period for the signals at P, Q, R and S is 74.63 MHz. the signal at node A is simply the output from the last node in the system, B.