1

P0R101

P0R102

VCC

Res1
1K +15
7

P0U107

P0S103

SW-SPDT
1 S2

R2
P0R201

P0U102
P0R202

Res1
1K

GND

P0S203

SW-SPDT
P0S301
1 S3
P0S302
2
3
P0S303
SW-SPDT
1 S4
P0S401
P0S402
2
3
P0S403
SW-SPDT

R3
P0R301

R4
P0R302
P0R401

Res1
1K

Res1
1K

GND

8 U1
AD741CN P10
P0U106
P0P1001
6
1
P0U108

-15

P0U105

Banana
B

P0R402

-15

R5
P0R501

10K

R6
P0R601
10K

4 bit counter

P0R502
P0R503

+15

P0U101
P0S202

1
P0P102 2
P0P103 3
P0P104 4
N0CLOCK
clock
P0P105 5
P0P101

U2
GND

P0R602

P0R603

N0QA
QA
P0P201 1
N0QB
QB
P0P202 2
N0QC
QC
P0P203 3
N0QD
QDP0P204
4

P0U103

P0S201

P2

P0S102

P1

P0U104

1 S1

P0S101

To female banana

R1

VCC

2
3
N0CLOCK 14
clock
N0QA
QA
1

10

P0U202

R0(1)
P0U203
R0(2)
P0U2014

CKA
P0U201
CKB

P0U2010

GND

VCC

P0U205

12
QA P0U209
9
QB P0U208
8
QC P0U2011
11
QD
P0U2012

VCC
N0QA
QA
N0QB
QB
N0QC
QC
N0QD
QD

SN7493N
GND

GND

Title

MODUL DAC ( BWR )

Size

Number

Revision

A
Date:
File:
1

12/4/2011
D:\My project\..\modul bwr.SchDoc
4

Sheet of
Drawn By:

Soraya parlina
6