8086/8088 Instruction List

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Intel CPU 8086/8088 Instruction List

Symbols and Abbreviations
DEST COUNT destination operand determines, how many times a bit-shift or bit-rotate operation is to be performed: if the second-least significiant bit of the instruction code is 0 COUNT is set to 1, otherwise COUNT is assigned the value of CL (thus, for each rot/shift op there exist two different instructions) The contents of the memory location or register enclosed in the parentheses effective address of a memory location displacement of a memory reference offset of other segment with an inter-segment reference (bit-)value is not defined/ not used (i.e. in flags register) ... gets value of ...

LSRC/RSRC (left)/(right)source operand

() EA disp SEG X <--

List Table
ADC - add with carry IF (CF) = 1 (DEST) <-- (LSRC) + (RSRC) + 1 ELSE (DEST) <-- (LSRC) + (RSRC) FLAGS: AF, CF, OF, PF, SF, ZF

ADD - addition (DEST) <-- (LSRC) + (RSRC) FLAGS: AF, CF, OF, PF, SF, ZF

AND - and logical (DEST) <-- (LSRC) AND (RSRC) (CF) <-- 0 (OF) <-- 0

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FLAGS: CF, OF, PF, SF, ZF, AF undefined

CALL - call procedure IF Inter-Segment (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- (CS) (CS) <-- SEG (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- (IP) (IP) <-- DEST FLAGS: none

CLC - clear carry (CF) <-- 0 FLAGS: CF

CLD - clear direction flag (DF) <-- 0 FLAGS: DF

CLI - clear interrupt-enable flag (IF) <-- 0 FLAGS: IF

CMC - complement carry IF (CF) = 0 (CF) <-- 1 ELSE (CF) <-- 0 FLAGS: CF

CMP - compare (LSRC) - (RSRC) ; operands remain unchanged FLAGS: AF, CF, OF, PF, SF, ZF

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DEC - decrement (DEST) <-- (DEST) - 1 FLAGS: AF, OF, PF, SF, ZF

HLT - halt no operation FLAGS: none

INT - interrupt (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- FLAGS (IF) <-- 0 (TF) <-- 0 (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- (CS) (CS) <-- (TYPE * 4 + 2) (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- (IP) (IP) <-- (TYPE * 4) FLAGS: IF, TF

INTO - interrupt on overflow IF (OF) = 1 (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- FLAGS (IF) <-- 0 (TF) <-- 0 (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- (CS) (CS) <-- (12H) (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- (IP) (IP) <-- (10H) FLAGS: none

IRET - interrupt return (IP) <-- ((SP) + 1:(SP)) (SP) <-- (SP) + 2 (CS) <-- ((SP) + 1:(SP))

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(SP) <-- (SP) + 2 FLAGS <-- ((SP) + 1:(SP)) (SP) <-- (SP) + 2 FLAGS: all

JA/JNBE - jump on above / jump on not below or equal IF (CF) AND (ZF) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JAE/JNB - jump on above or equal / jump on not below IF (CF) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JB/JNAE - jump on below / jump on not above or equal IF (CF) = 1 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JBE/JNA - jump on below or equal / jump on not above IF (CF) OR (ZF) = 1 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JC - jump on carry IF (CF) = 1 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JCXZ - jump if CX register zero IF (CX) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

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JE/JZ - jump on equal / jump on zero IF (ZF) = 1 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JG/JNLE - jump on greater / jump on not less or equal IF ( (SF) = (OF) ) OR ( (ZF) = 0 ) (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JGE/JNL - jump on greater or equal / jump on not less IF (SF) = 0 (OF) (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JL/JNGE - jump on less / jump on not greater or equal IF (SF) NOT= (OF) (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JLE/JNG - jump on less or equal / jump on not greater IF ( (SF) NOT= (OF) ) OR ( (ZF) = 1 ) (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JMP - jump unconditionally IF Inter-Segment (CS) <-- SEG (IP) <-- DEST FLAGS: none

JNC - jump on not carry IF (CF) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits

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FLAGS: none

JNE/JNZ - jump on not equal / jump on not zero IF (ZF) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JNO - jump on not overflow IF (OF) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JNS - jump on not sign IF (SF) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JNP/JPO - jump on not parity / jump on parity odd IF (PF) = 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JO - jump on overflow IF (OF) = 1 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JP/JPE - jump on parity / jump on parity even IF (PF) = 1 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

JS - jump on sign IF (SF) = 1 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits

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FLAGS: none

LAHF - load register AH from flags (AH) <-- (SF):(ZF):X:(AF):X:(PF):X:(CF) FLAGS: none

LDS - load pointer using DS (REG) <-- (EA) (DS) <-- (EA + 2) FLAGS: none

LEA - load effective address (REG) <-- (EA) FLAGS: none

LES - load pointer using ES (REG) <-- (EA) (ES) <-- (EA + 2) FLAGS: none

LOCK - lock the bus (8088) no operation FLAGS: none

LOOP - loop (CX) <-- (CX) - 1 IF (CX) NOT= 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

LOOPE/LOOPZ - loop while equal / loop while zero (CX) <-- (CX) - 1 IF (ZF) = 1 AND (CX) NOT= 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits

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FLAGS: none

LOOPNE/LOOPNZ - loop while not equal / loop while not zero (CX) <-- (CX) - 1 IF (ZF) = 0 AND (CX) NOT= 0 (IP) <-- (IP) + disp ; disp is sign-extended to 16-bits FLAGS: none

MOV - move byte or word (DEST) <-- (SRC) FLAGS: none

NEG - negate (EA) <-- (SRC) - (EA) (EA) <-- (EA) + 1 ; affecting flags FLAGS: AF, CF, OF, PF, SF, ZF

NOP - no operation no operation FLAGS: none

NOT - logical not (EA) <-- (SRC) - (EA) FLAGS: none

OR - logical or (DEST) <-- (LSRC) OR (RSRC) (CF) <-- 0 (OF) <-- 0 FLAGS: CF, OF, PF, SF, ZF, AF undefined

POP - pop (DEST) <-- ((SP) + 1:(SP)) (SP) <-- (SP) + 2

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FLAGS: none

POPF - pop flags FLAGS <-- ((SP) + 1:(SP)) (SP) <-- (SP) + 2 FLAGS: all

PUSH - push (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- (SRC) FLAGS: none

PUSHF - push flags (SP) <-- (SP) - 2 ((SP) + 1:(SP)) <-- FLAGS FLAGS: none

RCL - rotate through carry left (temp) <-- COUNT DO WHILE (temp) NOT= 0 (tempcf) <-- (CF) (CF) <-- high-order bit of (EA) (EA) <-- (EA) * 2 + (tempcf) (temp) <-- (temp) - 1 IF COUNT = 1 IF high-order bit of (EA) NOT= (CF) (OF) <-- 1 ELSE (OF) <-- 0 ELSE (OF) undefined FLAGS: CF, OF

RCR - rotate through carry right (temp) <-- COUNT DO WHILE (temp) NOT= 0 (tempcf) <-- (CF) (CF) <-- low-order bit of (EA)

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(EA) <-- (EA) / 2 high-order bit of (EA) <-- (tempcf) (temp) <-- (temp) - 1 IF COUNT = 1 IF high-order bit of (EA) NOT= next-to-high-order bit of (EA) (OF) <-- 1 ELSE (OF) <-- 0 ELSE (OF) undefined FLAGS: CF, OF

RET - return (IP) <-- ((SP) + 1:(SP)) (SP) <-- (SP) + 2 IF Inter-Segment (CS) <-- ((SP) + 1:(SP)) (SP) <-- (SP) + 2 IF Add-Immediate-to-Stack-Pointer (SP) <-- (SP) + data FLAGS: none

ROL - rotate left (temp) <-- COUNT DO WHILE (temp) NOT= 0 (CF) <-- high-order bit of (EA) (EA) <-- (EA) * 2 + (CF) (temp) <-- (temp) - 1 IF COUNT = 1 IF high-order bit of (EA) NOT= (CF) (OF) <-- 1 ELSE (OF) <-- 0 ELSE (OF) undefined FLAGS: CF, OF

ROR - rotate right (temp) <-- COUNT DO WHILE (temp) NOT= 0 (CF) <-- low-order bit of (EA) (EA) <-- (EA) / 2

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high-order bit of (EA) <-- (CF) (temp) <-- (temp) - 1 IF COUNT = 1 IF high-order bit of (EA) NOT= next-to-high-order bit of (EA) (OF) <-- 1 ELSE (OF) <-- 0 ELSE (OF) undefined FLAGS: CF, OF

SAHF - store register AH into flags (SF):(ZF):X:(AF):X:(PF):X:(CF) <-- (AH) FLAGS: AF, CF, PF, SF, ZF

SAL/SHL - shift arithmetic left / shift logical left (temp) <-- COUNT DO WHILE (temp) NOT= 0 (CF) <-- high-order bit of (EA) (EA) <-- (EA) * 2 (temp) <-- (temp) - 1 IF COUNT = 1 IF high-order bit of (EA) NOT= (CF) (OF) <-- 1 ELSE (OF) <-- 0 ELSE (OF) undefined FLAGS: CF, OF, PF, SF, ZF, AF undefined

SAR - shift arithmetic right (temp) <-- COUNT DO WHILE (temp) NOT= 0 (CF) <-- low-order bit of (EA) (EA) <-- (EA) / 2 ; / is signed div rounding down (temp) <-- (temp) - 1 IF COUNT = 1 IF high-order bit of (EA) NOT= next-to-high-order bit of (EA) (OF) <-- 1 ELSE (OF) <-- 0 ELSE

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(OF) <-- 0 FLAGS: CF, OF, PF, SF, ZF, AF undefined

SBB - subtract with borrow IF (CF) = 1 (DEST) <-- (LSRC) - (RSRC) - 1 ELSE (DEST) <-- (LSRC) - (RSRC) FLAGS: AF, CF, OF, PF, SF, ZF

SHR - shift logical right (temp) <-- COUNT DO WHILE (temp) NOT= 0 (CF) <-- low-order bit of (EA) (EA) <-- (EA) / 2 ; / is signed div rounding down (temp) <-- (temp) - 1 IF COUNT = 1 IF high-order bit of (EA) NOT= next-to-high-order bit of (EA) (OF) <-- 1 ELSE (OF) <-- 0 ELSE (OF) undefined FLAGS: CF, OF, PF, SF, ZF, AF undefined

STC - set carry (CF) <-- 1 FLAGS: CF

STD - set direction flag (DF) <-- 1 FLAGS: DF

STI - set interrupt-enable flag (IF) <-- 1 FLAGS: IF

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SUB - subtract (DEST) <-- (LSRC) - (RSRC) FLAGS: AF, CF, OF, PF, SF, ZF

TEST - test (LSRC) AND (RSRC) (CF) <-- 0 (OF) <-- 0 FLAGS: CF, OF, PF, SF, ZF, AF undefined

WAIT - wait no operation FLAGS: none

XCHG - exchange (temp) <-- (DEST) (DEST) <-- (SRC) (SRC) <-- (temp) FLAGS: none

XLAT - translate AL <-- ((BX) + (AL)) FLAGS: none

XOR - exclusive or (DEST) <-- (LSRC) XOR (RSRC) (CF) <-- 0 (OF) <-- 0 FLAGS: CF, OF, PF, SF, ZF, AF undefined

Thomas Schaefer, 24. November 1999

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