You are on page 1of 7

SL NO

DATE OF DATE OF PRESENTATION SUBMISSION

NAME

SIGNATURE

EXPERIMENT NO 2
SIMULATION OF RESISTIVE LOAD INVERTER USING SPICE AND TO PERFORM THE TRANSIENT ANALYSIS
PULSE SPECIFICATION

TD -

DELAY TIME(0 nS)

TR - RISE TIME (1 nS) TF FALL TIME(1 nS)

CIRCUIT DIAGRAM

1.RESISTIVE LOAD INVERTER


1.1 TRANSIENT ANALYSIS 1.1.1 PSPICE CODE
*RESISTIVE LOAD INVERTER VP 1 0 PULSE(0 5 0N 1N 1N 40U 80U) M1 3 1 0 0 NMOD L=1U W=5U .MODEL NMOD NMOS(VTO=2 KP=4.5E-5 CBD=5PF CBS=2PF RD=5 RS=2 RB=0 RG=0 RDS=1MEG CGDO=1PF CGSO=1PF) R1 2 3 100K VDD 2 0 DC 5V .TRAN 1U 80U .PROBE .END

1.1.2 OUTPUT

EXPERIMENT NO 3
SIMULATION OF RESISTIVE LOAD INVERTER USING SPICE AND TO PERFORM THE DC ANALYSIS
CIRCUIT DIAGRAM

1. DC ANALYSIS 1.1 PSPICE CODE


*RESISTIVE LOAD INVERTER M1 3 1 0 0 NMOD L=1U W=5U .MODEL NMOD NMOS(VTO=2 KP=4.5E-5 CBD=5PF CBS=2PF RD=5 RS=2 RB=0 RG=0 RDS=1MEG CGDO=1PF CGSO=1PF) R1 2 3 100K VDD 2 0 DC 5 VDC 1 0 DC 5 .DC VDC 0 5 0.01 .PROBE .END

1.2 OUTPUT

EXPERIMENT NO 4
SIMULATION OF ACTIVE LOAD INVERTER USING SPICE AND TO PERFORM THE TRANSIENT ANALYSIS
PULSE SPECIFICATION

TD -

DELAY TIME(0 nS)

TR - RISE TIME (1 nS) TF FALL TIME(1 nS)

CIRCUIT DIAGRAM

1.ACTIVE LOAD INVERTER


1.1 TRANSIENT ANALYSIS 1.1.1 PSPICE CODE
*DEPLETION LOAD INVERTER VP 1 0 PULSE(0 5 0N 1N 1N 40U 80U) M1 3 1 0 0 NMOD L=1U W=5U M2 2 2 3 0 NMOD L=1U W=2U .MODEL NMOD NMOS(VTO=2 KP=4.5E-5 CBD=5PF CBS=2PF RD=5 RS=2 RB=0 RG=0 RDS=1MEG CGDO=1PF CGSO=1PF) VDD 2 0 DC 5V .TRAN 1U 80U .PROBE .END

1.1.2 OUTPUT

EXPERIMENT NO 5
SIMULATION OF RESISTIVE LOAD INVERTER USING SPICE AND TO PERFORM THE DC ANALYSIS
CIRCUIT DIAGRAM

1. DC ANALYSIS 1.1 PSPICE CODE


*DEPLETION LOAD INVERTER VP 1 0 PULSE(0 5 0N 1N 1N 40U 80U) M1 3 1 0 0 NMOD L=1U W=5U M2 2 2 3 0 NMOD L=1U W=2U .MODEL NMOD NMOS(VTO=2 KP=4.5E-5 CBD=5PF CBS=2PF RD=5 RS=2 RB=0 RG=0 RDS=1MEG CGDO=1PF CGSO=1PF) VDD 2 0 DC 5V .DC VP 0 5 0.01 .PROBE .END

1.2 OUTPUT

You might also like