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The Next Generation Challenge For Software Defined Radio
The Next Generation Challenge For Software Defined Radio
Advanced Computer Architecture Lab, University of Michigan Department of Electrical Engineering, Arizona State University 3 ARM, Ltd.
3G Wireless
Large Coverage
Outdoor - High Mobility Up to 14Mbps
4G Wireless
Macro Cells
Pico Cells
Isolated HotSpots 1Gbps Coverage Large Coverage 100Mbps Coverage Outdoor - High Mobility Indoor Very Low Mobility
What we need
Adaptive high performance transmission system Great candidate for SDR
University of Michigan -SAMOS 2007
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MOD (OFDM)
MIMO encoder
Channel Encoder
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TX
MIMO decoder
STBC VBLAST
Channel Decoder
Turbo code LDPC code
3 Major Components to 4G
Modulation/Demodulation Multiple-Input Multiple-Out (MIMO) Channel Decoder/Encoders
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RX
Modulation - OFDM
Properties of OFDM -High Spectral Efficiency -Low Intersymbol Intereference -Flat Fading Subcarriers Can sustain high data rates with multiple users
-Nfsc
-fsc
fsc
Nfsc
x[0]
complex add
X[0]
x[1]
complex mult
complex sub
X[1]
eiw
x[1]*
Time
x[2] Tx2
Rx1
n11 n12
Rx2
n21 n22 y21 = h21x[1] + h22x[2] + n21 y22 = -h21x[2]* + h22x[1]* + n22 h21
Channel Estimation
Combiner
h12 ~x[1] ~x[2] h22
Channel Estimation
~x[1] = h11*y11 + h12y12* + h21*y21 + h22y22* ~x[2] = h12*y11 - h11y12* + h22*y21 - h21y22*
University of Michigan -SAMOS 2007
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STBC
Receiver Antenna 1 and 2 y21 y11 y22* y12*
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Complex Multiply
Accumulate
~x[1] ~x[2]
Conjugate +Negation
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Vertical-BLAST (V-BLAST)
Mod
Demod
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S/P
R Receivers
8 1 2 3 4
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12
10
11
12
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Data Stream of 4 Tx
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V-BLAST
Implementation Based on Square Root Method for V-BLAST
Original requires repeated pseudo-inverse calculation for finding the Complexity Requires matrix operations on complex numbers Many Matrix Transformations
strongest signal This algorithm has reduces complexity
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Channel Decoding
3G Technologies in 4G
Viterbi Turbo Decoder New to 4G LDPC Better performance characteristics compared to Turbo and Viterbi
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LDPC
L Node L0 L1 L2 L3 L4 L5 L6 L7
H=
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Original Value 1 1 0 1 0 1 0 0 1
1 0 1
1 1 0 0
0 1 1 0
E3 1 E1 0 E2 0 E3 1 E3 0 E2 1 E3 0 0 0 1 E2 1
1 1 0 0 1 1 0 1 0
1 0 0 1 0 1 0 1
E0
E1
E2
E3
L0
1
L1
1
L2
0
L 3 L4
1 0
L5
1
L6
0
L7
1
0 1
0 0
1 1
0 0
1 1
0 0
1] 1]
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LDPC
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Min-Sum Decoding Used Regular LDPC code Can get benefit from Wide SIMD
Can do the Bit Node and Check Node Alignment of Check and Bit nodes is a problem
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SODA PE Architecture
SODA DSP 3. Local memory 1. SIMD pipeline
Pred. Regs
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W B
5. DMA
E X
W B
System Interconnect
Global Memory
RF
DMA S T V
ALU
V T S
2. Scalar pipeline
Scalar RF
E X
Scalar ALU
W B
AGU RF
E X
AGU ALU
W B
4. AGU pipeline
4G Workload on SODA
Key 4G algorithms FFT IFFT STBC V-BLAST LDPC 100 Mbps MCycle/s 2x360 2x360 240 7700 1 Gbps MCycle/s 4x360 4x360 1900 4x18500
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Frequency (Mhz)
Scaled Power
130nm 1.3
90nm 1.1
65nm 1.1
45nm 1
32nm 0.9
Power (W)
22nm 0.8
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SDR Challenges In 4G
We cant do any of 4G with technology scaling on one core
Would 8GHz cores even be an energy efficient solution? What about 1Gbps? Are we ever going to get a 20GHz core? Cannot rely on technology scaling to give us 4G for free 4G SDR will require algorithmic and architectural innovations
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4G Algorithm-Architectural Co-design
Architectural improvements (SODA II)
Specialized functional units
CISC-like complex arithmetic operations
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Wider SIMD How wide can we go? More PEs What does the interconnect look like? Algorithmic optimization through parallelization Reduce intra-kernel communication Reduce memory accesses Arithmetic is much cheaper than data movement
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Thanks
Questions?
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Alamouti Scheme
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SDR Bluetooth
802.11b
WCDMA
802.11n
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