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Mitsui MTV dv05 (ET)
Mitsui MTV dv05 (ET)
SM-CTV-O-228
TV/DVD COMBO
SERVICE MANUAL
MODEL NO. MTV-DV05 CHASSIS NO. CN-12DV
TABLE OF CONTENTS
SERVICE SAFETY INSTRUCTIONS ...................................................................... 2 ADJUSTMENTS ................................................................................................................... 5 STRUCTURE AND CHASSIS FUNCTION DESCRIPTION ..................... 15 SERVICE DATA .................................................................................................................... 21 TROUBLESHOOTING FLOW CHARTS .............................................................. 65
APPENDIX
SERVICE MANUAL
SAFETY PRECAUTION
WARNING: REFER SERVICING TO QUALIFIED SERVICE PERSONNEL ONLY. 1. The TV has a nominal working EHT voltage. Extreme caution should be exercised when working on the TV with the back removed. 1.1 Do not attempt to service this TV if you are not conversant with the precautions and procedures for working on high voltage equipment. 1.2 When handling or working on the CRT, always discharge the anode to the TV chassis before removing the anode cap in case of electric shock. 1.3 The CRT, if broken, will violently expel glass fragments. Use shatterproof goggles and take extreme care while handling. 1.4 Do not hold the CRT by the neck as this is a very dangerous practice. 2. It is essential that to maintain the safety of the customer all power cord forms be replaced exactly as supplied from factory. 3. Voltage exists between the hot and cold ground when the TV is in operation. Install a suitable isolating transformer of beyond rated overall power when servicing or connecting any test equipment for the sake of safety. 4. When replacing ICs, use specific tools or a static-proof electric iron with small power (below 35W). 5. Do not use a magnetized screwdriver when tightening or loosing the deflection yoke assembly to avoid electronic gun magnetized and decrement in convergence of the CRT. 6. When remounting the TV chassis, ensure that all guard devices, such as nonmetal control buttons, switch, insulating sleeve, shielding cover, isolating resistors and capacitors, are installed on the original
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place. 7. Replace blown fuses within the TV with the fuse specified in the parts list. 8. When replacing wires or components to terminals or tags, wind the leads around the terminal before soldering. When replacing safety components identified by the international hazard symbols on the circuit diagram and parts list, it must be the company-approved type and must be mounted as the original. 9. Keep wires away from high temperature components.
SERVICE MANUAL
MAINTENANCE
1. Place the unit on a stable stand or base that is of adequate size and strength to prevent the is from being accidentally tipped over, pushed off, or pulled off. Do not place the set near or over a radiator or heat register, or where it is exposed to direct sunlight. 2. Do not install the unit set in a place exposed to rain, water, excessive dust, mechanical vibrations or impacts. 3. Allow enough space (at least 10cm) between the unit and wall or enclosures for proper ventilation. 4. Slots and openings in the cabinet should never be blocked by clothes or other objects. 5. Please power off the unit set and disconnect it from the wall immediately if any abnormal phenomenon occurs, such as bad smell, belching smoke, sparkling, abnormal sound, no picture/sound/raster. Hold the plug firmly when disconnecting the power cord. 6. Unplug the unit set from the wall outlet before cleaning or polishing it. Use a dry soft cloth for cleaning the exterior of the unit set or CRT screen. Do not use liquid cleaners or aerosol cleaners.
SERVICE MANUAL
ADJUSTMENTS
SET-UP ADJUSTMENTS
The following adjustments should be made when a complete realignment is required or a new picture tube is installed. Perform the adjustments in the following order: 1. Color purity 2. Convergence 3. White balance Notes: The purity/convergence magnet assembly and rubber wedges need mechanical positioning. For some picture tubes, purity/convergence adjustments are not required.
1. Color Purity Adjustment Preparation: Before starting this adjustment, adjust the vertical sync, horizontal sync, vertical amplitude and focus. 1.1 Face the TV set north or south. 1.2 Connect the power plug into the wall outlet and turn on the main power switch of the TV set. 1.3 Operate the TV for at least 15 minutes. 1.4 Degauss the TV set using a specific degaussing coil. 1.5 Set the brightness and contrast to maximum. 1.6 Counter clockwise rotate the R/B low brightness potentiometers to the end and rotate the green low brightness potentiometer to center. 1.7 Receive green raster pattern signals. 1.8 Loosen the clamp screw holding the deflection yoke assembly and slide it forward or backward to display a vertical green zone on the screen. Rotate and spread the tabs of the purity magnet around the neck of the CRT until the green zone is located vertically at the center of the screen. 1.9 Slowly move the deflection yoke assembly forward or backward until a uniform green screen is obtained. 1.10 Tighten the clamp screw of the assembly temporarily. Check purity of the red raster and blue raster until purity of the three rasters meets the requirements.
SERVICE MANUAL
Yoke
Fig. 1
Fig. 2
2. Convergence Adjustment
Preparation: Before attempting any convergence adjustment, the TV should be operated for at least 15 minutes. 2.1 Center convergence adjustment 2.1.1 2.1.2 2.1.3 2.1.4 2.1.5 2.1.6 Receive dot pattern. Adjust the brightness/contrast controls to obtain a sharp picture. Adjust two tabs of the 4-pole magnet to change the angle between them and red and blue vertical lines are superimposed each other on the center of the screen. Turn both tabs at the same time keeping the angle constant to superimpose red and blue horizontal on the center of the screen. Adjust two tabs of the 6-pole magnet to superimpose red/blue line and green line. Remember red and blue movement. Repeat steps 2.1.3 obtained. 2.2 Circumference convergence adjustment 2.2.1 Loosen the clamp screw holding the deflection yoke assembly and allow it tilting.
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2.2.2
Temporarily put the first wedge between the picture tube and deflection yoke assembly. Move front of the deflection yoke up or down to obtain better convergence in circumference. Push the mounted wedge in to fix the yoke temporarily.
Put the second wedge into bottom. Move front of the deflection yoke to the left or right to obtain better convergence in circumference. Fix the deflection yoke position and put the third wedge in either upper space. Fasten the deflection yoke assembly on the picture tube. Detach the temporarily mounted wedge and put it in either upper space. Fasten the deflection yoke assembly on the picture tube. After fastening the three wedges, recheck overall convergence and ensure to get optimal convergence. Tighten the lamp screw holding the deflection yoke assembly.
Generally, white balance adjustment is made with professional equipment. Its not practical to get good white balance only through manual adjustment. For TVs with I2C bus control, change the bus data to adjust white balance.
SERVICE MANUAL
CIRCUIT ADJUSTMENTS
Preparation: Circuit adjustments should be made only after completion of set-up adjustments. Circuit adjustments can be performed using the adjustable components inside the TV set. For TVs with I2C bus control, first change the bus data. 1. Degaussing A degaussing coil is built inside he TV set. Each time the TV is powered on, the degaussing coil will automatically degauss the TV. If the TV is magnetized by external strong magnetic field, causing color spot on the screen, use a specific degausser to demagnetize the TV in the following ways. Otherwise, color distortion will be exist on the screen. 1.1 Power on the TV set and operate it for at least 15 minutes. 1.2 Receive red full-field pattern. 1.3 Power on the specific degausser and face it to the TV screen. 1.4 Turn on the degausser. Slowly move it around the screen and slowly take it away from the TV. 1.5 Repeat the above steps until the TV is degaussed completely. 2. Supply Voltage Adjustment Caution: +B voltage has close relation to high voltage. To prevent X-ray radiation, set +B voltage to the rated voltage. 2.1 Make sure that the supply voltage is within the range of the rated value. 2.2 Connect a digital voltmeter to the +B voltage output terminal VD891 of the TV set. Power on the TV and set the brightness and sub-brightness to minimum. 2.3 Regulate voltage adjustment components on the power PCB to make the voltmeter read 115 1V . 3. High Voltage Inspection Caution: No high voltage adjustment components inside the chassis. Please perform high voltage inspection in the following ways. 3.1 Connect a precise static high voltmeter to the second anode (inside the high voltage cap) of the picture tube. 3.2 Plug in the supply socket (120V, AC) and turn on the TV. Set the brightness and contrast to minimum (0 A). 3.3 The high voltage reading should be less than the EHT limitation. 3.4 Change the brightness from minimum to maximum, and ensure high voltage not beyond the limitation in any case. Nominal EHT voltage: 221KV Limited EHT voltage: 25KV
SERVICE MANUAL
4. Focus Adjustment Caution: Dangerously high voltages are present inside the TV. Extreme caution should be exercised when working on the TV with the back removed. 4.1 After removing the back cover, look for the FBT on the main PCB. There should be a FCB on the FBT. 4.2 Power on the TV and preheat it for 15 min. 4.3 Receive a normal TV signal. Rotate knob of the FCB until you get a sharp picture.
Before Adjusting 5. Safety Inspection 5.1 Inspection for insulation and voltage-resistant
After Adjusting
Perform safety test for all naked metal of the TV. Supply high voltage of 3000V AC, 50Hz (limit current of 10mA) between all naked metal and cold ground. Test every point for 3 seconds. and ensure no arcing and sparking. 5.2 Requirements for insulation resistance Measure resistance between naked metal of the TV and feed end of the power cord to be infinity with a DC-500 high resistance meter and insulation resistance between the naked metal and degaussing coil to be over 20M . 6. DESIGN/SERVICE mode 6.1 To enter the DESIGN/USER SERVICE (S) mode Set the volume to 0. Then press the MUTE key on the remote control and on the TV at the same time for over 2 seconds. In the S mode, press the POWER key to quit the S mode. 6.2 Adjustments and bus data Table 1 Bus Data Item MENU.00 V.POSITION H.PHASE V.SIZE V.SC V.LINE V.SIZE CMP MENU.01 SUB.BIAS SUB.CONT V.KILL SUB-BRIGHT SUB-CONTRAST VERTICAL KILL 63 31 0
(continued) 9
Symbol Description VERTICAL POSITION HORIZONTAL PHASE VERTICAL SIZE VERTICAL S-CORRECTION VERTICAL LINE VERTICAL SIZE COMPENSATION
Bus Data 40 15 60 18 19 7
SERVICE MANUAL
RF.AGC R.BIAS G.BIAS B.BIAS R.DRIVE G.DRIVE B.DRIVE MENU.02 SECAM B DC SECAM R DC H.APC GAIN SYNC.KIL H.BLK.L H.BLK.R CROS.B/W VIDEO.LVL FM.LEVEL MENU.03 FM.MUTE AUDIO.MUTE VIDEO.MUTE DEEM.TC SND.TRAP MENU.04 SUB.COLOR SUB.TINT SUB.SHARP AUTO FLESH CORING.GAN C.EXT C.BYPASS C.KILL ON MENU.05 FIL.SYS COLOR.SYS VOL.FIL VIF.SYS SIF.SYS.SW VIDEO.SW MENU.06 R/B G.BAL R/B ANGLE CD MODE
RF AGC RED BIAS GREEN BIAS BLUE BIAS RED DRIVE GREEN DRIVE BLUE DRIVE SECAM B-Y SECAM R-Y HORIZONTAL APC GAIN SYNC KILL HORIZONTAL BLANKING LEFT HORIZONTAL BLANKING RIGHT CROSSHATCH BLACK/WHITE VIDEO LEVEL FM LEVEL FM MUTE AUDIO MUIE VIDEO MUTE DE-EMPHASIS TIME CONSTANT SOUND TRAP SUB COLOR SUB TINT SUB SHARP AUTOMATIC FLESH CORING GAIN EXTERNAL CHROMA CHROMA BAND-PASS BYPASS COLOR KILL ON FILTER SYSTEM SELECT Y/C FILTER MODE COLOR SYSTEM VOLUME FILTER VIF SYSTEM SIF SYSTEM SWITCH VIDEO SWITCH R-Y/B-Y GAIN BALANCE R-Y/B-Y ANGLE VERTICAL COUNTDOWN MODE
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GREY MODE V.SETUP MENU.07 BLANK.DEF BRT.ABL.TH RGB TEMP BRT.ABL.DF MID.STP.DF FBP.BLK.SW MENU.08 DIGITAL.OSD OSD.CONT OSD.CONTST OSD.H.POS MENU.09 H.FREQ FM.GAIN C.KILL.OFF AUDIO.SW T.DISBLE MENU.10 G/Y ANGLE COL KIL OP CBCR-IN Y-APF PRE SHOOT WPL OPE DC REST BK STR STA BK STR GAN MENU.11 OVER MD SW Y GAMMA FSC C.SYNC VBLK SW SND TRAP HALF TONE HALF T SW TST VERSET MENU.12 E/W DC E/W AMP
GREY MODE VERTICAL SETUP BLANK DEFEAT BRIGHT ABL THRESHOLD RGB TEMPERATURE SWITCH BRIGHT ABL DEFEAT BRIGHT MID STOP DEFEAT FLYBACK PULSES SWITCH DIGITAL OSD MODE OSD CONTRAST CONTROL OSD CONTRAST TEST OSD HORIZONTAL POSITION HORIZONTAL FREQUENCY FM GAIN COLOR KILL OFF AUDIO SWITCH TEST MODE SWITCH DISABLE G/Y ANGLE COLOR KILLER OPERATIONAL LEVEL YCBCR INPUT YCBCR MODE ALL PASS FILTER MODE PRE-SHOOT WIDTH WHITE PEAK LIMITER LEVEL OPERATE LUMA DC RESTORATION BLACK STRETCH START POINT BLACK STRETCH START GAIN HORIZONTAL BLANKING
0 1 0 7 1 0 0 0
0 10 0 22 46 0 0 0 1 0 5 1 0 0 0 0 1 1 1
Y GAMMA START POINT fSC C-SYNC OUTPUT VERTICAL BLANKING CONTROL SWITCH SOUND TRAP HALF TONE LEVEL HALF TONE ON/OFF SWITCH
0 1 0 1 3 1 0
32 32
(continued)
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E/W TILT E/W C TOP E/W C BOTM MENU.13 E/W TEST HSIZE COMP IF TEST 3B V.LEV ADJ OV MOD LEV PRE/OVER C.VCO SW C.VCO ADJ MENU.14 VNSYNC TINT.THROU HLOCK.VDET MENU.15 OPT.1CHIP OPT.VIDEO OPT.DVD OPT.AV1AV2 OPT.AV3 OPT.S-VHS OPT.YUV OPT.COMB OPT.BYPASS MENU.16 OPT. VM OPT.BLUEBK OPT.V-CHIP OPT.CCD OPT.CLOCK OPT.P-ON SRCH.SPEED ROM .CORREC MENU.17 OPT.BTSC OPT.AV-INP OPT.BBE OPT. DVD-IN SUB.BASS SUB.TREBLE
E/W E/W E/W E/W TEST HORIZONTAL SIZE COMPENSATION 3dB IF TEST VIDEO LEVEL ADJUSTMENT PRE/OVER-SHOOT ADJUSTMENT CHROMA VCOVOLTAGE CONTROLLED OSCILLATORSWITCH CHROMA VCO ADJUSTMENT
32 5 5 7 7 0 0 5 0 0 0 0
TINT THROUGH
0 0
OPTION 1CHIP OPTION VIDEO OPTION DVD OPTION AV1/AV2 OPTION AV3 OPTION S-VHS OPTION YUV OPTION COMB OPTION BYPASS OPTION VM OPTION BLUEBK OPTION V-CHIP OPTION CCD OPTION CLOCK OPTION SEARCH SPEED ROM CORRECTION OPTION BTSC OPTION AV-INP OPTION BBE OPTION DVD-IN SUB BASS SUB TREBLE
1 1 1 1 0 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0 3 3
(continued) 12
SERVICE MANUAL
MENU.18 LOUNDNESS FM/AM.PRES SCART.PRES SCART.VOL OPT.AVC AVC.DECAY BBE.BASS BBE.TREBLE Notes: The data sheet may differ dependent on different models. The data sheet may differ dependent on different CRTs for the same model. BBE BASS BBE TREBLE LOUDNESS FM/AM PRESETTING SCART PRESETTING SCART VOLUME SCART VOLUME OPTION AVC 9 63 39 117 1 2 32 32
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Connect the OUT terminal on the DVD130A to the IN terminal on the TV and shift the TV to the DVD mode. After power-on for several seconds, the TV should display the preset LOGO picture on the screen, which should be smooth and distort-free with normal color. Press the OPEN/CLOSE button on the remote control to open the disc tray. Place the disc on the disc tray. Press the PLAY button and play should begin after several seconds. The color and sound should be normal, and picture should be smooth and distortionless.
c.
With a CD disc played, the TV should display the preset LOGO picture on the screen. The color and sound should be normal, and picture should be smooth and distortionless.
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STRUCTURE AND CHASSIS FUNCTION DESCRIPTION 1. STRUCTURE BLOCK DIAGRAM (For CPU CH04T1224 Only)
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SERVICE MANUAL
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DVD130A
MODULE
EEPROM 24C01
2X16M SDRAM
CS4955-CD
S-VIDEO
SPDIF
TV
MT1336E
+DJ-100
74HCU04
MT1369AE
CS4340 Audio DAC
L
R
BA5954
8M FLASH
L-out
R-out
Power Supply
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SERVICE MANUAL
5.2 Key ICs and Assemblies 5.2.1 The CN-12C2 chassis mainly uses the following ICs and assemblies. Table 2 Key ICs and Assemblies of CN-12C2 Chassis Serial No. 1 2 3 4 5 6 7 8 9 10 11 Position D701 D702 N101 NV01 N301 N191 NN01 NN02 N503 NK01 U101 Type CH04T1227 AT24C08 LA76835 KA2192B LA7840 TDA7057AQ TDA9808T MSP3410G LM7805 HEF4053 TDQ-3B8/136 Function Description Microcontroller EEPROM Small signal processor TV/Video switch circuit Vertical output circuit Sound power amplifier Audio IF demodulator NICAM audio processor Tri-pin regulator Electronic switch circuit Tuner
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5.2.2. The DVD130A mainly uses the following ICs and assemblies.
Table 3 Key ICs and Assemblies of DVD130A Serial No. 1 2 3 4 5 6 7 8 9 10 Position U1 U2 U3 U5 U7 U9 U10 U13 U14 U17 Type MPEG board MT1336E BA5954FM MT1369AE 74HCU04 8M FLASH NJM4558M 24C01 CS4340 CS4955-CD 16M SDRAM DJ-100 Function Description Drawing No. JUV2.033.071-1MX RF amplifier Focus/tracking coil and feed motor drive MPEG decoder Enhancement drive Flash memory Sound amplifier 1K EEPOM Audio D/A controller Video encoder Dynamic EEPROM Disc tray assembly
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Fig. 9
3. Refer to Table 4 about Functions and Service Data of the ICs Pins.
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AT24C08 (D702)
EEPROM 1. Features Data EEPROM internally organized as 1024/2048 bytes and 64/128 pages16 bytes Page protection mode, flexible page-by-page hardware write protection - Additional protection EEPROM of 64/128 bits, 1 bit per data page - Protection setting for each data page by writing its protection bit - Protection management without switching WP pin Low power CMOS Vcc=2.7 to 5.5V operation Two wire serial interface bus, I2C-Bus compatible Filtered inputs for noise suppression with Schmitt trigger Clock frequency up to 400 kHz High programming flexibility - Internal programming voltage - Self timed programming cycle including erase - Byte-write and page-write programming, between 1 and 16 bytes - Typical programming time 6 ms(<10ms) for up to 16 bytes High reliability - Endurance 106 cycles1) - Data retention 40 years1) - ESD protection 4000 V on all pins 8 pin DIP/DSO packages Available for extended temperature ranges - Industrial: -40 to +85 - Automotive: -40 to +125 3. Block Diagram
2. Pin Configuration
Fig.10 4. Refer to Table 5 about Functions and Service Data of AT24C08s Pins.
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KA2192B (NV01)
TV/Video Switch Circuit 1. Features The TV/Video switch circuit KA2192B (NY01) is an electronic switch circuit controlling four sets of audio signal inputs, three sets of video signal inputs, two sets of Y/C separation signals inputs, one set of video signal output, one set of Y/C separation signal output and one set of audio signal output. 2. Block Diagram
Fig.11 3. Value Table Level for Control Terminal (15) H H L L (16) H L H L TV AV1 SVHS AV2 Switchover Mode
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LA7840 (N301)
Vertical Deflection Output Circuit 1. Features Low power dissipation due to built-in pump-up circuit Vertical output circuit Thermal protection circuit built in Excellent crossover characteristics DC coupling possible
2. Block Diagram
Fig. 12
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TDA7057AQ (N191)
28W Stereo BTL Audio Output Amplifier with DC Volume Control 1. Features DC volume control Few external components Mute mode Thermal protection Short-circuit proof No switch-on and switch-off clicks Good overall stability Low power consumption Low HF radiation ESD protected on all pins. 2. General Description The TDA7057AQ is a stereo BTL output amplifier with DC volume control. The device is designed for use in TVs and monitiors, but is also suitable for battery-fed portable recorders and radios. Missing Current Limiter (MCL) A MCL protection circuit is built-in. The MCL circuit is activated when the difference in current between the output terminal of each amplifier exceeds 100mA (typical 300 Ma). This level of 100mA allows for single-ended headphone applications.
3. Block Diagram
Fig.13 Block Diagram 4. Refer to Table 8 about Functions and Service Data of TDA7057AQ s Pins.
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HEF4053 (NK01)
Triple 2-channel Analog Multiplexer/Demultiplexer 1. Description The HEF4053 is a triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/ demultiplexer has two independent inputs/ outputs (Y0 and Y1), a common input/ output (Z), and select inputs (Sn). Each also contains two-bidirectional analog switches, each with one side connected to an independent input/output (Y0 and Y1) and the other side connected to a common input/output(Z). With (E) LOW, one of the two switches is selected (low impedance ON-state) by Sn. With E HIGH, all switches are in the high impedance OFF-state, independent of SA to SC. VDD and VSS are the supply voltage connections for the digital control inputs (SA to SC and E). The VDD to VSS range is 3 to 15V.The analog inputs/outputs (Y0,Y1 and Z) can swing between VDD as a positive limit and VEE as a negative limit. VDD-VEE may not exceed 15 V. For operation as a digital multiplexer/ demultiplexer, VEE is connected to VSS (typically ground).
2. Block Diagram
Fig. 14 Functional Diagram 3. Function Table Inputs E Sn L L L H H X Channel On Yon-Zn Yin-Zn none
Notes H=HIGH state (the more positive voltage) L=LOW state (the less positive voltage) X=STATE is immaterial
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1. Features 5V supply voltage (9V supply voltage for TDA9808T (DIP20) only) Applicable for IFs (lntermediate Frequencies) of 38.9MHz, 45.75MHz and 58.75 MHz Gain controlled wide band Video IF (VIF)amplifier (AC-coupled) True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response) Robustness for over-modulation better than 105% due to Phase Locked Loop (PLL)-bandwidth control at negative modulated standards VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector Tuner AGC with adjustable TakeOver Point (TOP) Automatic Frequency Control (AFC) detector without extra reference circuit AC-coupled limiter amplifier for sound intercarrier signal Alignment-free FM-PLL demodulator with high linearity Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled); SIF AGC detector for gain controlled SIF amplifier, single reference QSS mixer for high performance Electrostatic Discharge (ESD) protection for all pins.
2. General Description The TDA9808T is an integrated circuit for single standard (negative modulated) vision IF signal processing and FM demodulation, with single reference QSS-IF in TV and VTR sets.
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3. Block Diagram
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MSP34X0G MULTISTANDARD SOUND PROCESSOR FAMILY Other processed standards are the Japanese Release Note: Revision bars indicate significant FM-FM multiplex standard (EIA-J) and the changes to the previous edition. The hardware FM Stereo Radio standard. and software description in this document is
valid for the MSP34X0G version B5 and following versions.
1. Introduction The MSP34X0G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. Figure 10 shows a simplified functional block diagram of the MSP34X0G. This new generation of TV sound processing ICs now includes versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively MICRONAS Noise Reduction (MNR) is performed alignment free.
Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP34X0G has optimum stereo performance without any adjustments. All MSP34X0G versions are pin and software downward-compatible to the MSP34X0G. The MSP34X0G further simplifies controlling software. Standard selection requires a single I2C transmission only. The MSP34X0G has built-in automatic Functions: The IC is able to detect the actual sound standard automatically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/stereo/bilingual, no I2C interaction is necessary (Automatic Sound Selection). The ICs are produced in submicron CMOS technology. The MSP34X0G is available in the following packages, PLCC68, PSDIP64, PSDIP52, PQFP80 and PLQFP64.
2. Block Diagram
Fig. 16 Simplified Functional Block Diagram of the MSP34X0G 3. Refer to Table 21 about Functions and Data of the ICs Pins.
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
Audio signal output (NC) Audio demodulation output IF AGC filter RFAGC voltage output IF signal input IF signal input IF circuit ground Supply voltage for IF circuit Filter for discriminator AFT voltage output I C bus data line I C bus clock line Auto brightness control input R character signal input G character signal input B character signal input Supply voltage for decoder Red (R) signal output Green (G) signal output Blue (B) signal output Character blanking signal input White balance adjusting signal input (NC) Vertical sawtooth output Vertical sawtooth generation Horizontal start supply voltage Low pass filter for horizontal AFC Line drive pulse output Line flyback pulse input Reference voltage generation terminal B-Y color difference signal input (SECOM) C-Y color difference signal input (SECOM) External video/chroma signals inputs 1H baseband delay circuit ground
2 2
SERVICE MANUAL
34 35
X-RAY detection input 4.43MHz CW signal output or SECAM killer signal input
0 2.05
775 776
712 712
36 37 38 39 40 41 42
AFC filter for color sub-carrier Clamp filter 4.43 MHz crystal oscillator connection APC filter Video signal output (NC) Video/chroma/scan part ground Video signals input from AV terminals or Y signal input from S-VIDEO terminal
43 44
Supply voltage for video/chroma/scan part C signal input from AV terminals or S-VIDEO terminal (NC)
4.99 2.76
285 805
280 707
45 46 47 48 49 50 51 52 53 54
Filter for black level stretch Video detection output IF lock detection filter External VCO harmonic oscillating coil External VCO harmonic oscillating coil IF PLL APC filter Audio signal input (NC) Sound IF output APC filter for audio discrimination Sound IF input
3.16 2.9 3.58 4.29 4.29 2.47 2.23 1.94 2.41 3.17
762 397 840 526 530 820 800 809 808 824
700 397 712 526 530 698 701 697 691 712
Pin No.
Table 5 Functions and Service Data of CH04T1227 (D701)s Pins GDM8145 Multimeter Ground Resistance (K) Measure with Measure with Voltage Function Description red probe black probe of while while Pin (V) grounding grounding black probe. red probe. Not connected Not connected 1.50 1.43 11.8 12.1 4.40 5.20
(continued) 32
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3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
Bus data line Bus clock line Ground Input terminal for clock oscillating signal Output terminal for clock oscillating signal Supply voltage Button-control voltage input terminal 1 AFT voltage input terminal X-RAY detection input Button-control voltage input terminal 2 Reset Character oscillating filter Video signal input terminal Three bits input/output terminals Input terminal for vertical flyback pulse Input terminal for horizontal flyback pulse R character output terminal G character output terminal B character output terminal Output terminal for fast blanking signal Mute Standby control Not connected Control terminal for production modes Degaussing circuit control Remote control signal input Not connected Not connected Not connected Not connected Output terminal for on/off control signals Output terminal for AV2 on/off control Output terminal for AV1 on/off control Output terminal for AV0 on/off control
4.70 4.47 0.00 1.78 2.88 5.31 0.02 2.47 2325 0.015 5.27 3.87 3.53 0.01 5.07 4.62 0.015 0.014 0.015 0.015 0.015 0.015 1.23 4.61 0.014 5.19 5.30 5.30 0.01 0.01 5.30 5.30 5.30 5.29
11.6 12.1 0.00 12.6 12.0 7.90 9.70 4.90 6.70 8.86 4.67 1.11 12.3 9.76 15.4 17.4 3.92 3.95 3.19 6.50 18.7 1.43 9.50 13.0 3.713 12.2 12.4 12.6 12.7 12.7 12.7 11.8 11.4 11.2
6.20 6.00 0.00 5.1 4.91 3.72 5.34 5.08 4.59 3.81 1.88 4.98 4.50 15.0 18.1 18.4 3.29 3.71 3.66 3.67 17.62 7.30 6.65 6.95 3.42 5.32 5.49 5.42 5.35 5.30 6.59 6.36 6.33 6.33
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Table 6 Functions and Service Data of AT24C08 (D702)s Pins GDM8145 Multimeter Ground Resistance (K Pin No. Function Description Voltage of Pin (V) Measure with red probe while grounding black probe. 0 0 0 0 11.7 11.72 0 6.7 )
Measure with black probe while grounding red probe. 0 0 0 0 5.25 5.5 0 4
1 2 3 4 5 6 7 8
Address terminal 0 Address terminal 1 Address terminal 2 Ground Data line Clock line Write-in/read-out control terminal Supply voltage
0 0 0 0 4.8 4.8 0 5
Table 7 Functions and Service Data of KA2192B (NV01)s Pins DT890D Digital Multimeter Ground Resistance (K) Pin No. Function Description Voltage of Pin (V) 5.67 5.67 5.67 5.69 5.69 5.54 0.00 5.54 5.69 5.70 5.56 5.70 Measure with red probe while grounding black probe. 6.45 6.45 6.57 6.45 6.47 6.85 0.00 6.75 6.43 6.37 6.85 6.43 Measure with black probe while grounding red probe. 3.53 3.74 4.02 3.66 3.72 3.96 0.00 3.85 3.36 3.72 3.96 3.87
(continued) 34
1 2 3 4 5 6 7 8 9 10 11 12
L TV IN R TV IN TV IN LS IN RS IN SY IN TV SW SC IN L1 IN R1 IN E1 IN L2 IN
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13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
R2 IN E2 IN SW1 SW2 MUTE Y OUT GND C OUT R OUT L OUT NC Y IN SYNC CLAMP C IN NC VCC VCC VOUT
5.70 5.56 5.25 5.25 0.00 3.89 0.00 3.84 4.37 4.37 0.06 5.55 3.47 5.57 0.25 9.38 9.38 3.17
6.33 6.83 6.84 6.85 0.00 1.418 0.00 0.96 0.63 6.61 6.71 6.70 6.80 6.67 6.69 0.34 0.31 6.47
3.67 4.01 5.59 5.59 0.00 1.51 0.00 1.15 3.35 3.31 3.97 4.18 5.75 4.07 4.13 0.33 0.30 0.48
Table 8 Functions and Service Data of LA7840 (N301)s Pins DT890D Digital Multimeter Pin No. Ground Resistance () Function Description Voltage of Pin (V) 0 14.8 24.5 2.24 2.23 24 pulse output 2.25 Measure with red probe while grounding black probe. 0 365 660 800 770 1167 Measure with black probe while grounding red probe. 0 360 584 600 672 465 638
1 2 3 4 5 6 7
Ground Vertical output terminal Pump supply voltage input Reference voltage Inverting input terminal Supply voltage Vertical terminal flyback
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Table 9 Functions and Service Data of TDA7057AQ (N191)s Pins Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 GDM8145 Multimeter Function Description Volume control input Not connected Audio R signal input Supply voltage Audio L signal input Ground Volume control input Left channel in-phase signal output Ground Left channel inverting signal output Right channel inverting signal output Ground Right channel in-phase signal output Voltage (V) 0.95 0.00 2.38 17.48 2.37 0.00 0.95 8016 0.00 8.25 8.24 0.00 8.13 Positive (K) Resistance 6.85 12.59 0.47 12.5 0.00 6.85 6.46 0.00 6.46 6.46 0.00 6.46 Negative (K) Resistance 6.15 6.51 0.47 6.51 0.00 0.15 5.59 0.00 5.59 5.59 0.00 5.59
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Table 10 Functions and Service Data of HEF4053 (NK01)s Pins GDM8145 Multimeter Function Description Voltage Positive Resistance Negative Resistance (V) (K) (K) Signal input terminal 3.91 6.31 0.12 Signal input terminal 5.01 6.31 0.11 Signal input terminal 0.00 0.00 3.41 Signal output terminal 0.02 6.07 0.05 Signal input terminal 0.22 6.17 3.72 Ground 0.00 0.00 0.00 Ground 0.00 0.017 0.00 Ground 0.00 0.017 0.00 Control signal input terminal 4.42 6.27 6.08 Control signal input terminal 4.42 6.24 6.07 Control signal input terminal 4.42 6.24 6.08 Signal input terminal 3.30 6.08 3.66 Signal output terminal 1.31 5.96 4.72 Signal input terminal 1.44 5.95 3.69 Signal output terminal 1.43 6.017 4.01 Supply voltage 5.04 0.352 0.33
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Pin No. 1 2 3
Table 11 Functions and Service Data of LM7805 (N503)s Pins DT890D Digital Multimeter Ground Resistance () Measure with red Measure with black Function Description Voltage of probe while probe while Pin (V) grounding black grounding red probe. probe. 15 865 477 Input terminal 5 1015 477 Regulation output Ground 0 0 477
Table 12 Functions and Service Data of TDA9808T Pins Digital Multimeter Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Function Description PIF signal input 1 PIF signal input 2 RFAGC start-control level adjust PLL APC filter Audio AGC filter Audio output (NTSC 4.5MHz) Filter 1/2VCC comparison voltage bias Video output Second SIF signal output Second SIF signal input RFAGC output AGC signal output External connection for VCO oscillating LC network External connection for VCO oscillating LC network Ground AGC filter Supply voltage input terminal SIF signal input SIF signal input? Reference Voltage (V) 3.23 3.23 0.99 2.53 3.29 2.34 1.79 0 2.18 2.03 2.81 0.04 3.05 2.76 2.76 0 3.13 8 3.2 3.2 7.9 7 7 0.001 7.9 2.1 2.1 7 Positive Resistance (20K) 7.2 7.2 6.7 7.9 7.8 7.2 7.9 7.6 7.7 5.2 Negative Resistance(20K) 6.03 5.99 5.85 6.3 6.17 5.86 6.29 6.09 6.17 4.99 6.1 6.2 6 6 0.00 6.11 2.7 6.27 6.27
Table 13 Functions and Service Data of MSP3410G Pins Digital Multimeter Pin No. 1 2 3 4 5 TP AVD-GL-OUT D-CTR-I/O-1 D-CTR-I/O-0 ADR-SEL Function Description NC NC NC NC Reference Voltage (V) 0.16 2.52 0.01 0.01 4.79
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6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49
STANDBYQ I2C-CL I2C-DA I2S-CL I2S-WS I2C-DA-WT I2S-DA-IN1 ADR-DA ADR-WS ADR-CL DVSVP DVSS I2S-DA-IN2 NC RESETQ DACA-R DACA-L VREF-I DACM-R DACM-L DACM-SVB SC2-OUT-R SC2-OUT-L CREF 1 SC1-OVT-R SC1-OUT-L SAPL-A AHVSUP CAPL-M AHVSS ABNDC SC3-ZN-L SC3-IN-R SC2-IN-L SC2-IN-R SC1-IN-L SC1-IN-R VREFTOP WONO-IN AVSS AVSVP ANA-IN1+ ANA-IN1ANA-IN2+ NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
4.79 3.56 3.9 2.36 2.4 2.36 0.07 0.07 0.07 0.07 4.79 0.01 0.07 0 4.76 0.8 0.08 0.01 0.17 0.08 0.18 3.82 3.82 0.01 3.82 3.82 7.19 8 7.2 7.2 0.01 3.74 3.77 3.77 3.77 3.77 3.77 2.6 3.78 0.01 4.9 1.53 1.53 0.09
38
0.7 7 7 7.2 7.2 7.2 7.2 7.2 7.2 7.2 0.7 0.001 7.3 7 3.5 3.5 0.001 3.5 3.5 3.6 7.1 7.1 0.001 7.1 7.1 7.1 1.3 7.1 7.1 0.001 7.1 7.1 7.1 7.1 7.1 7.1 1.6 7 0.001 0.7 7.3 7.3 7.3
4.54 4.44 4.44 6.24 6.24 6.24 5.29 5.59 5.59 5.59 4.54 0.00 5.31 5.24 3.54 3.52 0.00 3.52 3.54 3.6 5.92 5.91 0.00 5.91 5.92 6.04 4.59 6.04 0.00 6.02 6.1 6.1 6.1 6.1 6.1 6.1 1.63 6.1 0.00 4.53 5.27 5.26 5.27
(Continued)
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50 51 52
39
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40
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41
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42
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V431 B
V431
V432
V432
V513
B
43
V513
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and CD-DA
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High-speed ECC logic capable of correcting one error per each P-codeword or Q-codeword Automatic sector mode and form detection Automatic sector header verification 8-bit counter for decode completion on ck Automatically repeated error corrections 8-bit C2 Pointer counter Decoder Error Notification Interrupt that signals various decoder errors Provide error correction acceleration Buffer Memory Controller Supports 16Mb/32Mb/64Mb SDRAM Supports 16-bit/32-bit SDRAM data bus interface Build in a DRAM interface programmable clock to optimize the DRAM performance Provide the self-refresh mode SDRAM Programmable DRAM access cycle and refresh cycle timings Block-based sector addressing Programmable buffering counter for buffer status tracking Maximum DRAM speed is 133MHz Support 5/3.3-Volt. DRAM Interface Video Decode Decodes MPEG1 video and MPEG2 main level Maximum input bit-rate of 15Mbits/sec Smooth digest view function with 1, P and B picture decoding Baseline, extended-sequential and progressive JPEG image decoding Support CD-G titles Video/SPU/HLI Processor Arbitrary ratio vertical/horizontal scaling of video, from 0.25X to 256X 256/16/4/2-color bitmap format OSD 256/16 color RLC format OSD Automactic scrolling of OSD image Warp mode of OSD can reduce memory required Dual Sub-picture decoder Provides 4-color/3232-pixel hardware cursor Fade-in Fade out and Wipe functions as specified in the DVD Audio Specification and other slide show transition effects main profile video 720/480 and 720576
Audio Processing - Decoder format supports. - Dolby Digital (AC-3) decoding - DTS decoding - MLP decoding for DVD-Audio - MPEG-1 layer 1/layer 2 audio decoding
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- MPEG-2 layer1/layer2 2-channel audio decoding - Dolby Pro Logic decoding Up to 6 channel linear PCM output for DVD Audio/DVD Video Downmix function Support IEC 60958/61937 output - PCM/bit stream/mute mode - Custom IEC latency up to 2 frames a) Pink noise and white noise generator Karaoke functions - Microphone echo with adjustable echo level, echo-depth and delay length - Microphone tone control with three custom second-order IIR filter - Vocal mute/vocal assistant - Key shift up to +/-8 keys controlled by 1/2 key Channel equalizer 3D surround processing include virtual surround and speaker separation Power-down control Outline 208-pin LQFP package 313/216-Volt Dual perating votages 2. Pin Definitions
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Symbol IREF PLLVSS LPIOP LPION LPFON LPFIP LPFIN LPFOP JITFO JITFN PLLVDD3 FOO TRO TROPENPWM PWMOUT 2 DVD2 DMO Type Analog Input Ground Analog Output Analog Output Analog Output Analog Input Analog Input Analog Output Analog Output Analog Input Power Analog Output Analog Output Analog Output Analog Output Power Analog Output Description Current reference input. It generate reference current for data PLL. Connect an external 100K resistor to this pin and PLLVSS. Ground for data PLL and related analog circuitry Positive output of the low pass filter Negative output of the low pass filter Negative output of loop filter amplifier Positive input of loop filter amplifier Negative input of loop filter amplifier Positive output of loop filter amplifier RF jitter meter output Negative input of the operation amplifier for RF jigger meter Power for data PLL and related analog circuitry Focus servo output. PDM output of focus servo compensator Tracking servo output PDM output of focus servo compensator Tray open output, controlled by microcontroller. This is PWM output for TRWMEN27hRW2=1 or is digital output for TRWMEN27hRW2=0 The general PWM output 2.5V power Disk motor control output PWM output (Continued) 47
SERVICE MANUAL 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 FMO FG DVSS HIGHA0 HIGHA1 HIGHA2 HIGHA3 HIGHA4 HIGHA5 DVSS HIGHA6 HIGHA7 AD7 AD6 AD5 AD4 DVDD3 AD3 AD2 AD1 AD0 IOA0 IOA1 DVDD2 Analog Output Inout, Pull Up Ground Inout, Pull Up Inout, Pull Up Inout, Pull Up Inout, Pull Up Inout, Pull Up Inout, Pull Up Ground Inout, Pull Up Inout, Pull Up Inout Inout Inout Inout Power Inout Inout Inout Inout Inout, Pull Up Inout, Pull Up Power Feed motor control. PWM output Motor Hall sensor input Ground Microcontroller address 8 Microcontroller address 9 Microcontroller address 10 Microcontroller address 11 Microcontroller address 12 Microcontroller address 13 Ground Microcontroller address 14 Microcontroller address 15 Microcontroller address/data 7 Microcontroller address/data 6 Microcontroller address/data 5 Microcontroller address/data 4 3.3V power Microcontroller address/data 3 Microcontroller address/data 2 Microcontroller address/data 1 Microcontroller address/data 0 Microcontroller address 0/GPIO0 Microcontroller address 1/GPIO1 2.5V power
42
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
IOA2
IOA3 IOA4 IOA5 IOA6 IOA7 A16 A17 IOA18 KOA19 DMVSS DMVDD3 ALE LOOE# LOWR# LOCS# DVSS UP1-2 UP1-3 UP1-4
Inout, Pull Up
Inout, Pull Up Inout, Pull Up Inout, Pull Up Inout, Pull Up Inout, Pull Up Output Output Inout Inout Ground Power Inout, Pull Up Inout Inout Inout, Pull Up Ground Inout, Pull Up Inout, Pull Up Inout, Pull Up
SERVICE MANUAL 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 UP1-5 UP1-6 DVDD3 UP1-7 UP3-0 UP3-1 INT0# IR DVDD2 UP3-4 UP3-5 UWR# URD# XTALI XTALO DVSS RD7 RD6 RD5 RD4 DVDD2 RD3 RD2 RD1 RD0 RWE# CAS# RAS# RCS# BA0 DVDD3 RD15 RD14 RD13 RD12 DVSS RD11 RD10 RD9 RD8 VPVDD3 VCOCIN VPVSS DVSS Inout, Pull Up Inout, Pull Up Power Inout, Pull Up Inout, Pull Up Inout, Pull Up Inout, Pull Up Input Power Inout Inout Inout, Pull Up Inout, Pull Up Input Output Ground Inout Inout Inout Inout Power Inout Inout Inout Inout Output Output Output Output Output Power Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Ground Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Power Analog Input Ground Ground Microcontroller port 1-5 Microcontroller port 1-6 3.3V power Microcontroller port 1-7 Microcontroller port 3-0 Microcontroller port 3-1 Microcontroller interrupt 0, active low IR control signal input 2.5V power Microcontroller port 3-4 Microcontroller port 3-5 Microcontroller write strobe, active low Microcontroller read strobe, active low Crystal input, 27MHz Crystal output Ground DRAM data 7 DRAM data 6 DRAM data 5 DRAM data 4 2.5V power DRAM data 3 DRAM data 2 DRAM data 1 DRAM data 0 DRAM write enable, active low DRAM column address strobe, active low DRAM row address strobe, active low DRAM chip select, active low DRAM bank address 0 3.3V power DRAM data 15 DRAM data 14 DRAM data 13 DRAM data 12 Ground DRAM data 11 DRAM data 10 DRAM data 9 DRAM data 8 Power for varipitch VCO circuitry Connect capacitor for compensator loop filter Ground for varipitch VCO circuitry Ground (Continued) 49
SERVICE MANUAL 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 CLK CLE RA11 RA9 RA8 DVDD2 RA7 RA6 RA5 RA4 DVSS DQM1 DQM0 BA1 RA10 DVDD2 RA0 RA1 RA2 RA3 DVSS RD31 RD30 RD29 RD28 DVDD3 RD27 RD26 RD25 RD24 DVSS DQM3 DQM2 RD23 RD22 DVDD2 RD21 RD20 RD19 RD18 DVSS RD17 RD16 ABCK Output Output Output Output Output Power Output Output Output Output Ground Output Output Output Output Power Output Output Output Output Ground Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Power Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Ground Output Output Inout, Pull Up/Down Inout, Pull Up/Down Power Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Inout, Pull Up/Down Guound Inout, Pull Up/Down Inout, Pull Up/Down Output DRAM clock DRAM clock enable DRAM address bit 11 or audio serial data 3 (channel 3/8) DRAM address 9 DRAM address 8 2.5V power DRAM address 7 DRAM address 6 DRAM address 5 DRAM address 4 Ground Mask for DRAM input/output byte 1 Mask for DRAM input/output byte 0 DRAM bank address 0 DRAM address 10 2.5V power DRAM address 0 DRAM address 1 DRAM address 2 DRAM address 3 Ground DRAM data 31 DRAM data 30 DRAM data 29 DRAM data 28 3.3V power DRAM data 27 DRAM data 26 DRAM data 25 DRAM data 24 Ground Mask for DRAM input/output byte 3 Mask for DRAM input/output byte 2 DRAM data 23 DRAM data 22 2.5V power DRAM data 21 DRAM data 20 DRAM data 19 DRAM data 18 Ground DRAM data 17 DRAM data 16 Audio bit clock (Continued) 50
SERVICE MANUAL (1) Audio left/right channel clock 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 ALRCK DVDD3 ASDATA0 ASDATA1 ASDATA2 ACLK APVDD8 APVSS SPDIE MC-DAT BLANK# VSYN HSYN DVSS YUV0 YUV1 YUV2 YUV3 YUV4 DVDD2 YUV5 YUV6 YUV7 ICE PRST DVSS VFO13 IDGATE DVDD3 UDGATE WOBSI SDATA SDEN SLCK BDO DVDD3 PDMVDD3 PWMVREF PWM2VREF PDMVSS ADCVSS ADIN Inout, Pull Down Power Inout, Pull Down Inout, Pull Down Inout, Pull Down Inout Power Ground Output Input Inout Inout Inout Ground Output Output Output Output Output Power Output Output Output Input, Pull Down Input, Pull Down Ground Output Output Power Output Input Output Output Output Input, Pull Down Power Power Analog Input Analog Input Ground Ground Analog Input (2) Trap value in power-on reset. 1:use external 373, 0:use internal 373 3.3V power Audio serial data 0 (left/right channel) Audio serial data 1 (surround left/surround right channel) Audio serial data 2 (center/LFE channel) Audio DAC master clock (384/256 audio sample frequency) Power for audio clock circuitry Ground for audio clock circuitry SPDIF output Miorophone serial input Video blank area, active low/GPIO14 Vertical sync/GPIO16 Horizontal sync/GPIO15 Ground Video data output bit 0 Video data output bit 1 Video data output bit 2 Video data output bit 3 Video data output bit 4 2.5V power Video data output bit 5 Video data output bit 6 Video data output bit 7 Microcontroller ICE mode enable Power on reset input, active high Ground The 1st, 3rd VFO pulse output of DVD-RAM ID header DVD-RAM ID header detect signal output 3.3V power DVD-RAM recording data gate singal output Wobble signal output RF serial data output RF serial data latch enable RF serial clock output Flag of defect data status input 3.3V power Power for PDM circuitry A reference voltage input for PWM circuitry. A typical value of 2.8v A reference voltage input for PWM circuitry. A typical value of 1.4v Ground for PDM circuitry Ground for ADC circuitry General AVD input (Continued) 51
SERVICE MANUAL 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 RFSUBI TEZISLV TEI CSO FEI RFLEVEL RFRP-DC RFRP-AC RFRPSLV HRFZC ADCVDD8 RADTSI VP SCON SCOP RFDTSLVN RFIN RFP Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Power Analog Output Analog Output Analog Output Analog Output Analog Input Analog Input RF subtraction signal input terminal Tracking error zero crossing low pass input Tracking error input Central servo input Focus error input Sub beam add input or RFRP low pass input RF ripple detect input RF ripple detect input (through AC coupling) RFRP slice level input High frequency RF ripple zero crossing Power for ADC circuitry Positive RF data slicer level output Negative analog slicer current output Positive analog slicer current output Negative RF data slicer level output Negative input of RF differential signal Positive input of RF differential signal
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MT1336E RF amplifier
1.General Description MT1336 is a high performance CMOS analog front-end IC for both CD_ROM driver up to 48XS and DVD_ROM driver up to 16XS. It also supports DVD_RAM lead up to 4XS Version 2. It contains servo amplifiers to generate focusing error, 3-beam tracking error, 1 beam radial push-pull signal, RF level and SBAD for servo functions. It also includes DPD tracking error signal for DVD_ROM application. For DVD_RAM disks, there are also Differential Push-Pull (DPP) method for generating tracking signal and Differential Astigmatic Detection (DAD) for processing focusing signal. Programmable equalizer and AGC circuits are also incorporated in this chip to optimize read channel performance. In addition, this chip has dual automatic laser power control circuits for DVD-ROM (DVD-RAM) and CD-ROM separately and reference voltage generators to reduce external components. Programmable functions are implemented by the access of internal register through bi-directional serial port to configure modes selection. 2. Features RF equalizer with programmable fc from 3MHz to 70MHz and programmable boost from 3dB to 13dB. MT1336 supports at least eight different kinds of pick-up heads with versatile input configuration for both RF input stages and servo signal blocks. 3 beams tracking error signal generator for CD_ROM application. One beam differential phase tracking error (DPD) generator for DVD_ROM application. Differential push pull tracking error (DPP) generator for DVD_RAM application. Focusing error signal generator for CD-ROM, DVD-ROM and DVD-RAM (DAD method). RF level signal generator. Sub-beam added signal for 3 beams CD-ROM. One beam push-pull signal generator for central servo application. High speed RF envelop detection circuit with bandwidth up to 400KHz for CD-ROM. Defect and Blank detection circuits. Dual automatic laser power control circuits with programmable level of LD monitor voltage. Vref=1.4V voltage and V2ref=2.8V voltage generators. V20=2.0V voltage for pick-up head reference. Bi-directional serial port to access internal registers. 128-pin LQFP.
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3. block Diagram
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4.MT1336 Pin Descriptions Pin Numbers LQFP128 RF Flag Interface 23 DEFECT Digital Output Flag of bad data output status
Symbol
Type
Description
RF SIO interface 56 58 59 60 55 SCLK SDEN SDATA RST XCK16M Digital Input Digital Input Digital IO Digital Input Digital Input RF serial clock input RF serial data input RF serial data IO Reset(active high) 16.9MHz for verification
RF SERVO interface 40 41 38 RF 100 99 98 97 95 96 94 93 92 91 90 89 85 84 88 87 86 101 DVDA DVDB DVDC DVDD DVDRFIN DVDRFIP CDA CDB CDC CDD OSN OSP CEQP CEQN RFGC RFGCU RFGCU MA Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Analog Analog Analog Analog Analog Analog Analog Input AC coupled DVD RF signal input A AC coupled DVD RF signal input B AC coupled DVD RF signal input C AC coupled DVD RF signal input D AC coupled DVD RF signal input RFIN AC coupled DVD RF signal input RFIP AC coupled CD RF signal input A AC coupled CD RF signal input B AC coupled CD RF signal input C AC coupled CD RF signal input D RF offset cancellation capacitor connecting RF offset cancellation capacitor connecting RF offset cancellation capacitor connecting RF offset cancellation capacitor connecting RF AGC loop capacitor connecting for DVD-ROM RF AGC loop capacitor connecting for DVD-RAM RF AGC loop capacitor connecting for DVD-RAM DC coupled DVD-RAM main-beam RF signal input A
(Continued) 55
Control signal for DVD-RAM Control signal for DVD RAM DVD-RAM Header signal
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102 103 104 105 106 110 111 108 119 121 122 127
Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Analog Analog Analog Analog Output Digital Output Analog Output Analog Output
DC coupled DVD-RAM main-beam RF signal input B DC coupled DVD-RAM main-beam RF signal input C DC coupled DVD-RAM main-beam RF signal input D DC coupled DVD-RAM sub-beam RF signal input A DC coupled DVD-RAM sub-beam RF signal input B DC coupled DVD-RAM sub-beam RF signal input C DC coupled DVD-RAM sub-beam RF signal input D External current bias resistor (R=20K) Wobble AGC loop1 capacitor Wobble AGC loop2 capacitor Wobble AGC loop3 capacitor Header push-pull RF output signal Wobble signal output RF positive output RF negative output
5 7
RFOP PFON
TRACKING ERROR 32 33 61 116 115 21 DPFN DPFO DPDMUTE TNI TPI TEO Analog Analog Digital Input Analog Input Analog Input Analog Output DPD amplifier negative input DPD amplifier output DPD mute control input 3 beam satellite PD signal negative input E 3 beam satellite PD signal negative input F Tracking error output
FOCUSING ERROR & RF LEVEL & CENTRAL SERVO SIGNAL 112 113 18 19 20 ALPC 124 125 123 MDI1 LDO1 MDI2 Analog Input Analog Output Analog Input Laser power monitor input Laser driver output Laser power monitor input
(Continued) 56
Analog Input Analog Input Analog Output Analog Output Analog Output
CD focusing error positive input CD focusing error negative input Focusing error output RF level output Central servo signal output
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126 RF RIPPLE 26 27 25 24 POWER 67, 69 65, 73 64 62 109 107 114 117 2,120 128, 118 5 8 14 12 22 31 37, 54 39, 57
LDO2
Analog Output
RF top envelop filter capacitor connecting Defect level filter capacitor connecting High frequency RF ripple output or Blank detectors output Low frequency RF ripple output
AVDD AGND AVDD AGND AVDD AGND SVDD SGND WAVDD WAGND AVDDO AGNDO AVDDT AGNDT VDDP GNDP VDD GND
Power GND Power GND Power GND Power GND Power GND Power GND Power GND Power GND Power GND
Master PLL filter power GND for Master PLL filter DPD Power DPD GND RF path Power RF path GND Servo Power Servo GND Wobble Power Wobble GND Power for RF output GND for RF output Power for trimming PAD GND for trimming PAD Peak Detection Power Peak Detection GND Serial I/O Power Serial I/O GND
REFERENCE VOLTAGE 16 15 17 VREFO V2REFO V20 Analog output Analog output Analog output Reference voltage 1.4V Reference voltage 2.8V Reference voltage 2.0V
ALPC TRIMMING 9 10 11 13 TM1 TM2 TM3 TM4 Analog input Analog input Analog input Analog input Trimming pin for ALPC1 Trimming pin for ALPC1 Trimming pin for ALPC2 Trimming pin for ALPC2
HIGH SPEED TRACK COUNTING 29 TRLP Analog Low-pass filter capacitor connecting
(Continued) 57
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28 30 PCS 74 75 76 71 72 70
TRLPA HTRC
Low-pass filter capacitor connecting High speed track counting digital output
Analog input Analog input Analog output Analog input Analog input Analog output
Negative input of amplifier for hall sensor signal Positive input of amplifier for hall sensor signal Amplifier output for hall sensor signal Negative input of amplifier for hall sensor signal Positive input of amplifier for hall sensor signal Amplifier output for hall sensor signal
FOR MONITOR ONLY 81 80 66 77 78 79 MON MOP VCON SWO SW2 SW1 Analog output Analog output Analog output Analog output Analog input Analog input Output from mux of SW1 & SW2 External input for servo input select External input for servo input select
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3. Block Diagram
Fig.18
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Fig. 19
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Notes: Symbol of + and (output of drivers) means polarity to input pin. (For example if voltage of Pin1 is high, Pin14 is high.)
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5. Package Outline
Fig. 22
24C01
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1K EEPROM
1. Features Single supply with 5.0V operation Low power CMOS technology - 1 mA active current typical - 10 A standby current typical at 5.0V - 5 A standby current typical at 5.0V Organized as a single block of 128 bytes (128 8) or 256 bytes (256 8) 2-wire serial interface bus, I2C compatible 100KHz compatibility Self-timed write cycle(including auto-erase) Page-write buffer for up to 8 bytes 2 ms typical write cycle time for page-write Hardware write protect for entire memory Can be operated as a serial ROM ESD protection 3,000V 1,000,000 ERASE/WRITE cycles guaranteed Data retention 200 years 8 pin DIP or SOIC package Available for extended temperature ranges - Automotive(E) -40 to +125 3. Package Types
4. Block Diagram
2. Description The Microchip Technology Inc. 24C01B and 24C02B are 1K bit and 2K bit Electrically Erasable PROMs The devices are organized as a single block of 128 8 bit or 256 8 bit memory with a 2-wire serial interface. The 24C01B and 24C02B also have page-write capability for up to 8 bytes of data. The 24C01B and 24C02B are available in the standard 8-pin DIP and an 8-pin surface mount SOIC package. These devices are for extended temperature applications only. It is recommended that all other applications use Microchips 24LC01B/02B. Pin Function Table Name Vss SDA SCL WP Vcc NC Function Ground Serial Address/Data I/O Serial Clock Write Protect Input +5.0V Power Supply No Internal Connection
Fig. 23
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1.3 The SMPS outputs voltage lower than the rated value.
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1.4 The SMPS outputs voltage higher than the rated value.
1.5 The power indicator lights, but the SMPS is still in the Standby mode.
2. Control System
2.1 The power indicator lights, but the CPU cannot enter the Operation mode after power-on again.
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2.3
67
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68
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4.2
5. Audio System
No sound
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Debugging begins.
NO
YES
Supply power to the power PCB separately.
NO
Repair or replace the power PCB until the voltage output meets the requirements.
YES
Supply power to the DEMO PCB after no short circuit confirmed.
Check the output voltages +3.3V and +2.5V from the DEMO PCB for normality.
NO
Detect regulators or diodes of the two sets of power to get normal voltage output.
YES
Connect the unit to a computer and program FLASH on the DEMO PCB 1) Test frequency and amplitude of the main clock. 2) Check the system RESET circuit for normality. 3) Check the read enabling lines FRD and FWR of FLASH for normality. 4) Check RS232 signal for normality. 5) Check the peripheral circuit of FLASH.
NO
YES
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A
Reset or power on again. Check connection between FLASH and MT1369. FLASH runs fast enough?
NO
NO YES
NO
YES YES
Check the data received by the TV encoder for correctness.
Check connection between SDRAM and MT1369, and SDRAM for normality.
NO
YES
The TV encoder outputs normally?
NO
YES
Check connections between the video filter/video AMP and the TV.
NO
NO
YES
Check the signals TRCLOSE and TROPEN for normality.
NO
Check the circuit between the MT1336 and driver of the disc tray.
YES
YES
Check the signals LOAD+ and LOAD- for normality.
NO
YES
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When in the external coil, SLED can automatically enter the internal coil?
NO
NO
YES YES
NO
YES
Check the signals SL+ and sL- for normality.
NO
YES
No disc. Check connection to the loader.
NO
NO
YES
YES
Check the drive signals F+ and F- for normality.
NO
C YES
Check the circuit between the pickup head and BA5954.
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C
When reading a disc, laser on OK?
NO
NO
Check the peripheral circuit of MT1336 and circuit connected to the triode.
YES
Check the collector voltage of triode for normality.
YES
NO
YES
Check the circuit between the laser head and triode.
Discs placed?
NO
Laser off.
YES NO
Signals input to pins A, B,C, D, E and F of MT1336?
NO
Focus on OK?
YES YES
Check signal from MT1336 to FEO for normality.
NO
YES
Check circuit between MT1336's FEO and MT1369.
Disk ID OK?
NO
NO
YES
YES
Check the circuit between MT1336 and MT1369.
74
SERVICE MANUAL
D
Spindle revolves?
NO
NO
YES
Check the signals SP+ and SP- for normality.
NO
YES
YES
Check the circuit between the spindle and BA5954.
Track on OK?
NO
NO
YES
MT1339 outputs correct TRSO signal?
NO
YES YES
The signals T+ and T- output normally?
NO
YES
Check the circuits between T+/T- and laser head.
Disk is ready?
NO
Check RF signal.
YES
75
SERVICE MANUAL
NO
NO
YES
AUDIO DAC outputs correctly?
NO
YES
YES
Check connections to audio filter, audio amplifier, mute and output.
NO
Check communication between the IR/VFD/control buttons and MT1369 for normality.
NO
Check connection between MT1369 and module, and the peripheral circuit of IR, VFD and drive IC.
YES YES
Debugging completed. Check connections to the remote control, button matrix and VFD.
76
BTSC PCB
VCC [ 1,2,3,4 ] [1] [1] [4] VCC -P12V -P12V +P12V +P12V +12V +12V +5VV R64 18K
(9)
+ C83 10u
J2 AUDIO
5 6
CVBS CVBS
D
U9A +
LCH
R74 267k
R75 10k
8
2000p
R70 18K
C79 -12V 220p T_SY [4] [4] [4] T_SY T_SC T_SC T_CVBS T_CVBS VGND [ 1,2,3,4 ] VGND R76 267k RMAIN C80 + R71 R72 5.1k
6 4
R77 10k
8
2000p
+5VV
+5VV
(OPEN0
(9)
R105 75,1%
D3 1N4148
1
R88 75,1%
C86 10p
C99 FB4 HM102/0805 100U R/Cr R87 200 Q19 3906 C51 220p L19 1.8uH,DIP C89 220P
1 2
CVBS1 L11 +P12V 33UH/0307 CB81 0.1u + C73 100uF/16V +12V R108 200
Q16 3906
D5 1N4148
1
+5VV
2
(OPEN0
R111 75,1%
D7 1N4148
1
R89 75,1% C97 FB5 HM102/0805 G/YCVBS2 R90 200 Q21 3906
Q18 3906
D9 1N4148
1
100U
-12V
B
33UH/0307 CB86 C78 0.1u 100uF/16V R116 75,1% C128 10p + +5VV +5VV
+5VV
2
(OPEN0
D11 1N4148
1
R91 75,1% C98 FB6 HM102/0805 100U B/Cb R92 200 Q22 3906
Q20 3906
D13 1N4148
1
330p
10u
10k
C82
[4]
RMAIN
10u
10k
C77
J1
6 5
1 3 7
RMAIN
SPDIF
SPDIFOUT
C81 10u
SC
3 2
4 1
SY
A_MUTE 100P
Q10 3904
CB88 100P
(8)
S-video
+5VV
+5VV
3906 C
Title
MediaTek Incorporation
E
DVD130(MT1369AE)
Size C Date: Document Number
AV OUTPUT
Wednesday, July 24, 2002
1
Rev 2 Sheet 5 of 5
3-SY3669P2-V2
2 RF / SERVO & MPEG - MT1336E / MT1369E 3 MEMORY - SDRAM, FLASH/EEPROM 4 AUDIO - CS4334, VIDEO - CS4954/55 5 AV FILTER.
TYPE Digital 5V Servo 5V RF 5V Digital 3.3V Digital 3.3V Servo 3.3V Digital 2.5V Audio 5V Video 3.3V Video 5V Audio 12V
DEVICE SUPPLY MT1336E PICKUP HEADER SDRAM, Flash, VideoDAC MT1369E MT1369E MT1369E Audio DAC Video DAC Video DAC Audio filter
TYPE Digital Ground Servo Analog Ground Audio Ground Video Ground
JP7 +12V GND -12V D5V GND 3.6V GND S5V GND -22V ~3.5V ~3.5V
1 2 3 4 5 6 7 8 9 10 11 12
+P12V PGND -P12V +P5V PGND +P3.6V PGND +PS5V GND -P22V AC35V+ AC35VSGND
-P12V
+P5V +P12V -P12V VCC RVCC AVCC DV33 V33 AV33 V25
[ 2,3,4,5 ] [5] [5] [ 2,3,4,5 ] [2] [2] [ 2,3,4 ] [ 2,3,4 ] [2] [2]
CON12
1
RLS4148E
| V
Pitch=2.54 m/m
+ L6 33UH/0307 CB61 0.1u C60 220u
33UH/0307
CB62 0.1u
DV33
D1 R50
(11)
4.7k
GND SGND
GND SGND
[ 2,3,4,5 ] [ 2,3,4,5 ]
URST
[2]
SOT223
U11 G960T63U
VI VO GND 2
DV33 DV33
(6)
SOT223
+P36V
3
1N4001
(OPEN)
U12 G950T63U
VI VO GND 2
CB66 0.1u
MediaTek Incorporation
Title
DVD130(MT1369AE)
Size C Date:
4 3 2
Document Number
Rev 2 1 of 5
Sheet
VCC DV33 VCC +P5V VCC GND 33UH/LA0307 0.1u 1u T_CVBS T_CVBS VGND +P12V VGND [5] [ 1,2,3,5 ] L9 +5VA CB70 C68 T_SC +5VA T_SY T_SY T_SC [5] [5]
[ 1,5 ]
+P12V
R80A 0 NO STUFF
R82A 0
R84A 0 +12V
[5]
D
+12V
+12V DIF0 DIF1 DEM0 RESET# SDAT0 SBCLK SLRCK SACLK DIF1 DIF0 DEM0
1 2 3 4 5 6 7 8
U13
RST SDATA SCLK/DEM1 LRCK MCLK DIF1 DIF0 DEM0 MUTEC AOUTL Vcc GND AOUTR REF_GND VQ FILT+ 16 15 14 13 12 11 10 9 1
U15 ASPDIF
GND VO VI 3
ASPDIF
[ 2,5 ]
R81A 0
R83A 0 NO STUFF
R85A 0 NO STUFF
RMAIN 7805_2 LMAIN A_MUTE CB71 0.1u C69 1u CB73 0.1u C70 AGND 1u
CS4340
33 33 33 33
VSDA(U3.61) UP3..0(U3.66)
DIF1 0 0 1 1
C
DIF0 0 1 0 1
Descriptions I2S , Up to 24-bit Left Justified, Up to 24-bit Right Justified, 24-bit Right Justified, 16-bit
UP1..5(U3.62)
VCCA
2-CHANNEL,AUDIODAC
U19
C
MCLK TBCK-BCK
1 2 3 4 5 6 7 8
DEM0 0 1
GND AGND
TSD0--
DATA
TWS
LRCK
16 15 14 13 12 11 10 9
10k ZERO
PCM1748E
D18 RLS4148
VOR D17 GND VGND RLS4148 3.3UH/0805 L22 VCC33 CB48 0.1UF VOL
RST_TVE RST_TVE [2] [2] MUTE# RESET# MUTE# DV33 RESET# L10 33UH/0307 +5VA CB74 0.1u + C72 47u R55 10k [2] [2] VSCK VSDA VSCK VSDA CB75 0.1u CB76 0.1u CB77 0.1u
B
[ 2,3 ] [ 2,3 ]
SCL SDA
SCL SDA
+12V
U14
17 36 41 46 38
Q7
VDD VAA VAA VAA VREF
[2]
ASDAT0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
CLOCK RESET
[ 2,5 ]
ASPDIF
ASPDIF
1 2 3 4 5 6 7 8 26 25 24 23 22 21 20 19
V0 V1 V2 V3 V4 V5 V6 V7 PDAT0 PDAT1 PDAT2 PDAT3 PDAT4 PDAT5 PDAT6 PDAT7 RD WR TTXDAT TTXRQ INT
Q8 3906
9 10 11
R56 82 A_MUTE
DIP, pitch=10m/m
CVBS
44
R57 7.5k
C B
R58 22k R99
48
Y/CVBS2
3906
VCC
[2]
27 28 30 31 12
47
C71 100u/25V
RED
39
R/Cr 4.7K
A
40
G/Y/CVBS2 MUTE#
43 37
B/Cb R93 MUTEC Q24 3906 D16 1K R62 4k, 1% R99 ZERO 4.7K R94 1K Title 1N4001
18 35 42 45
MediaTek Incorporation
DVD130(MT1369AE)
Size C Date: Document Number Rev 2 Sheet
1
CS4954, TQFP-48
U6 U16 DMA0 DMA1 DMA2 DMA3 DMA4 DMA5 DMA6 DMA7 DMA8 DMA9 DMA10 DMA11 DBA0 DBA1 SDCLK SDCKE L5 V33 FB / 0805 CB49 0.1u SD33 + C55 47u DCS# DRAS# DCAS# DWE# RDQM0 RDQM1
19 18 17 16 15 39 36 40 23 24 25 26 29 30 31 32 33 34 22 35 20 21 38 37 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 BA0/A13 BA1/A12 CLK CKE CS RAS CAS WE DQML DQMH NC NC VSS VSS VSS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53
U17
2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 1 25
[ 1,2,4,5 ]
D
VCC V33
VCC V33
[ 1,2,4 ]
[ 1,2,4,5 ]
GND
GND
RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 SD33
DMA0 DMA1 DMA2 DMA3 DMA4 DMA5 DMA6 DMA7 DMA8 DMA9 DMA10 DBA0 SDCLK SDCKE DCS# DRAS# DCAS# DWE# RDQM0 RDQM1
21 22 23 24 27 28 29 30 31 32 20 19 35 34 18 17 16 15 14 36 33 37 26 50
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11 CLK CKE CS RAS CAS WE DQML DQMH NC NC VSS VSS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VCC VCC VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ VSSQ
RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 SD33
DMA0 DMA1 DMA2 DMA3 DMA4 DMA5 DMA6 DMA7 DMA8 DMA9 DMA10 DBA0 SDCLK SDCKE DCS# DRAS# DCAS# DWE# RDQM2 RDQM3
21 22 23 24 27 28 29 30 31 32 20 19 35 34 18 17 16 15 14 36 33 37 26 50
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11 CLK CKE CS RAS CAS WE DQML DQMH NC NC VSS VSS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VCC VCC VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ VSSQ
2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 1 25
RDQ16 RDQ17 RDQ18 RDQ19 RDQ20 RDQ21 RDQ22 RDQ23 RDQ24 RDQ25 RDQ26 RDQ27 RDQ28 RDQ29 RDQ30 RDQ31 SD33
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 RDQ16 RDQ17 RDQ18 RDQ19 RDQ20 RDQ21 RDQ22 RDQ23 RDQ24 RDQ25 RDQ26 RDQ27 RDQ28 RDQ29 RDQ30 RDQ31
VCC VCC VCC VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ VSSQ
1 14 27
SD33
7 13 38 44 4 10 41 47
SD33
7 13 38 44 4 10 41 47
SD33
3 9 43 49 6 12 46 52
[2] [2]
C
54 41 28
SDRAM 512Kx16x2 SDRAM 1Mx16x4 EliteMT M12L64164A-5T 54-Pin TSOPII(400mil x 875mil) ESMT M12L16161A-5T 50-PIN TSOP(II), (400milx825mil, 0.8mm pin pitch)
SDRAM 512Kx16x2 ESMT M12L16161A-5T 50-PIN TSOP(II), (400milx825mil, 0.8mm pin pitch) CS# RAS# CAS# WE# BA0 BA1
RN1
1 3 5 7
33x4
2 4 6 8
DQ[0..31] DQM[0..3]
SD33 DQM[0..3]
SD33 DCLK DCKE R47 R48 33 33 SDCLK SDCKE DMA0 DMA1 DMA2 DMA3 DMA4 DMA5 DMA6 DMA7 DMA8 DMA9 DMA10 DMA11
C56 47u
C57 47u
CB50 0.1u
CB51 0.1u
CB52 0.1u
CB53 0.1u
CB54 0.1u
CB55 0.1u
CB56 0.1u
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
VCC U7
[ 2,4 ] [ 2,4 ]
SCL SDA
SCL SDA
A[0..19] U8
AD[0..7]
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 FCE# FRD# FWR#
21 20 19 18 17 16 15 14 8 7 36 6 5 4 3 2 1 40 13 37 22 24 9
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 CE OE WE
D0 D1 D2 D3 D4 D5 D6 D7
25 26 27 28 32 33 34 35
NC NC NC
11 29 38
11 10 9 8 7 6 5 4 42 41 40 39 38 37 36 35 34 3 2
V33
Vcc
23
IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO8 IO9 IO10 IO11 IO12 IO13 IO14 IO15
15 17 19 21 24 26 28 30 16 18 20 22 25 27 29 31
CB57 0.1u
U10
NC NC NC WP 1 2 3 7
SDA SCL
RESET BYTE
44 33
CB78 0.1u
CB79 0.1u
43 14 12
WE OE CE
M24C16-W
GND GND
MediaTek Incorporation
Title
AT49F8192A
8M Flash
Size ize Document Number
Rev 2 3 of 5
Sheet
1
IO4
AVCC
RVCC
VCC
R38,R49,R61: FOR 5V
Z2
R49 0 RFVCC
R38 0
Z3 Z4
IO1 IO0
R60 0
R46 0
CB1 0.1u
R1 R2 R3 R4
SCLK
(10)
RFVCC
0.1u
3
G
AVDDP AGNDX AGNDP DPDMUTE RST SDATA SDEN GNDS SCLK XCK16M VDDS IOB IOA IO9 IO8 IO7 IO6 IO5 IO4 IO3 IO2 IO1 IO0 HDGATE UDGATE GND 2 1
1
Q2 2SK3018
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39
SGND
SGND
[ 1,3,4,5 ]
U1
2SK3018
3
Q3 2SK3018
3
CB4
VFO13 VDD AGNDX AGNDX AGNDX DPFO DPFN GNDP HTRC TRLP TRLPA CRTPLP CRTP HRFRP LRFRP DEFECT VDDP TEO CSO LVL FEO V20 VREFO V2REFO AVDDT TM4 AGNDT TM3 TM2 TM1 AGNDO RFON RFOP AVDDO AGNDX AGNDX WVDD WOBSO 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
CB5 0.1u
CB6 0.1u
CB7 0.1u
CB8 0.1u
CB9 0.1u
AVCC
SF-HD6AV/0.5mm,24P
TOP SIDE CONTACTED
+ CB13 0.1u
C3 100u
CON1
33UH/0307
R11
22
MC MD SA SB AGND IR AVDD SC SD CDFOP CDFON SVDD TPI TNI SGND WGAND AGC1 WAVDD AGC2 AGC3 MDI2 MDI1 LDO1 LDO2 RFSUBO WGND
103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
Q5 3CG8550D
RVCCIN
C
F E
R17 1,0805
R18 1,0805
15 16 17 18 19 20 21
U2
14 13 12 11 10 9 8
SL+ SLVCC
DV33
GND
C27 Z19 RFON AV33 RFON RFOP Z20 RFOP R27 10 C29 C31
C30 150p
GND
V25
VCC
47u
CB36 0.1u
CB35 0.1u
C28 150p
DV33
ASPDIF
URST
FMSO R25 20k TRSO V1P4 C33 150p CB39 0.1u STBY
RFIP RFIN RFDTSLVN SCOP SCON RFDTSLVP ADCVDD3 HRFZC RFRPSLV RFRP_AC RFRP_DC RFLEVEL FEI CSO TEI TEZISLV RFSUBI ADIN ADCVSS PDMVSS PWM2VREF PWMVREF PDMVDD3 DVDD3 BDO SLCK SDEN SDATA WOBSI UDGATE DVDD3 IFGATE VFO13 DVSS PRST ICE YUV7 YUV6 YUV5 DVDD2 YUV4 YUV3 YUV2 YUV1 YUV0 DVSS HSYN VSYN BLANK# MC_DAT SPDIF APLLVDD3
22 23 24 25 26 27 28
7 6 5 4 3 2 1
R23 10K
HSYNC# VSYNC#
Y7 Y6 Y5
Y4 Y3 Y2 Y1 Y0
R26 FOSO
20K OPOP+
LPIOP
LPION
U3
208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157
BA5954 GND
CB41 0.1u FG
TO-92
HEADER-5 (2.00mm) R140 TROPEN 1K Q13 8050 R143 390 C164 390P C165 390P R144 390 V25 Q14 R141 1K TRCLOSE DV33
C50 JP6
1 2 3 4 5 6 7 8 9
VCC -P22V AC35V+ AC35VAGND VFDVCC VSTB VSCK VSDA R65 R69 R78 0 0 0 V-STB V-SCK V-SDA -P22V AC35V+ AC35V-
AV33
R40
10U
DMVDD3 ALE IOOE# IOWR# IOCS# DVSS UP1_2 UP1_3 UP1_4 UP1_5 UP1_6 DVDD3 UP1_7 UP3_0 UP3_1 INT0# IR DVDD2 UP3_4 UP3_5 UWR# URD# XTALI XTALO DVSS RD7 RD6 RD5 RD4 DVDD2/3 RD3 RD2 RD1 RD0 RWE# CAS# RAS# RCS# BA0 DVDD3 RD15 RD14 RD13 RD12 DVSS RD11 RD10 RD9 RD8 VPVDD3 VCOCIN VPVSS
SCL
1k
DV33
DV33
GND
GND
V25
GND
V25
Z31 ALE
IR
RxD TxD
V33 JP8
1 2 3 4
RxD TxD
VFDVCC
RS232/4P,2.0 m/m
GND-LD LD-DVD HFM LD-CD MD VR-DVD VR-CD (LD-CD) NC CD/DVD C D F VCC VC GND-PD E A B NC TT+ F+ F-
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
MDI1
MDI1 L2 33UH/0307
C
CB22 0.1u 0.1u
0.1u
CB23
B
Q4 3CG8550D
2SB1132
LDO2
L4
D C B A
C13
DD AA BB AA CC
AGNDF VCON AVDDF AGNDX AVDDM COSPHI HALLCOS REFCOS AGNDM HALLSIN REFSIN SINPHI SW0 SW2 SW1 MOP MON AGNDX AGNDX CEON CEOP RFGCI RFGCU RFFGC OSP OSN CDD CDC CDB CDA DVDRFIN DVDRFIP DVDD DVDC DVDB DVDA MA MB
0.1u Z6 HRFRP R9 C2 HTRC C5 10p R10 RFRP BDO CB20 0.1u C7 TEO CSO RFL FEO V20 V1P4 V2P8 CB25 CB24 0.1u 0.1u 0.1u 10u 0.1u 10u CB26 + C10 CB27 + C11 C6 390p 100k Z8 HTRC 27p CB14 C4 0.015u 0.1u 27k
V25 CB15 0.1u CB16 0.1u CB17 0.1u CB18 0.1u CB19 0.1u
27MHZ
27MHZ
[4]
C8 470p
MT1336E
Y[0..7]
Y[0..7]
[4]
0.1u AV33
HSYNC# VSYNC# ASPDIF ACLK ALRCK ABCK ASDAT0 R13 CSO FEO RFL RFRP HTRC R14 Z16 RFRPC 0 RFZC RFRPC TEO C23 1000p Z17 V2P8 R145 MA[0..11] BA[0..1] 10k DQ[0..31] V2P8 ADIN CB37 0.1u + C25 47u Z18 ADIN C26 20p AV33 R22 C32 2.2u DQM[0..3] RAS# CAS# CS# WE# DCLK DCKE R15 R C21 1000p R16 18k 100k V1P4 CB32 0.1u CB33 0.1u + C19 A[0..19] 47u AD[0..7] PRD# PWR# PCE#
CB34 0.1u
D A
RST_TVE RST_TVE
C22 0.015u
R19 1,0805
MA[0..11] BA[0..1]
[3] [3]
[3] [3]
SPSP+
10
V1P4
R120
ADIN
+ C35 10u VCC SPSP+ LIMIT SL+ SLQ6 3904 R33 10K R31 390 R121 R R124 0 R122 R JP9
9 8 7 6 5 4 3 2 1
R28 V1P4 C36 47u + C37 100p CB40 0.1u Z23 LPFON Z24 LPFOP Z26 FOSO FOSO TRSO TROPEN PWMOUT2 DMSO FMSO Z29 FMSO Z25 JITFO C44 100p R30 R32 R34 R35 R36 R37 C38 1u C39 C40 10n C42 10n
10n
R29 20k
C43
10n
PLAYER_SLED,9P,2.0 m/m
Z27 TRSO
C B E
Z28 DMSO Z30 FG
3904
JP4
V1P4
C46 C
C47 330p
C48 330p
C49 0.015u
A8 A9 A10 A11 A12 A13 A14 A15 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 A0 A1 A2 A3 A4 A5 A6 A7 A16 A17 A18 A19
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
IREF PLLVSS LPIOP LPION LPFON LPFIP LPFIN LPFOP JITFO JITFN PLLVDD3 FOO TRO TROPENPWN PWMOUT2 DVDD2 DMO FMO FG DVSS HIGHA0 HIGHA1 HIGHA2 HIGHA3 HIGHA4 HIGHA5 DVSS HIGHA6 HIGHA7 AD7 AD6 AD5 AD4 DVDD3 AD3 AD2 AD1 AD0 IOA0 IOA1 DVDD2 IOA2 IOA3 IOA4 IOA5 IOA6 IOA7 A16 A17 IOA18 IOA19 DMVSS
MT1369E_208
APLLVSS ACLK ASDATA2 ASDATA1 ASDATA0 DVDD3 ALRCK ABCK RD16 RD17 DVSS RD18 RD19 RD20 RD21 DVDD2 RD22 RD23 DQM2 DQM3 DVSS RD24 RD25 RD26 RD27 DVDD3 RD28 RD29 RD30 RD31 DVSS RA3 RA2 RA1 RA0 DVDD2 RA10 BA1 DQM0 DQM1 DVSS RA4 RA5 RA6 RA7 DVDD3 RA8 RA9 RA11 CKE CLK DVSS
156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105
SCL SDA
[ 3,4 ] [ 3,4 ]
ASDAT0 DV33 ALRCK ABCK DQ16 DQ17 GND DQ18 DQ19 DQ20 DQ21 V25 DQ22 DQ23 DQM2 DQM3 GND DQ24 DQ25 DQ26 DQ27 DV33 DQ28 DQ29 DQ30 DQ31 GND MA3 MA2 MA1 MA0 V25 MA10 BA1 DQM0 DQM1 GND MA4 MA5 MA6 MA7 DV33 MA8 MA9 MA11 DCKE DCLK GND
R41 10
R125 10 MUTE#
1k
27MHZ
C136 100u
DIP
C53 1n
27MHz Y1
MediaTek Incorporation
DVD130(MT1369AE)
Size Document Number Custom Date: Rev 2 Sheet 2 of 5
VCC
L22
3.3UH/0805
SERVO & RF
TO TV JUV6.604.272
10
XP4
XP1
to the disc tray (13). 2. Stick the warning labels (9) conspicuously
XP3
TO TV
XS1
3 12 7 1
on the disc tray (13) and shield cover (6) respectively. 3. Fasten the flat cable between the disc tray and decoding board with the tape (14).
4. Bind wire with the wire clip (8). 5. Ensure that four fins of the shield case
JUV6.604.291
JUV6.604.290
Flat cable
11
13
18 17 16 15
14 13 12 11 10 9 JUV8.817.041 8 JU8.667.310 7 JUV8.072.015 6 JUV7.312.004 5 JUV7.312.003 4 JUV6.672.287 3 JUV6.604.291 2 JUV6.604.290 1 JUV6.463.001 Serial Code No. No. Disc tray (DJ100+DV-33FS) Screw 6560 M3X16 Screw 6560 M3X8 Tapping screw 3X8VTHO Warning label Wire clip Supporting column Shield cover Shield case Decoding board assembly Wired connector Wired connector Fastening clip assembly Parts 4 4 6 2 1 4 1 1 1 1 1 1 Qty Remarks