Qus1: How many times does the control unit refer to memory when it fetches and executes an indirect

addressing mode instruction if the instruction is 1 a computational type requiring an operand from memory 2 a branch type? (8-16)-295 page

Qus2: 1) Calculate the number of pipe clock cycles that it takes to process 100 tasks in five segment pipeline. 2) a non-pipeline system takes 40ns to execute a task. The same task can be processed in a five segment pipeline with a clock of 10ns.determine the speedup ratio of the pipeline for 100 tasks. (9-3,9-4)-329 Qus3: Explain an algorithm which produces O (n log2 n) time for matrix multiplication using array processor. Qus4: A two-word instruction is stored in memory at an address designated by the symbol W. The address field of the instruction (stored at W+1) is designated by the symbol Y. The operand used during the execution of the instruction is stored at an address Z. An index register contains the value X. State how Z is calculated from other addresses if the addressing mode of the instruction is direct, indirect, relative and indexed? (8-14) page 295 Qus5: What are the criteria for judging the architecture of serial computer? Explain. Qus6: Prove that a K-stage linear pipeline can be at most K times faster than that of a non pipelined serial processor. Qus7: Explain parallel sorting algorithm using array processors that has a speedup of O (log2 n) over the best serial sorting algorithm.