library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.

all; entity project is port ( clk,clr, en: in std_logic; OP : out std_logic_vector(7 downto 0); A0: in std_logic_vector(7 downto 0):= "00000011"; A1: in std_logic_vector(7 downto 0):= "00000010"; A2: in std_logic_vector(7 downto 0):= "00000001"; A3: in std_logic_vector(7 downto 0):= "00001001"; B0: in std_logic_vector(7 downto 0):= "00000100"; B1: in std_logic_vector(7 downto 0):= "00000101"; B2: in std_logic_vector(7 downto 0):= "00001001"; B3: in std_logic_vector(7 downto 0):= "00001010" ); end entity; architecture Project_A of project is signal en_counter: std_logic_vector(2 downto 0); signal M01: std_logic_vector(1 downto 0); signal S01: std_logic_vector(1 downto 0); signal S23: std_logic_vector(1 downto 0); signal X: std_logic_vector(7 downto 0); signal Y: std_logic_vector(7 downto 0); signal F: std_logic_vector(7 downto 0); signal controller: std_logic_vector(5 downto 0); signal T: std_logic_vector(3 downto 0); signal counter : std_logic_vector(1 downto 0):="00"; begin process(clr,clk,counter,en_counter,T,controller,X,Y ,M01,S01,S23,A0,A1,A2, A3,B0 ,B1,B2,B3,F) begin if (clr='1')then counter <="00"; elsif (clk'event and clk = '1') then counter <= counter+1; end if; en_counter<= en&counter; if en_counter= "100" then T<="1000"; elsif en_counter= "101" then T<="0100"; elsif en_counter= "110" then T<="0010"; elsif en_counter= "111" then T<="0001"; else T<="0000"; end if; if T = "0001" then controller<= "000000"; --controller output elsif T = "0010" then controller <= "101010"; elsif T = "0100" then controller <= "010101"; elsif T = "1000" then controller <= "111111"; end if; M01<=controller (1 downto 0); S01<= controller (3 downto 2); S23<=controller (5 downto 4); if S01= "00" then X <= A0; elsif S01 = "01" then X <= elsif S01 = "10" then X <= elsif S01 = "11" then X <= end if; -- we have to fix the input A1; -- controller for s0 and s1 A2; A3;

if S23 = "00" then Y <= elsif S23 = "01" then Y elsif S23 = "10" then Y elsif S23 = "11" then Y end if;

B0; -- we have to fix the input <= B1; -- controller for s2 and 23 <= B2; <= B3;

if M01 = "00" then F <= X + Y; -- we have to fix the input elsif M01 = "01" then F <= X- Y; -- controller for m0 and m1 elsif M01 = "10" then F<= X AND Y; elsif M01 = "11" then F <= X OR Y; end if; end process; OP<= F; end architecture;