Research Proposal

Currently, I am working on the VLSI architectures of turbo decoders, as my thesis work. By the time, I have been implemented two architectures for turbo codes, and in one of the implementation, I enhanced the architecture and obtained better results. I want to continue my research work in the field of computer architecture. I want to do my research work in the Parallel Computer Architectures. We have already achieved the maximum performance for single microprocessors using different techniques like pipelining and Instruction level parallelism (ILP), and have been reached up to the complexity level that any more will provide only diminishing returns. So at this level, further performance improvement is possible only possible by using parallel techniques like multi-threading and multi core processors. In the multiprocessor architectures, main problems are is to deal with the data sharing between different processors which occur due to cache coherency problem. Present techniques to deal with cache coherency problems are complex and increases data latency; I want to continue my Ph.D thesis work regarding this problem. Given the chance, guidance and knowledge platform, I will give my best to materialize my ideas.