Simulation and implementation of the BPSK modulation on a FPGA Xilinx Spartan 3 xcs2004ftp256, using Simulink and the System

Generator blockset for DSP/FPGA. Johanna S. Ruque*, David I. Ruiz*, Carlos E. Carrin& jsruquex@utpl.edu.ec, diruizx@utpl.edu.ec, cecarrion1@utpl.edu.ec School of Electronic and Telecommunications, Group of Electricity and Electronic Systems Technical University of Loja.

Abstract This work presents the simulation of a BPSK modulation using the Matlabs Simulink program, as well as its implementation in a Xilinxs Spartan 3 Field Programmable Gate Array (FPGA) development board. The steps taken to simulate the modulation and demodulation blocks are shown. The rules for the realization of FSK and OOK modulations are also presented. Introduction BPSK Modulation In this modulation one has as possible results two exit phases for the carrier with a single frequency. An exit phase represents a logical 1 and the other one a logical 0. As the input digital signal changes the state, the phase of the exit carrier moves between two angles that lie 180 outside of phase. BPSK Transmitter Figure 1 shows a simplified block diagram of a BPSK modulator. The coded signal enters to a multiplexer that commutes the phase of the carrier signal. Depending on the logical condition of the digital input, the carrier is transferred to the output, either in phase or at 180 outside of phase, with the reference carrier oscillator. The output spectrum of a BPSK modulator is only a double lateral band signal with suppressed carrier, where the high and low lateral frequencies are separated from the carrier frequency for a value that is a half of the bit rate. Therefore, the minimal required bandwidth to allow the worst case of the BPSK output signal is similar to the input bit reason. Figure 2 shows the output phase versus the time relationship for a BPSK wave form. The input signal can be +cos(t) or -cos(t). The recovery circuit detects and regenerates a carrier signal, as in frequency as in phase with

the carrier of the original transmitter. The balanced modulator is a product detector whose output is the product of the two inputs (the BPSK signal and the recovered carrier). Since the only possible outputs are the signals cos(t) and cos(t), the product detectors possible outputs will be: cos2(t) = + cos(2t), cos2(t) = - - cos(2t),

Figure 1

Figure 2: BPSK Modulation.

BPSK Receptor Figure 3 shows the blocks diagram of a BPSK receptor.

Figure 3

As only the continuous part is needed, a lowpass (LPF) filter is used to separate the recovered binary data from the complex demodulated signal [1]. Description BPSK Modulator The simulation was done using Simulink and the components of System Generator. The following tools were necessary for the simulation and implementation: Simulink Blockset - Pulse Generator: it simulates a train of pulses. - Scope: oscilloscope used to visualize the results. - Sine Wave: it generates sine functions. System Generator Blockset - Mcode: it calls a Matlab .m file and executes it inside the simulation [2]. - Gateway In: it makes an approach to the behaviour of a signal in hardware. - Gateway Out: it returns an approach of the behaviour of a signal in hardware to the simulation mode. - Mult: it carries out the multiplication of its two inputs. - FIR: it simulates a FIR Filter, making a call to the Matlab FDATool. - System Generator: It provides control of the system and simulation parameters. It is used to invoke the generated code. - Resource Estimator: it presents the resources of the device used in the simulation of the circuit. - FDATool: Filter Design and Analysis tool. System Generator It is a software tool that allows to create and to verify hardware designs for Xilinx FPGAS, it works together with Simulink and Matlab. It also allows the inclusion of DSP tools DSP to design with FPGAs, automatic generation of HDL code starting from a Simulink model and allows the user to create its own libraries. Simulation: The first phase is the realization of the modulator according to the scheme showed in the figure 4. The coded signal is entered in the (Mcode) block that works as multiplexer between the two carrier signals (cos(t) and -cos(t)) depending

on the binary values of the signal to be transmitted.

Figures 4: BPSK Modulator. This Mcode block makes a call to a .m file which contains the programming of the multiplexer in the following way:
function sal = BPSKmultiplex (ent_codif,porta,porta_despl); if ent_codif==1; sal = porta; else sal = porta_despl; end

This code, allows us to obtain an output carrier (porta) signal when the input is a level of high voltage, a cosine in this case, and a dephased cosine (porta_despl) signal of exit when the input is a level of low voltage. This high or low state is given by the signal that contains the information. The output signal of the multiplexer is the modulated one and is ready to be thrown to the channel. Figure 5 shows the signal containing the information upper part, and the modulated signal bottom part.

Figure 5: Information signal-Modulated signal.

BPSK Demodulator The demodulation is performed according to the scheme shown below.

Figure 6: BPSK Demodulator. To demodulate the signal coming from the channel, a (Mult) block that multiplies the signal for the recovered carrier is used. The pass-low filter FIR separates the continuous signal of + amplitude recovered from the demodulated complex signal and allows to select the zero frequency signal (+1/2 or -1/2). This filter is obtained making a call to the Matlab FDATool, that is an interface that allows designing a pass-low filter. Since at the output of the filter there are signals with amplitude and with ruffled border in each pulse, a comparison block that will provide levels of voltage of ones and zeros, and will avoid the curly of such pulses will be placed. The code of the .m file comparison is presented next:
function sal = BPSKcompa (ent) If ent > 0 sal = 1; else sal = 0; end

Figure 7: Modulation-Demodulation process. Results obtained by the software. - The first figure represents the coded signal containing the information. - Second figure represents the modulated signal that is sent to the channel. - Third figure shows the modulated signal with noise (cuanto de ruido?). - Fourth figure represents the recovered signal at the output of the pass-low filter. - Finally the fifth figure represents the signal at the output of the comparison, and it is the containing recovered information signal. One can observe that this signal has some delay due to the prosecution of the computer

This code, allows us to obtain at the output a voltage level 1, when the input (ent) is higher than certain reference voltage in this case 0V and a level voltage 1 when the input (ent) is lower than such reference voltage. It should also be mentioned that for the transmission channel simulation a white gaussian noise block generator will be placed. In Figure 7 it is presented the simulated demodulation process.

Implementation of the modulator and demodulator in the Xilinx FPGA Spartan3 development board. To implement the modulators in the Spartan3 development board it is necessary to know basic concepts on how is its operation and internal structure: Field-Programmable Gate Array (FPGA) An FPGA consists on arrangements of several programmable blocks (logical blocks) which are interconnected between themselves with input/output cells by means of vertical and horizontal connection channels [3].

Program Tools for the Implementation An FPGA presents the following characteristics: For the implementation of the OOK, FSK and BPSK modulators, already simulated, a tool offered by Xilinx, denominated JTAG Co-Sim will be used; this block allows the co-simulation of the design elaborated in the Spartan-3 development board.

Figures 8: Basic architecture of a FPGA. Mean consumption of power, although there are families specialized in lower consumption. Intermediate speed. High reliability. Very low development time. Simple methodology. Simple equipment. They increase the confidentiality of the card [4] Spartan-3. The FPGAs Xilinx Spartan are ideal for the low cost and high volume applications and are designed as substitutions for arrangements of fixed logic gates and for standard products of specific application (ASSP), like chips sets for bus interface [5]. Implementation in development board the Spartan-3
Figura 10:

Block JTAG Cosimulation

By double-clicking in this block, one can select the most convenient simulation options. Which in this case were : poner aca que opciones usaron. Once added to the design, we should verify that the development board is correctly connected to the computer. Then run the simulation.

The complete design is presented in the Figure 11 [6].

Figura 11: Block diagram of the Modulation-Demodulation process.

Figura 9: The Sapartan-3

Figure 9 shows the development board that will be used in the implementation of simulations. The Spartan devices are characterized to have a flexible and regular architecture composed by a Configurable Logic Blocks (CLBs) arrangement, surrounded by programmable Input/Output Blocks (IOBs).

The result of the simulation is compared with the results given by the actual implementation. This allows us to verify how close the simulation was to the real implementation. The Figure 12 shows the results of the implemented system.

Conclusions - Simulink tools offer a simplified environment for the simulation of communication systems in general. - The tools also simplied the process of passing from simulation to implementation, without the necessity of being an specialized hardware engineer. - One can observe that the use of the Mcode tool of System Generator, doesn't offer such advantages as minimizing the use of resources of the device and the design simplicity. - Since the results obtained in hardware are dependent of the design in software, it is much simpler to carry out changes in these results by means of the software, even after having finished the design and its implementation. This fact is considered one of the most important in the development of this type of designs. References [1] SISTEMAS DE COMUNICACIN DIGITALES Y ANLALGICOS, Leon W. Couch, Quinta Edicin.
Figura 12: Modulation-Demodulation process. Results given by the developement board.

One can observe that the results obtained in the development board are practically the same that those obtained in the previous simulation. In a similar way to the modulation block simulation, other blocks can be simulated. As incentive for readers to know more about these tools, some rules are given for the realization and simulation of the FSK and OOK modulations. These rules will simply their implementation. Firstly it is necessary to consider that in the FSK modulation it is the frequency what varies, instead of the signal phase. This could be done using a block that doesn't contain a dephased carrier but a carrier of different frequency. In the same way in the OOK modulation one can implement keeping in mind that for the change of binary value of the coded signal it is used a carrier signal for the 1 value and a zero signal when the carrier is 0. This part is eased using Matlab programming and making a call through a Mcode block.

[2] http://www.xilinx.com/products/software/sysge n/app_docs/user_guide_Chapter_7_Section_3.ht m [3] INTRODUCCIN A LOS DISPOSITIVOS FPGA. ANLISIS Y EJEMPLOS DE DISEO, Bozich Eduardo Carlos [4] DISPOSITIVOS PROGRAMABLES, CAPII, Francisco LGICOS Torres Valle

[5] http://www.xilinx.com/products/silicon_solutio ns/fpgas/spartan_series/spartan3_fpgas/index.ht m [6] Workshop Xilinx University Program, ISTEC, Pontificia Universidad Javeriana de Cali Colombia (PUJ), University of New Mxico, RedDSP PUJ-UTPL, Ing. Ferney Amaya, Ing. Alonzo Vera.