You are on page 1of 1

L. J.

Institute of Engineering & Technology


S.G. Highway, Ahmedabad-382210
EC Department/VI Sem
Assignment1
Name of faculty: D.S.Khurge Sub: VLSI Technology and Design

Given date: 3/2/2012 Submission date: 13/2/2012

VIVA will be taken in the concerned laboratories.

1. Explains VLSI design methodologies.


2. Explains VLSI design styles.
3. What are ASIC and FPGA.
4. What is regularity, modularity and locality.
5. Explain steps in pMOS fabrication process.
6. Explain VI characteristics of MOS transistor.
7. What is W/L ratio and how its related to transistor sizing.
8. What is noise margin and its effect on CMOS inverter.
9. What are interconnecting capacitances?
10. Explain design margin

You might also like