Digital Integrated Circuit (IC) Layout and Design

! EE

134 Winter 05

" Lecture Tu & Thurs. 9:40 11am ENGR2 142 " 2 Lab sections
M 2:10pm 5pm ENGR2 128 F 11:10am 2pm ENGR2 128

" NO LAB THIS WEEK " FIRST LAB Friday Jan. 20

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People
! Lecturer

- Roger Lake

" Office ENGR2 Rm. 437 " Office hours - MW 4-5pm " rlake@ee.ucr.edu
! TA

Faruk Yilmaz

" Office ENGR2 Rm. 222 " Office Hours TBD " faruk@ee.ucr.edu

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EE134 Web-site
! http://www.ee.ucr.edu/~rlake/EE134.html

" " " " "

Class lecture notes Assignments and solutions Lab and project information Exams and solutions Other useful links

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Class Organization
! Homework ! Labs ! Final

assignments (10%)

(20%) Project (50%)

" Tutorials to learn the Cadence design software " Design a digital circuit (eg. 4 bit adder) " Work in teams of 3
! Midterm

(20%)

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Text Book Digital Integrated Circuits:

A Design Perspective, 2nd Ed.
Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic

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Software
! Cadence

software

" Online documentation and tutorials " Sun4 UNIX Workstations

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What is this book all about?

!

Introduction to digital integrated circuits.

" " " " " " CMOS devices and manufacturing technology. CMOS inverters and gates. Propagation delay, noise margins, and power dissipation. Sequential circuits. Arithmetic, interconnect, and memories.

What will you learn?

" Understanding, designing, and optimizing digital circuits with respect to different quality metrics: cost, speed, power dissipation, and reliability

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Digital Integrated Circuits

Introduction: Issues in digital design ! CMOS devices and manufacturing ! The CMOS inverter ! Combinational logic structures ! Propagation delay, noise margins, power ! Sequential logic gates; timing ! Interconnect: R, L and C ! Arithmetic building blocks ! Memories and array structures ! Design methods
!
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EE134 Winter 2006 - Lecture 1

! Introduction

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Introduction
! Why

is designing digital ICs different today than it was before? ! Will it change in future?

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The First Computer (1832)

The Babbage Difference Engine (1832) 25,000 parts cost: 17,470

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ENIAC - The first electronic computer (1946)

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The Transistor Revolution

First transistor Bell Labs, 1948

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The First Integrated Circuits

Bipolar logic 1960s

ECL 3-input Gate Motorola 1966

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Intel 4004 Micro-Processor (1971)

1971 2,300 transistors 108 KHz operation

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Intel Pentium 4 microprocessor (2000)

42 M transistors (217 mm2) 1.5 GHz 0.18 m 180 nm technology node

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What Happened over 30 Years?

1971 2000

2,300 transistors 108 KHz operation

~ 15,000 x

42 M transistors 1.5 GHz operation

Automotive comparison: SF to NY in 13 seconds.

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Moores Law
#

In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months

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Moores Law

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LOG2 OF THE NUMBER OF COMPONENTS PER INTEGRATED FUNCTION

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16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975

Electronics, April 19, 1965.

Evolution in Complexity

20

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Transistor Counts
K 1,000,000 100,000 10,000 1,000 100 10
8086
Source: Intel

1 Billion Transistors
Pentium III Pentium II Pentium Pro Pentium

i486 i386 80286

1 1975 1980 1985 1990 1995 2000 2005 2010

Projected
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Courtesy, Intel

21

Moores law in Microprocessors

1000 Transistors (MT) 100 10 1 0.1 0.01 0.001 8085 8086 8080 8008 4004 1980 1990 Year 2000 2010 386 286 486

2X growth in 1.96 years!

P6 Pentium proc

1970

Transistors on Lead Microprocessors double every 2 years

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Courtesy, Intel

22

Die Size Growth

100

Die size (mm)

10 8080 8008 4004 1 1970 8086 8085 286

386

P6 486 Pentium proc

~7% growth per year ~2X growth in 10 years

1980

1990 Year

2000

2010

Die size grows by 14% to satisfy Moores Law

Courtesy, Intel

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Frequency
10000 Frequency (Mhz) 1000 100 486 10 1 0.1 1970 8085 8086 286 386

Doubles every 2 years

P6 Pentium proc

8080 8008 4004 1980 1990 Year 2000 2010

Lead Microprocessors frequency doubles every 2 years

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Courtesy, Intel

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Power Dissipation
100 P6 Pentium proc 10 8086 286 1 8085 8080 486 386

Power (Watts)

8008 4004

0.1 1971 1974 1978 Year 1985 1992 2000

Lead Microprocessors power continues to increase

Courtesy, Intel

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Power will be a major problem

100000 10000 Power (Watts) 1000 100 18KW 5KW 1.5KW 500W Pentium proc

286 486 8086 386 10 8085 8080 8008 1 4004 0.1 1971 1974 1978 1985 1992 2000 2004 2008 Year

Power delivery and dissipation will be prohibitive

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Courtesy, Intel

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Power density
10000 Power Density (W/cm2)

1000

Rocket Nozzle Nuclear Reactor

100

8086 10 4004 Hot Plate P6 8008 8085 Pentium proc 386 286 486 8080 1 1970 1980 1990 2000 2010 Year

Power density too high to keep junctions at low temp temp

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Courtesy, Intel

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Not Only Microprocessors

Cell Phone
Small Signal RF Power RF

Power Management

Digital Cellular Market (Phones Shipped)

Analog Baseband
Digital Baseband (DSP + MCU)

Year Units (M)

1996 48

1998 162

2000 435

2003 513

2004 648

2005 (703)

2006 (776)

2007 (836)

2008 (889)

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Challenges in Digital Design

(# Transistors) 1/(Transistor size)
Microscopic Problems
Ultra-high speed design Interconnect Noise, Crosstalk Reliability, Manufacturability Power Dissipation Clock distribution. Everything Looks a Little Different

Macroscopic Issues
Time-to-Market Millions of Gates High-Level Abstractions Reuse & IP: Portability Predictability etc.

?
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and Theres a Lot of Them!

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Productivity Trends
10,000 10,000,000 1,000 1,000,000 100 100,000 10 10,000 1 1,000 0.1 100
xx x xx x x x

Complexity Logic Transistor per Chip (M)

100,000 100,000,000

1,000 1,000,000 58%/Yr. compounded Complexity growth rate 100 100,000 10 10,000 21%/Yr. compound Productivity growth rate 1 1,000 0.1 100 0.01 10

0.01 10 0.001 1

1981

1983

1985

1987

1991

1993

1997

1999

2001

2003

1989

1995

2005

2007

Source: Sematech

Complexity outpaces design productivity

Courtesy, ITRS Roadmap

2009

Productivity (K) Trans./Staff - Mo.

Logic Tr./Chip Tr./Staff Month.

10,000 10,000,000

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Why Scaling?
Technology shrinks by 0.7/generation ! With every generation can integrate 2x more functions per chip; chip cost does not increase significantly ! Cost of a function decreases by 2x ! But
!

" How to design chips with more and more functions? " Design engineering population does not double every two years
!

Hence, a need for more efficient design methods

" Exploit different levels of abstraction
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Design Abstraction Levels

SYSTEM

MODULE + GATE

CIRCUIT

DEVICE G S n+ D n+

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Next Class
! Introduce

basic metrics for design of integrated circuits how to measure delay, power, etc. to IC manufacturing and

! Introduction

design.

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