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Chng II Tng hp v phn tch mch logic tun t

Quick introduction

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Solution

What would it happened ?

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TIMERS AND COUNTERS

Motor control

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Counter explain

Instruction list

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INFORMATION ON MITSUBISHI REGISTERS


Numeric Designations of registers M100 - 177 general M200 - 277 general M300 - 377 retentive (battery back up) D700 to 777 are data registers. A register may be thought of a s a bank of elements (called auxiliary relays) which are on or off. In our case there are 16 in each bank. Each bank starts with a number ending in zero e.g. M160 and ends with a number ending in 5 e.g. M175. Each element may be addressed and used individu ally and used for flagging operations. These may also be thought of as bits in a binary code. If a bank is addressed (e.g. M160) then you cannot address individual elements in it but you can use them as inputs.
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Register examples

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Explanations
When input X401 is on the bank of auxiliary relays M160 to M175 are recognised as a register and bit 0 (M160) is set high. Each time input X402 is pulsed, the bit is moved along to M161, M162 and so on. Each individual bit is used to turn on a corresponding output in order to indicate its status. For example if bit M165 is high, then output Y435 is turned on. Switch on X401 and output 430 should light up. Each time input X402 is pulsed the bit moves along and the next output light ups. When input X403 is pulsed, the register is reset. If X401 is off a low is loaded into M160. If a shifting performed, the low (light off) is carried along with each shift. By switching X401 on or off and shifting, it is possible to arrange any pattern on the register.

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2.1. Khi nim v mch logic tun t


2.1.1. nh ngha: Mch logic tun t l mch logic m tn hiu ra ca mch khng nhng ph thuc vo tn hiu u vo, m cn ph thuc vo th t, thi gian tc ng ca tn hiu vo 2.1.2. Tnh cht
C nh C yu t thi gian Cng 1 tn hiu vo, tn hiu ra c th khc nhau (cc trng thi trong hay trng thi lm vic)
t/h vo

Mch logic t hp

t/h ra

Mch nh

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2.1.3. Phn loi


Mch logic tun t ng b: vic chuyn trng thi trong mch khng nhng ch ph thuc vo tn hiu u vo, trng thi trong trc , m cn ph thuc vo xung ng b
Dng ph bin trong my tnh (mn T s)

Mch logic tun t khng ng b: vic chuyn trng thi trong mch ch ph thuc vo tn hiu u vo, trng thi trong trc
Khng c tn hiu ng b Thng gp trong cng ngh ca cc my sn xut cng nghip
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2.2. Biu din mch logic tun t


2.2.1. Biu din bng li ni, ch vit m t mt qu trnh cng ngh V d 2.1 : 3 nt n iu khin ng c M
n nt A: ng c quay thun n nt B: ng c quay nghch n nt C: ng c dng

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2.2.2. Biu din bng th thi gian V d 2.2


a1 a2 y a2 y
a1 1 2 1 2 3 2 1 4 5 2 1

a2 Y Z

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2.2.3. Biu din bng hnh v m t cng ngh V d 2.3


m a0 b0 b1

a1

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Xc nh trng thi ban u

2.3.3 Phng php GRAFCET


Biu din cc qu trnh cng ngh di dng lu (graph) cc trng thi lm vic Xy dng cc hm logic iu khin v s iu khin t lu cc trng thi lm vic

trng thi ban u tc nhn kch thch 1

trng thi lm vic 1

i-1

trng thi lm vic i-1 tc nhn kch thch i-1

trng thi lm vic i tc nhn kch thch i

i+1

trng thi lm vic i+1 tc nhn kch thch i+1


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Hm logic ca tng trng thi

i-1 ai i

S ai Si 1 Si Si 1
ai: tc nhn kch thch th i Si: tn hiu ra ca trng thi th i Si+ : hm iu khin trng thi i lm vic Si- : hm iu khin trng thi i ngh vic Phn t modul trng thi: 1u ra, 2u vo Si: tn hiu ra Si+ : tn hiu ghi Si- : tn hiu xa

i+1

S r le tip im

S i ( S i S i ).S i
Si

Si+ Si-

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Trnh t thit k ca phng php GRAFCET


Lp G I Chn s b thit b Lp G II
Chn loi thit b v cc bin logic tng ng M t chi tit cc trng thi lm vic, ch thch y cc hnh vi lm vic ca cng ngh L GI nhng m t c thay th bng cc thit b va chn (m ha GI dng bin logic )

Xc nh hm iu khin Xc nh s iu khin
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V d 2.10

a0 A+ A-

a1

Lp G I
Xc nh trng thi ban u

trng thi ban u n nt m hoc u hnh trnh

trng thi sang phi cui hnh trnh

trng thi sang tri u hnh trnh


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Lp G II
g

Xc nh hm iu khin

S0 m, a0

S1=A+ a1

S 0 S0 S1 S1

g a0 S 2 S1 (m a0 ) S0 S2

S2=Aa0

S 2 a1S1 S 2 S 0
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S iu khin r le-tip im
g a0 S0 m a0 S1 a1 S2 S1 S0
S2

S2

S1

S0

S0

S2

S1

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Examples
starts with everything off (retracted). Closing the push button switch PB1 starts the cycle. Next B g oes on (B+) and then when reaching full stroke it goes off again (B - ) When B is fully retracted (off) it is switched on again. When B reaches its full stroke for the second time, A is switched on. When A reaches full stroke both cylinders are switched off together and retract together. The cycle stops until PB1 is pushed again. B+ B - B+ A+ (A - B- ) simultaneously,
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Cc dng mch c bit


Mch phn k HOC

i ai+1 i+1 i+2 ai+2 i+3 ai+3

S i Si 1 Si 2 S i 3 S i 1 ai 1S i S i 2 ai 2 S i S i 3 ai 3 Si

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Mch hi t HOC

i+1 ai+1

i+2 ai+2 i+4

i+3 ai+3

Si 1 S i 2 S i 3 S i 4 Si 4 ai 1S i 1 ai 2 S i 2 ai 3 S i 3
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Mch phn k V

i ai+1 i+1 i+2 ai+2 i+3 ai+3

Si S i 1.Si 2 .S i 3 Si 1 S i 2 S i 3 ai 1.ai 2 ai 3 .S i
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Mch hi t V

i+1 ai+1

i+2 ai+2

i+3 ai+3

i+4

Si 1 S i 2 S i 3 Si 4 Si 4 ai 1.Si 1 .ai 2 .S i 2 .ai 3 .S i 3


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V d 2.11 trng thi ban u Xc nh


0
trng thi ban u

m a0 A+

b0 BB+ AA+

b1

A-

n nt m hoc u hnh trnh i xung v cui hnh trnh i ngang a1

trng thi i xung cui hnh trnh i xung

trng thi i ln u hnh trnh i xung v u hnh trnh i ngang u hnh trnh i xung v cui hnh trnh i ngang

trng thi sang phi cui hnh trnh i ngang

trng thi sang tri u hnh trnh i ngang 29

m g

b0 B-

b1

S0 g b0 S 4
0
S0 m a0 b0

a0 A+ a1 A-

B+ A+ A-

S S1

S1=A+ a1

S1 ( m a0b0 ) S 0 b1S 3 S 2 a1S1 S1 S 2


S 2 S3 S 4

S2=Aa0 b0 a0 b1
S3 a0b0 S 2 S 4 a0b1S 2

3
b1

S3=B+

S3 S1

S 4 S0

4
b0

S4=B-

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