Low Cost Narrowband Network Analyzer

Bachelor Degree Project Report Submitted by: Kaja Ameeruddin Mohammad (09007035)

Under the guidance of Prof. Girish Kumar

Department of Electrical Engineering Indian Institute of Technology Bombay November 2012

Abstract
Network analyzers have become one of the most important measurement tools for characterizing the performance of high-frequency components and devices. They can provide a wealth of knowledge about a device under test (DUT), including its magnitude, phase and group-delay response etc. But high costs of such instruments makes them unaffordable, especially in engineering institutes, where the use will only be limited to testing of devices for a specific application range. This project aims to design a low cost computer interfaced network analyzer to make it more affordable and portable, operating in the frequency range 800MHz 1000MHz. The design has been started with the idea of keeping the cost low without significantly affecting the performance of the system as a whole. Since laptops, computer desktops are extremely common nowadays, their computation power can be used for analysis. A microcontroller is used for system control and the laptop/computer desktop is used for computation and display purposes. The performance of both hardware and software has been followed very closely so as to keep the performance optimal. The following report covers not only the logic involved but also the detailed working, results and prototype hardware and software used.

Table of Contents
Abstract .. i List of Figures .... iii List of Tables iv Nomenclature . iv

Chapter 1 1.1 1.2 1.3 1.4 1.5 1.6 Chapter 2 2.1

Introduction 1 Networks and their Properties 1 Scattering Parameters .. 2 Measurement of S-parameters .. 3 Network Analyzers Background and Cost Survey .. 5 Motivation . 6 Outline of Report .. 6 Network Analyzer Overview . 7 Network Analyzer Architecture .. 7 2.1.1 Transmission/Reflection (T/R) Test Set .. 8 2.1.2 S-parameter Test Set 9 Proposed Design Technique . 10 Hardware Specifications of SNA 12

2.2 Chapter 3

3.1 Computer Microcontroller Interface 12 3.1.1 Microcontroller Unit .. 12 3.2 Voltage Controlled Oscillator (VCO) . 14 3.3 Power Divider .. 15 3.3.1 Wilkinson Power Divider . 15 3.4 Directional Coupler . 17 3.5 Power Detectors 19 Chapter 4 Software Specifications of SNA 21

4.1 PC Software and Graphical User Interface (GUI) . 21 Chapter 5 Conclusions and Future Work .. 23 Bibliography . 24

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List of Figures
Figure 1.1 Two port network showing incident and reflected waves . 2 Figure 2.1 Transmission/Reflection (T/R) Test Set Network Analyzer . 8 Figure 2.2 S-parameter Test Set Network Analyzer . 9 Figure 2.3 Proposed PC-based Network Analyzer Architecture .. 11 Figure 3.1 PIC18F4550 pin Configuration . 13 Figure 3.2 Functional Block Diagram of ADF4350 . 14 Figure 3.3 T-junction Power Divider 15 Figure 3.4 Wilkinson Power Divider 16 Figure 3.5 Directional Coupler 18 Figure 3.6 Power Detector - MAX4003 pin configuration 19 Figure 3.7 MAX4003 Output Voltage vs Input Power . 20

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List of Tables
Table 1.1 Cost Survey of Network Analyzers 5 Table 4.1 Advantages and disadvantages of different Coding Platforms .. 21

Nomenclature
VSWR Voltage Standing Wave Ratio Vmax, Vmin Maximum and Minimum Voltage Values Reflection Coefficient T Transmission Coefficient ZL Impedance of Load ZO Impedance of the Transmission Medium IL Insertion Loss RL Return Loss

Efficiency
S11 Input port Voltage Reflection Coefficient S12 Reverse Voltage Gain S21 Forward Voltage Gain S22 Output port Voltage Reflection Coefficient

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Chapter 1

Introduction
Microwave and RF Networks are used in a large variety of applications today, and their uses will keep increasing in the future with the coming of next generation of networks. It is important to understand the properties of these networks as well as the transmission and receiving devices. Each of these would have parameters we can theoretically calculate, but their practical applications can only be understood once their parameters are measured.

1.1 Networks and their properties

The main properties of a network you would capture is the power at any point along with its reflection coefficient, transmission coefficient, insertion loss, gain which are best described by finding its scattering parameters. As for a high frequency network, there is no proper definition for current voltage in the circuit. (They can even be used at lower frequencies but since we are dealing with microwave frequency range we limit our calculations to the S-parameters) Power at a given point is a measurable quantity. The other parameters are described in the equations below. Reflection coefficient is given by =
+

Transmission Coefficient T T=1+

Efficiency

|2| 1| |2

Return Loss RL = -20log | |

Insertion Loss IL = 20log |T|

Voltage Standing Wave Ration: Measures the level of mismatch VSWR =

1+| | 1| |

The above equations exhaustively describe the quantities of a given network we would want to analyse. In order to simplify the calculation and measurement of these quantities we use the two-port method calculating the scattering parameters for the signal. We use matched and unmatched loads unlike a normal electric circuit. Quantities are measured in terms of power of voltage or travelling waves.

1.2 Scattering Parameters

Two port method

Figure 1.1: Two Port network showing incident and reflected waves

For a case like the above two-port, the relations between the input and the output ports can be shown as the following equation

Scalar linear gain |G| = |S21|

Scalar logarithmic gain g = 20 log|S21| dB

Insertion Loss IL = -20 log |S21| dB

Input Return Loss RLin = |20 log|S11|| dB

Output Return Loss RLout = |20 log|S22|| dB

Reverse Gain (for when we invert the circuit) grev = 20 log|S12| dB

VSWR VSWRin =
1+|11| 1|11|

1.3 Measurement of S-parameters

The measurement in case of a given network circuit is the power given by source, power reflected and power transmitted of a two-port device. The Device Under Test (DUT) is considered a two-port black box and by obtaining its scattering parameters, we can characterize it. In order to connect the scattering parameters with the power measurements, we can observe the following From Figure 1.1 of the two-port network we can see a1, a2 are normalized incident waves on port 1 and 2 respectively b1, b2 are normalized reflected waves on port 1 and 2 respectively

Hence, |a1|2 = Power incident on input of the network; Power available from the source |a2|2 = Power incident on the output of the network; Power reflected from load |b1|2 = Power reflected from the input port of the network; Power available from source minus the power delivered to the network |b2|2 = Power reflected from the output port of the network; Power incident on the load

|S11|2 =

S11 =

1 1

(if a2 = 0)

|S22|2 =

2 2

S22 = |S21|2 =

(if a1 = 0)

2 1

S21 =

(if a2 = 0)

|S12|2 = Reverse Transducer power gain S12 =

1 2

(given a1 = 0)

Considering we have found the modulus of the S-parameters, we know the values of most of the properties of the given device under test (DUT). Since we are working on a scalar network analyzer, we plot only the magnitudes of the reflection and transmission coefficients and VSWR.

1.4 Network Analyzers Background and Cost Survey

A network analyzer is an instrument that measure the network parameters of electrical networks. It commonly measure S-parameters because reflection and transmission of electrical networks are easy to measure at high frequencies. A modern vector network analyzer can measure a components magnitude, phase, and group delay, show port impedances on a Smith chart, and, with time-domain capability, show the distance from a test port to an impedance mismatch or circuit fault. Network analyzers commonly measure S-parameters because reflection and transmission of electrical networks are easy to measure at high frequencies. Understanding a network analyzers capabilities and operation can help an operator derive optimum performance from the instrument. There are two kinds of network analyzers, depending on the measured s-parameters 1. Scalar network analyzer (SNA): Measures only the magnitude of the S-parameters of the Device Under Test (DUT) 2. Vector network analyzer (VNA): Measures both magnitude and phase of the S-parameters of the Device Under Test (DUT) Currently all units of a network analyzer are standalone units. We develop a computer interfaced scalar network that can have multiple functionalities because of the additional computing power.

Apart from its importance, the cost of a network analyzer affects its availability. Most commercially available network analyzers are costly, which make them unaffordable, especially in colleges and universities. Table 1.1 shows the cost survey of network analyzers available commercially

Manufacturer Agilent Technologies Agilent Technologies Rohde & Schwarz Rohde & Schwarz Rohde & Schwarz

Model No. E5061 E5072 ZVL303 ZVL606 ZVL13

Frequency Range 100kHz 3GHz 30kHz 4.5GHz 9kHz 3GHz 9kHz 6GHz 9kHz 13GHz

Approx. Cost (INR) 16,42,463 21,61,000 11,66,935 15,51,000 19,78,350

Table 1.1: Cost Survey of Network Analyzers

The cost of a network analyzer is affected by the following parameters: 1. Scalar or Vector Network Analyzer: Since a Vector VNA measures both magnitude and phase, its cost is more than that of an SNA. 2. Type of test set: There are two kinds of test sets which may be used in a network analyzer a T/R test set and an S-parameter test set. A T/R test set offers single-port calibration, while the latter offers two-port calibration. These are more costly. 3. Frequency Range: Many network analyzers work on the lower range of the microwave spectrum while others work up to a larger frequency. Consequently, the large bandwidth instruments are of higher cost. 4. Display and Accessories: High-resolution displays with accuracy, availability of markers, dynamic range, internal memory, external memory addressing, etc. add to the instrument cost.

1.5 Motivation
Cost survey suggests that most network analyzers available commercially are very expensive, which demand the need for a low-cost design. Usually, the work done in colleges, universities and even at the industry level in many places, involves a small range of frequencies. For example, cellular operators as in GSM900, CDMA (IS-95) are interested in only 800MHz-950MHz band. Bluetooth and cordless applications are in the 1900MHz2500MHz band. Students, on the other hand, require narrowband use and their requirements are not as high-end as may be required in industry. The motivation behind this project is to design a low-cost, affordable (especially for engineering colleges) yet accurate network analyzer, in the 800MHz-1000MHz band.

1.6 Outline of Report

The report first discusses the extensive literature survey done to study the architecture of network analyzers in general, and the work done previously to design low-cost RF instruments. The proposed design is then discussed in chapter 2. Chapter 3 discusses the hardware components of the instrument with their physical properties and connections. Chapter 4 discusses the software that drives the instrument. It discusses the logical flow and analysis that goes into it and how the user would perceive the working device from the Graphical User Interface. The final chapter discusses the conclusion of the work so far as well as the future scope of the project concluding the report.

Chapter 2

Network Analyzer Overview

A scalar network analyzer (SNA) is a device that gives the magnitude of all the parameters of a given RF device. Its working is based on an internal frequency sampling process wherein the internal frequency sweeps through a user defined range measuring the power at the source, transmitted from the device and reflected power. Using the measures, we can easily get the scattering parameters, with which we then acquire the magnitudes of various properties of the given device.

2.1 Network Analyzer Architecture

The basic architecture of a network analyzer involves a signal generator, a test set, and one or more receivers. 1. Signal generator: The network analyzer needs a test signal, and a signal generator or signal source will provide one. Nearly all modern network analyzers have a built-in signal generator. High performance network analyzers have two builtin sources. Two built-in sources are useful for applications such as mixer test, where one source provides the RF signal, another the LO, or amplifier intermodulation testing, where two tones are required for the test. 2. Test set: The test set takes the signal generator output and routes it to the device under test, and it routes the signal to be measured to the receivers. It often splits off a reference channel for the incident wave. In a SNA, the reference channel may go to a diode detector (receiver) whose output is sent to the signal generator's automatic level control. The result is better control of the signal generator's output and better measurement accuracy. In a VNA, the reference channel goes to the receivers; it is needed to serve as a phase reference. 3. Receiver: The receivers make the measurements. A network analyzer will have one or more receivers connected to its test ports. The reference test port is usually labelled R, and the primary test ports are A, B, C. Some analyzers will dedicate a separate receiver to each test port, but others share one or two receivers among the ports. The R receiver may be less sensitive than the receivers used on the test ports. For the SNA, the receiver only measures the magnitude of the signal and for the VNA, it measures both the magnitude and the phase of the signal.

2.1.1 Transmission/Reflection (T/R) Test Set

As the name suggests, one test port serves purely for measuring transmitted power, while the other purely for measuring reflected power, the reference signal has only one path and the DUT port connected to port 1 will have its reflected power measured (S11), while that connected to port 2 will have its transmitted power measured (S21). The user needs to manually reverse the DUT connections to measure the remaining two S-parameters (S12 and S22)

Figure 2.1: Transmission/Reflection (T/R) Test Set Network Analyzer

The reference signal generated is split into two parts by means of a power splitter. Once of the arms is the unchanged reference signal, fed to the reference receiver. The other output of the splitter is routed through to the DUT, through port 1. The reflected wave from the DUT travels back through port 1 and is coupled by the directional coupler to receiver 2, while the transmitted wave travels through port 2 and is sent directly to receiver 3. Each of the receivers measures the respective incident power and sends the data to the processor.

Clearly, an incident wave on port 1 results in two wave components a reflected wave on port 1, and a transmitted wave through port 2. The measurements will give S11 and S21. To measure S12 and S22, the user simply needs to reverse the DUT connections to the two ports. The computation to calculate various factors such as reflection coefficient, VSWR etc. is done by the processor, and displayed accordingly. Note that, for a T/R test set network analyzer, calibration is possible through port 1 only. In such an architecture, port 1 is called the reflection port and port 2 is called the transmission port. Two port calibration may be done in an S-parameter test set.

2.1.2 S-parameter Test Set

The architecture of S-parameter test set has essentially the same components as that in a T/R test set, but two port calibration is possible, and the S-parameters of the DUT may be measured in one go without the user having to manually change the DUT connections. A mechanically controlled switch changes the output and input port, in effect, both ports are bidirectional and the input port has to be routed through the switch to a matched load. The principle of operation overall remains the same.

Figure: 2.2: S-parameter Test Set Network Analyzer

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In an S-parameter test set there are four receivers, two of which are for reference power measurement. At a given position of the control switch, the outputs of only one of the two reference receivers are read by the processor. The two power splitters and directional couplers are identical.

2.2 Proposed Design Technique[5]

Attempts have been made to design low-cost network analyzers, and the conclusions from these projects have led to defining a final problem statement. This project aims to design a low cost alternative to implementing a scalar network analyzer. It has been decided to follow the architecture similar to a T/R test set, however, with a system control block decentralized from the rest of the system. Most engineering institutes have adequate number of PCs, and most students have their own laptops with a USB port. The deployment needs to be through USB, because simpler protocols such as RS232 are now becoming obsolete in PC manufacturing, and USB is truly a user-friendly plug-and-play technology. The system control block along with the display unit has thus been decided to be implemented on the computer, as this takes care of the programming and reduces the cost considerably. This system is being designed to work in the 800MHz 1000MHz range. Following considerations need to be made for the design. 1. RF Circuitry: To make a compact RF system, planar transmission line technology needs to be used (such as microstrip or stripline), and designs have to be made for good performance 2. Selection of Microcontroller: Choosing the correct microcontroller (MCU) is of utmost importance, taking into consideration both computation weight as well as ease of system control. Testing work has been done by using different MCUs. It is preferred for the MCU to have on-chip SPI Controller A/D Converters USB Port 3. Graphical User Interface (GUI): Since the system is PC-based, there needs to be a GUI for users convenience to specify frequency range, view the device test results, etc. the GUI needs to be free, since software licensing prevents free distribution of software. The software for the GUI design, thus, need to be carefully selected. The working of the system is as explained. Each of the blocks in the system will be dealt with individually, in further sections.

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Figure 2.3: Proposed PC-based Network Analyzer Architecture

1. The user enters the start and stop frequencies in the PC-based GUI and initiates the data acquisition process. 2. The GUI starts the USB communication by sending a start byte, which is received by the microcontroller (MCU) 3. The MCU starts the VCO sweep. The VCO is to be controlled by the SPI (Serial Peripheral Interface) bus of the MCU 4. The VCO is the test signal generator it generates a frequency sweep, i.e. sine waves with frequency increasing linearly in the specified range, as a function of time. It is controlled to generate frequencies from 800MHz 1000MHz. 5. The output RF signal is passed through a power splitter (50%). Half the power is used as a reference power and is measured by the reference power detector. 6. The other output of the power splitter is sent to the DUT. The reflected power is captured by power detector 2, through a directional coupler (DC), while the transmitted power through the DUT is measured by power detector 3. 7. Each power detector gives a DC voltage output, proportional to their input power. The analog signals are fed to A/D converters (ADCs), which are internal to the MCU. 8. The MCU then uses these digitized values to compute the reflection/transmission coefficients and sends them to the PC through the USB. 9. When the acquisition is complete, the GUI displays the results accordingly.

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Chapter 3

Hardware Specifications of SNA

In this chapter, we deal with the specifications required and the essential configuration of the hardware needed. We then go on to describe which component we use for our prototype device, its specifications, advantage and disadvantages.

3.1 Computer Microcontroller Interface

The most common method of computer interface with any device earlier was using serial ports, but as new generation of computers and laptops are gaining popularity, the serial port has become obsolete and the USB ports are the ones most frequently used for any kind of data transfer. Most laptops dont have the facility of a serial port. USB data transfer does not work as simply as a serial port wherein you can send and receive data simply. There are various protocols of device number identification, the maker of the device, setting a baud rate and handshaking signals that need to be fulfilled as you connect the device to the port. Most of the work was initially done using ATMEGA8L. But unfortunately ATMEGA8L has no native on-chip USB thus cannot deal with the complicated data transfer protocols required by USB data transfers. The only method for ATMEGA to communicate over USB would be to use a USB-RS232 converter (such as FT232/FT245/FT2232), which adds to the cost, though the programming becomes slightly easier due to its ability to register a USB interface as a virtual serial (COM) port. It was, however, decided to choose PIC18F4550 MCU.

3.1.1 Microcontroller Unit

PIC18F4550 is an 8-bit microcontroller of PIC18 family. PIC18F family is based on 16-bit instruction set architecture. PIC18F4550 consists of 32 KB flash memory, 2 KB SRAM and 256 Bytes EEPROM. This is a 40 pin PIC Microcontroller consisting of 5 I/O ports (Port A, Port B, Port C, Port D and Port E). Port B and Port D have 8 pins to receive/transmit 8-bit I/O data. The remaining ports have different numbers of pins for I/O data communications. PIC18F4550 can work on different internal and external clock sources. It can work on a varied range of frequency from 31 KHz to 48 KHz. PIC18F4550 has four in-built timers. There are various inbuilt peripherals like ADC, comparators etc. in this controller. PIC18F4550 is an advanced microcontroller which is equipped with enhanced communication protocols like EUSART, SPI, I2C, USB etc.

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Figure 3.1: PIC18F4550 pin configuration

Advantages: Large range of power supply from 2V 5.5V On-chip USB v2.0 compliant Serial Interface Engine (SIE) Large on-chip program memory of 32kB Master Synchronous Serial Port (MSSP) which incorporates SPI 13-channel, multiplexed 10-bit A/D converter (ADC)

It is important to note that the microcontroller has several tasks to handle. These are 1. Microcontroller Programming: Even before the MCU can handle the application program tasks it need to, there must be means to burn the application program binary code into the program memory of the MCU. This is usually done by means of a debugger or a hardware JTAG emulator in case of most microcontrollers. It is important to make the programming process independent of the emulator, so as to reduce the total system cost. A USB-based programming, has therefore been developed. 2. Application Deployment: Once the MCU has been programmed, it needs to communicate over USB to obtain commands from the user (PC) to start acquiring data, control the rest of the hardware and send the measured power values back to the PC.

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3.2 Voltage Controlled Oscillator (VCO)

A Voltage Controlled Oscillator is an electronics oscillator designed to generate the frequency for sampling of the signal based on the voltage input given by the microcontroller i.e. it generates the reference RF signal of frequency 800MHz-1000MHz. Here we use ADF4350, a 32-bit data processing chip, which allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers if used with an external loop filter and external reference frequency. It has an integrated voltage controlled oscillator (VCO) with a fundamental output frequency ranging from 2200 MHz to 4400 MHz. In addition, divide-by-1/2/4/8 or 16 circuits allow the user to generate RF output frequencies as low as 137.5 MHz. Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V and can be powered down when not in use. For applications that require isolation, the RF output stage can be muted. The mute function is both pin- and software-controllable. An auxiliary RF output is also available, which can be powered down if not in use. The VCO core in the ADF4350 consists of three separate VCOs each of which uses 16 overlapping bands to allow a wide frequency range to be covered without a large VCO sensitivity (KV) and resultant poor phase noise and spurious performance. The correct VCO and band are chosen automatically by the VCO and band select logic at power-up.

Figure 3.2: Functional Block Diagram of ADF4350

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3.3 Power Divider

The RF signal power output from the VCO is to be split into two halves. Thus we use Power dividers. Power dividers are passive devices used in the field of radio technology. They are used for combining or dividing a defined amount of the electromagnetic power in a transmission line to a port enabling the signal to be used in another circuit. Power dividers are often of the equal-division (3dB) type, but unequal power division ratios are also possible. The earliest transmission line power dividers were simple 3-port networks (T-junctions). These suffer from very poor isolation between the output ports a large part of the power reflected back from port2 finds its way into port3. In order to achieve isolation between the output ports while maintaining a matched condition on all ports we use Wilkinson power divider.

Figure 3.3: T-junction Power Divider

3.3.1 Wilkinson Power Divider

Wilkinson power divider is a form of power divider that is often used in microwave applications. It uses quarter wave transformers, which are easily fabricated as quarter wave lines on printed circuit boards and as a result it offers the possibility of proving a very cheap and simple divider while still providing high levels of performance. While the printed circuit board transmission line approach is widely used for the Wilkinson power divider, it is also possible to use other forms of transmission line (e.g. coaxial cable) or lumped circuit elements (inductors and capacitors).

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2-way Wilkinson Power Divider: Wilkinson power divider concept can be used not only as a 2-way system but can also be expanded for an N-way system. It uses quarter wave transformers to split the input signal to provide two output signals that are in phase with each other. The resistor between the two output ports enables the two outputs to be matched while also providing isolation. The resistor does not dissipate any power, and as a result the Wilkinson power divider can theoretically be lossless. In practice there are some losses, but these are generally low.

Figure 3.4: Wilkinson Power Divider

The values within the two way Wilkinson divider / combiner can be calculated: R = 2 x Zo Zmatch = SQRT 2 x Zo = 1.414 x Zo Where: Zo = characteristic impedance of transmission line 2Zo = the value of the terminating resistor connected between the two ports Zmatch = the impedance of the quarter wave transformers in the legs of the power divider

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Working of Wilkinson Power Divider: In order to see how the Wilkinson power divider works, consider a signal entering the left hand port, port 1 in the diagram above. The signal reaches the physical split and passes to both outputs, ports two and three of the Wilkinson divider. As the two legs of divider are identical, the signals appearing at the outputs will have the same phase. This means that ports 2 and 3 will be at the same potential and no current will flow in the resistor. As the power is being split, it is necessary to ensure that the impedances within the Wilkinson divider are maintained. To achieve this, the two output ports must each appear as an impedance of 2 x Zo - the two output ports of 2 Zo in parallel will present an overall impedance of Zo. The impedance transformation is achieved by placing a quarter wave transmission line between the split and the output - the transmission line has an impedance of 1.414 x Zo. In this way, the impedance within the system is maintained. The Wilkinson divider is an ideal form of divider for many RF applications. It provides a low level of loss and maintains a high level of isolation between the output ports. A further advantage is that it can often be made very cheaply when used at microwave frequencies because the transmission line elements can be printed on the circuit board. This means that the only component required for the Wilkinson divider is a resistor.

3.4 Directional Coupler

Directional couplers are RF passive devices used to couple a specific proportion of the power travelling in one transmission line out through another connection or port. They are most frequently constructed from two coupled transmission lines set close enough together such that energy passing through one is coupled to the other. This technique is favoured at the microwave frequencies the devices are commonly employed with. However, lumped component devices are also possible at lower frequencies. An essential feature of directional couplers is that they only couple power flowing in one direction. Power entering the output port is coupled to the isolated port but not to the coupled port. Directional couplers can be implemented using a variety of techniques including stripline, coaxial feeder and lumped or discrete elements. They may also be contained within a variety of packages from blocks with RF connectors, or solder pins, or they may be contained on a substrate carrier, or they may be constructed as part of a larger unit containing other functions. Directional couplers find many applications in RF design, ranging from through-line power sensors to transmitter automatic levels controls. As such they are particularly useful, enabling power levels to be sensed without making a direct connection to the transmission line carrying the power.

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Directional Coupler basics: A directional coupler is a four port device. The four ports are generally termed:

Input (Port 1, Incident) Transmitted (Port 2, Output) Coupled (Port 3, Forward coupled port) Isolated (Port 4, Reverse coupled port)

Figure 3.5: Directional Coupler

Typically the main line is the one between ports 1 and 2. Normally this may be more suited to carry high power levels and it may have larger RF connectors, if it is a unit with RF connectors. The other ports are normally more suited for lower powers as they are only intended to carry a small proportion of the main line power. Ports 3 and 4 may even have smaller connectors to distinguish them from the main line ports of the RF coupler. Often the isolated port is terminated with an internal or external matched load which would typically be 50 ohms. While specific ports are given labels on a device, this is normally more of a physical constraint as some ports will be manufactured to carry higher powers than others. In fact any port can be the input, and this will result in the directly connected port being the transmitted port, the adjacent port being the coupled port, and the diagonal port being the isolated port.

Directional Coupler Specifications: Common properties desired for all directional couplers are wide operational bandwidth, high directivity, and a good impedance match at all ports when the other ports are terminated in matched loads. The following three quantities are generally used to characterize a directional coupler: 1. Coupling Factor: The coupling factor indicates the fraction of the input power that is coupled to the output port Coupling = C = 10 log (P1/P3)

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2. Directivity: The directivity is a measure of the couplers ability to isolate forward and backward waves Directivity = D = 10 log (P3/P4) 3. Isolation: Power level difference between port1 and port4 (related to directivity) Isolation = I = 10 log (P1/P4) These quantities are related as I = D + C dB The ideal coupler would have infinite directivity and isolation.

3.5 Power Detectors

We require Power detectors that give a simple DC voltage proportional to the power they measure. Linear characteristic of the detector makes it easier for all further calculations. As seen in the Proposed PC-based Network Analyzer architecture three power detectors are required for the following purposes 1. Ref. Power Detector To measure the power level of the reference RF signal which is generated by the VCO and passed through the power divider. 2. Power Detector 2 To measure the power level of the reflected RF signal from port 1 of the DUT, which is coupled by the directional coupler. 3. Power Detector 3 To measure the power level of the RF signal transmitted through the DUT into port 2 of the network analyzer. The power detectors used here are MAX4003.

Figure 3.6: Power Detector - MAX4003 pin configuration

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Features of MAX4003: Complete RF Detector Frequency range from 100MHz to 2500MHz Input Range of -45dBm to 0dBm Fast response Low-current consumption: 5.9mA at Vcc = 3V Vcc = 3V 5V Linear output characteristics

Below is the output voltage to input power trend of MAX4003. From the figure we see that the output voltage is a linear function of input power.

Figure 3.7: MAX4003 Output Voltage vs Input Power

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Chapter 4

Software Specifications of SNA

In the previous chapter we discussed the various hardware components of the network analyzer being used. The various hardware functionality, expected performance and test results have been discussed. Now we look at the software involved in it. The device is as useful as the analysis it can do. The base behind all the analysis of this instrument lies in the software implementation and analysis of the readings that are taken in by the hardware.

4.1 PC Software and Graphical User Interface (GUI)

The Graphical User Interface takes care of three aspects: USB communication, the computation and analysis and the display of results. Objectively, the functionalities required of the computer user interface that the user works on are: Lets the user select the range of frequencies the user wants to sample Decide a frequency step for the measurements Measure the parameters in the forward and reverse direction Analyse the power measurements made to obtain the scattering parameters Calculate the values of the other properties on the basis of the S-parameters Display the results numerically as well graphically which makes it convenient to analyse and compare It should be intuitive to use It should communicate with the device with a readily available channel Developed ergonomics for the display

The software used to develop the above interface has a few pre-requisites needed by the specifications mentioned above and for the ease of development: Should be able to build applications and installation files Should be easy to code different parts for easy expansion of functionality Should be able to develop a graphical user interface Deal with mathematical analysis and graph plotting

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Language Labview

Visual Basic

MATLAB

SciLogic

Java

Advantages Easily manageable user interface Intuitive connection between the front panel and the logic blocks Technical software: easy to plot smith charts and bode plots Controls on the user interface panel can be easily customized to the real world controls Easy to develop a user interface Functions and coding similar to C++ Easy application builder Event driven programming language Integrated development environment Great with signal analysis Has very good imaging software for plotting of data Can build applications and a GUI too Technical software Has plotting devices and imaging Signal handling and analysis Freeware Freeware coding platform Universally used for application in all windows computers Signal handling too will be good User interface can be made Applications and installation files are easy to build Libraries for USB access available Libraries for plotting available Free software

Disadvantages Licensed Software, which has high investment cost Not very freely available, in case of future expansion or modification, the same version would be required Not all programmers are familiar with it Does not have mathematical plotting functions very easily Handling of signals from a USB port input requires intensive coding

It is a licensed software

wxGlade

Not a structured application builder Requires a real time LINUX platform Complex program structure Understanding a new language altogether, not similar to any of the previous Data handling is different from an of the other languages Difficult to find applets with RF handling capabilities GUI software utilities are somewhat limited Difficult to debug

Table 3.1: Advantages and disadvantages of different Coding Platforms It was decided to choose Python-based software wxGlade to design the first GUI. Considerable development of a GUI for a spectrum analyzer has been done using National Instruments LabVIEW, however, the licensing issue prevents distribution and ability for easy individual use. Hence, it seemed a worthwhile choice to attempt a design using freely available Python-based software for a GUI.
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Chapter 5

Conclusions and Future Work

In the previous chapters, the complete overview, development of the Scalar Network Analyzer had been discussed. In this chapter we deal with some results of testing of the device and the conclusions we get out of the project work done. Since it is an instrumentation project, the future scope of calibration, accuracy improvement, feature improvements is endless. Some such features that can be incorporated to make the instrument more efficient as well as some work that would be required to bring the current project in standalone unit form is described below. 1. System-Level Integration: Though the parts work independently, the entire scalar network analyzer system is yet to be integrated and tested in both hardware and software. The desktop GUI software and the MCU firmware in particular, need to have additional track of frequency of operation. If the software latency is high, it may not be able to keep up with the frequency sweeping speed, in which case, the sweeping speed needs to be lowered, at the cost of measurement accuracy. 2. GUI Portability: The GUI designed works currently well with the USB, on Ubuntu 11.10 (Debian-based Linux) and Fedora 13 (Redhat-based Linux) operating systems. However, a suitable Python GUI compatible with Windows need to be developed. 3. Vector Network Analyzer (VNA): The long-term goal of this project is to design a standalone vector network analyzer (VNA). So far, the project is on its way to a PCbased scalar network analyzer (SNA). In future, the next step would be to design a narrowband VNA using this scalable SNA design. The hardware will largely remain the same, except for the introduction of phase measurement with I/Q-demodulator, which is challenging. Once a narrowband VNA is designed, the next step would be for broadband design. This needs careful consideration for component design. For example, the Wilkinson power divider may be redesigned using a resistive power divider approach, which is broadband, but lossy. The effect of losses may be accounted for in software. Another challenging design would be a high directivity and broadband directional coupler.

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Bibliography
[1] Agilent Technologies Electronics Measurement Group, Network Analyzer Basics, 2006 [2] Agilent Technologies, AN1287-2: Exploring the architectures of Network Analyzers, 2000 [3] David M. Pozar, Microwave Engineering, Wiley Student Edition, 2005 [4] Wikipedia, http://en.wikipedia.org/wiki/Main_Page [5] Debpratim Ghosh, Low Cost Narrowband Network Analyzer, IIT Bombay, October 2012 [6] Neha Rambhia, Network Analyzers, IIT Bombay, June 2011 [7] Pinguino, http://wiki.pinguino.cc/index.php/Main_Page [8] wxGlade, http://wxglade.sourceforge.net [9] PyUSB, http://sourceforge.net/apps/trac/pyusb [10] Jan Axelson, USB Complete: The Developers Guide, Penram Publications, 2009 [11] Maxim, 100MHz to 2500MHz, 45dB RF Detector in a UCSP, MAX4003 [12] ADF4350 Power Divider, http://www.analog.com/static/importedfiles/data_sheets/ADF4350.pdf

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