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IS1168 168 Introductiontocomputersystems Introduction to computer systems architectureandprogramming

VonNeumannArchitecture
(version1.0) ( i 1 0) 3rd Oct2012

Lecturer: KOH Chung Haur

CommandingtheComputer
Tocommand/instructacomputer,youmustspeakits language. Eachoperationperformedbythecomputer/CPUis assignedaspecificnumber,calledaninstruction instruction InstructionSet InstructionSet: Thevocabularyofcommandsunderstoodby p computer ThelistofCPUinstructionsfortheoperationsthatit performs

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MachineInstruction/Language
Operationcode:whichoperationtoperform () y Addressfield(s):memoryaddressesofthevalues Example
Pseudocode:A=B+C VariableAstoredinMemorycell100 VariableBstoredinMemorycell150 VariableCstoredinMemorycell151 y MachineLanguage:
LOAD 150 # Load content of memory location 150 to registers # Add content of memory location 151 to registers # Load content of registers to memory location 100
IS1168 Introduction to computer systems architecture and programming

ADD 151 STORE 100

AssemblyLanguage
MIPS(MicroprocessorwithoutInterlockedPipeline Stages)example
add a, b, c add a, a, d add a, a, e # Add the 2 variables b and c and put their sum in a # The sum of b, c, and d is now in a # The sum of b, c, d, and e is now in a

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TheVonNeumannMachine
ENIAC:Programmable,butthetaskofenteringand alteringprogramswasextremelytedious. Iftheprogramcouldberepresentedinaformsuitable forstoringinmemoryalongsidethedata,thena computercouldgetitsinstructionsbyreadingthem frommemory,andaprogramcouldbesetoralteredby settingthevaluesofaportionofmemory. Stored StoredProgramConcept

IS1168 Introduction to computer systems architecture and programming

Stored StoredProgramConcept
Credits:JohnvonNeumann Theideathatinstructionsanddatacanbebothstored inthememory Thecontentofthememoryisaddressablebylocation, regardlessofwhatisstoredinthatlocation Instructionsareexecutedsequentiallyunlesstheorder p y isexplicitlymodified

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Stored StoredProgramConcept
EDVAC D VariableComputer C p ElectronicDiscreteVa 1945 IASComputer In1946,anewstoredprogramcomputer,designedby JohnvonNeumannandhiscolleagues,atthePrinceton Institute for Advanced Studies nstituteforAdvancedStudies. Completedin1952 Prototypeofallsubsequentgeneralpurposecomputers
IS1168 Introduction to computer systems architecture and programming

Stored StoredProgramConcept
Generalstructure: y Mainmemory:storesbothdataand Mainmemory program/instructions ALU(ArithmeticandLogicUnit) ALU(ArithmeticandLogicUnit):operates arithmetic/logiccomputationonbinarydata ControlUnit ControlUnit:interpretstheprogram/instructions y frommemoryandexecutesthem I/O(InputandOutput)equipment I/O(InputandOutput)equipment:operatedbythe controlunit,communicatewithdevices(e.g.screen, keyboard,storagedevices)
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TheVonNeumannMachine

IS1168 Introduction to computer systems architecture and programming

TheVonNeumannMachine
Therealizationthatprogram/instructionscouldbe encodedandstoredwasamajorinnovation TypesofvonNeumanncomputerstoday
Supercomputers Workstations PersonalComputers(PCs) p ( ) Laptops

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VonNeumannArchitecture
Mostmoderncomputersarebasedonthesamebasic design,whichistheVonNeumannArchitecture VonNeumannArchitecture Modelfordesigningandbuildingcomputers,basedon thefollowingcharacteristics:
4mainsubsystems:
Memory Arithmetic/LogicUnit(ALU) ControlUnit Control Unit Input/Output System(I/O)

Programisstoredinmemoryduringexecution Programinstructionsareexecutedsequentially
IS1168 Introduction to computer systems architecture and programming

VonNeumannArchitecture
ComputerSystem
Computer Data Input Device Main Memory

C P U

ALU Control Unit

Bus
Control

Bus
Output Device

Bus
Secondary Storage Device

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SignalsFlow

IS1168 Introduction to computer systems architecture and programming

CentralProcessingUnit(CPU)
Alsoknownasmicroprocessor orprocessor microprocessor processor p Thebrainofcomputer Consistsof: ControlUnit ArithmeticandLogicUnit SetofRegisters (includingprogramcounterkeeping Registers theaddressofthenextinstructiontobeperformed) the address of the next instruction to be performed) BusInterfaceUnit

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ControlUnit
Coordinatesthecomputersactivities , p p Retrieves,interpretsandperformsinstructions SetupforcommunicationwithRAMaddresses Managedatastoredinregistersandaccumulator Executeprogramsbyrepeatedlysteppingthroughthe InformationProcessingCycle,tillHALTcommandis received

IS1168 Introduction to computer systems architecture and programming

ControlUnit
InformationProcessingCycle
Fetch:gettingthe(next)instructionfrommemory,as(address) indicatedbytheprogramcounterregister (incrementprogramcounter) (instructionloadedintoinstructionregister) Decode:determiningwhatistobedone (dataoperandsneededfortheinstructionarefetchedfrom memory) Execute:issuingappropriatesignalstoALU,RAMand/orInput Outputtoperformtherequestedaction Store:savingtheresultstointernalregister,memoryorstorage
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ArithmeticLogicUnit
Performarithmeticandlogicaloperations ( ), ( ), Mathematical:addition(+),subtraction(), multiplication(x),division(/). Logical:comparisonsbetweentwoormoredata items,e.g.equal(=),greater(>),AND,OR,NOT,etc. Registers Storesdatawhenitmustbetemporarystoredinthe CPU,suchasoperandsofoperationsandintermediate results.
IS1168 Introduction to computer systems architecture and programming

ProcessingCycle

Copyright2011PearsonEducation,Inc.PublishingasPrenticeHall IS1168 Introduction to computer systems architecture and programming

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Bus
Acommunicationpathwayconnectingtwoormore devices Asystembusmovesdatawithinthecomputer Thegroupofparallelwiresthatconnectthedifferent components Singlepathwayusedtomovebothdataand y, / instructionsbetweenmemory,I/OandCPU
Busstrugglestoprovideallthedata/instructionsatfull capacity/speed Thistrafficcausesabottleneck VonNeumannBottleneck
IS1168 Introduction to computer systems architecture and programming

Bus

Copyright2012PearsonEducation,Inc. [Brookshear2009,Figure2.1]

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VonNeumannBottleneck
InVonNeumannarchitecture,CPUfetchesits instructionsfrommemoryoveracentralbus(collection ofwirestransferringbitpatterns).WhenCPUand of wires transferring bit patterns) When CPU and controllers(intermediaryapparatushandling communicationbetweenacomputerandother devices)competeforbusaccess,insufficientbusspeed impedesperformance,alsoknownasVonNeumann bottleneck.
[Brookshear2012,pp.111]

Attemptedsolutions

ParallelProcessing

morethanoneprocessorperformsatthesametime, resultinginfasterprocessing
IS1168 Introduction to computer systems architecture and programming

MemorySub MemorySubsystem
RandomAccessMemory(RAM)
Mainmemory;primarystorage; volatile Consistsofmanyfixedsizedmemorycells(storageunits) Eachcellhasanaddressassociatedwithit:00,01,02, Allaccessestomemoryaretoaspecificaddress Acellistheminimumunitofaccess(fetch/store) Thetimeittakestofetch/storeisthesameforallcells(random access) ) Whenthecomputerisrunning,bothprogram/instructionsand dataarestoredinthememory

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MemorySub MemorySubsystem
Cache
TemporarymemorythatcanbeaccessedfasterthanRAM Asmallunitofhighspeedmemorybuiltintotheprocessor(L1) orinbetweenCPUandRAM(L2)toimproveperformance Storesmostrecentlyuseddataorinstructions MoreexpensivethanRAM PrimaryCache:L1Cache,locatedinthemicroprocessorchip SecondaryCache:L2Cache,locatedonthecircuitboard S d C h L2 C h l d h i i b d

IS1168 Introduction to computer systems architecture and programming

MemorySub MemorySubsystem
DatatransfersnormallymadebetweenCPUregistersand mainmemory.CacheMemoryisaportionofhigh speedmemorylocatedwithintheCPUitself.Computer keepsacopyofdatafrommainmemorythatisof currentinterestincache.Inthatcase,CPUregisters communicatewithcache,resultinginmorerapid machinecycleastheexecutionisnotdelayedbymain memorycommunication. memory communication
[Brookshear2012,pp.90]

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MemoryHierarchy
Ideallyonewoulddesireanindefinitelylargememory capacitysuchthatanyparticularwordwouldbe immediatelyavailableWeareforcedtorecognizethe possibilityofconstructingahierarchyofmemories,each ofwhichhasgreatercapacitythantheprecedingbut whichislessquicklyaccessible.
A.W.Burks,H.H.Goldstine,andJ.vonNeumann PreliminaryDiscussionoftheLogicalDesignofanElectronicComputing Instrument,1946.

IS1168 Introduction to computer systems architecture and programming

Input/Output Subsystem Sub

HandleInput/Output/Storagedevices I/OControllers Specialpurposeprocessor Hasasmallmemorybuffer,andacontrollogicto controlI/Odevices(e.g.diskarm) Sends Interrupt Signal to CPU when done read/write SendsInterruptSignal toCPUwhendoneread/write InterruptSignal DatatransferredbetweenRAMandmemorybuffer CPUfreetodosomethingelsewhileI/Ocontroller reads/writesdatafrom/todevicesintoI/Obuffer
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VonNeumannArchitecture
Advantages Requires less hardware; one Requireslesshardware;one memoryforbothdata& instructions Separatedatabusarenot required Programlocality Easyimplementation Disadvantages Sequential in nature Sequentialinnature Slowerprocess: sharedmemoryforboth data&instructions Executesinstruction serially Systemcrash: misinterpretationbetween b data&instruction Nonoptimal:someregisters areidle

IS1168 Introduction to computer systems architecture and programming

HarvardArchitecture
Harvardarchitecture hasphysicallyseparatesignals andstorageforcodeanddatamemory,madeit possibletoaccessprogrammemoryanddatamemory simultaneously.AscomparedtoVonNeumann architecture,whichhassharedsignalsandstoragefor codeanddatamemory. Separatesdataandinstructionbuses,allowingtransfers tobeperformedsimultaneouslyonbothbuses. b f d l l b hb Harvardarchitecture tendtobetargetedathigher performancesystems,andsocachesarenearlyalways usedinsuchsystems.
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Harvardvs Harvardvs VonNeumann

www.pictutorials.com/Harvard_von_neumann.swf
IS1168 Introduction to computer systems architecture and programming

AdditionalReadings
RudolfEigenmann andDavidJ.Lilja,VonNeumann Computers,InWileyEncyclopediaofElectricaland ElectronicsEngineering,Volume23,pages387400, 1999.
https://engineering.purdue.edu/~eigenman/reports/vN.pdf

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UsefulLinks
ArithmeticLogicUnit
www.youtube.com/watch?v=UsK5KV1FPmA

ExplanationofCacheMemory
www.youtube.com/watch?v=4McNhpkDNpQ

IS1168 Introduction to computer systems architecture and programming

References
Brookshear,J.G.ComputerScience:AnOverview(11th Edition). (Boston,Mass.:Pearson,2012) Reynolds,C.andP.Tymann Schaums OutlineofPrinciplesof ComputerScience (Schaums OutlineSeries).(NewYork:McGraw Hill,2008) Patterson,D.A.andJ.L.HennessyComputerOrganizationand Design:theHardware/softwareInterface. (Burlington,Mass.: ElsevierMorganKaufmann,2008). Stallings,W.ComputerOrganizationandArchitecture,Designing forPerformance. (Boston,Mass.:Pearson,2010).

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