*12069*

12069
Seat No.
(1) All questions are compulsory. (2) Answer each next main question on a new page. (3) Illustrate your answers with neat sketches wherever necessary. (4) Assume suitable data, if necessary. (5) Mobile Phone, Pager and any other Electronic Communication devices are not permissible in Examination Hall. MARKS

21011
3 Hours/100 Marks Instructions :

1. Attempt any ten of the following : a) Define the terms : i) 1s complement and ii) 2s complement. b) Write Associative and Commutative Boolean laws. c) State the name of following ICs i) 74150 & ii) 74151

(102=20)

d) Define Demultiplexer. Draw generalized block diagram of 1:n demultiplexer. e) State two applications of D-flip-flop. f) Draw 1-bit memory cell using NAND gate. g) Define the terms Fan-in and Fan-out. h) Draw symbol of NOR gate and writ its truth-table.
P.T.O.

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*12069* MARKS

i) Give IC nos. for the following gates : i) TTL Hex-inverter and ii) 2-I/P TTL NOR gate. j) Convert the following binary nos. into BCD code : ii) (110010) 2 i) (10010.10)2 and k) Show that
x y z
x y
y
x z  x
z

l) Convert following binary code into Ex-3 and gray code : (10110.101)2 2. Attempt any four of the following : a) Perform the following operations in binary i)

1 1 1 1 0 0 

1 0 0  a n d

16

ii)

b) Simplify the following expression using boolean laws i) Y = (A + B) (A + C) ii) Y = ABC +

) * +
) * +

c) Write truth table for 4:1 MUX and also draw its circuit diagram using logic gates. d) Draw and explain working of clocked S.R. flip-flop using NAND gate. e) Realize the following equations using NAND gates. i) Y = (A + B) . (B + C) ii) Y = AB + C f) With reference to K-map, define the following terms : i) Pair ii) Quad iii) Octet and iv) Overlapping group.

*12069* 3. Attempt any four of the following :

-3-

12069 MARKS 16

a) Compare combinational and Sequential logic circuits based on construction, working speed, storage, clk. b) Draw and explain working of 4-bit left shift SISO register. c) Compare TTL logic family with CMOS logic family with reference to supply voltage, power dissipation, fanout and speed. d) What is Demux tree ? Draw 1:16 DEMUX using 1:8 DEMUX and 1:2 DEMUX. e) Compare decoder and DEMUX with any two points and state the IC no. used for 3 to 8 line decoder. f) What is Race around condition ? How it can be overcomed ? 4. Attempt any four of the following : a) Explain Positive and Negative edge triggering methods of clk with their logic symbol. b) Draw 3-bit down counter using T-FF and explain its operation with timing diagram. c) Draw and explain CMOS two input NAND gate. d) State any four important characteristics of ECL logic family. e) Realize the following functions using DEMUX. i) F1 =

m

16

(0, 1, 3, 7, 11, 13, 15) (2, 4, 8, 10, 12)

ii) F2 =

f) Draw the logic ckt diagram of full adder using logic gate and explain working with one example. 5. Attempt any four of the following : a) Perform following BCD subtractions using 10s complement method i) (28)10 (16)10 ii) (12)10 (32)10 16

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*12069* MARKS

b) State the function of 7490 IC. Using this IC draw circuit diagram for mod-10 counter. c) State necessity of multiplexer. List its 2-applications. d) Using K-map reduction technique, find the expression for sum and carry outputs of Half adder. Realize these output equation by using NAND gates only. e) Write rules for BCD addition and perform the following operation in BCD. (28)10 + (16)10 f) Draw block diagram of 3-bit twisted ring counter using D-flip-flop, also write its truth-table. 6. Attempt any four of the following : a) Using NAND gates, implement : i) OR-gate and ii) NOR-gate b) Draw block diagram for 3-bit left shift PISO shift register. Also draw its timing diagram. c) Draw functional pin diagram of IC-7474 and state its two features. d) Write truth-table for 1:4 DEMUX. Implement 1:4 DEMUX using gates. e) Draw T-FF using J-K FF. Also write its truth-table. f) Draw and explain the operation 2-i/p totempole TTL NAND gate. 16

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