Mark Bingeman PDF

Symbol-Based Turbo Codes
for Wireless Communications

by
Mark Bingeman
A thesis
presented to the University of Waterloo
in fullment of the
thesis requirement for the degree of
Master of Applied Science
in
Electrical and Computer Engineering
Waterloo, Ontario, Canada, 2002
c Mark Bingeman 2002
I hereby declare that I am the sole author of this thesis.
I authorize the University of Waterloo to lend this thesis to other institutions
or individuals for the purpose of scholarly research.
I further authorize the University of Waterloo to reproduce this thesis by pho-
tocopying or by other means, in total or in part, at the request of other institutions
or individuals for the purpose of scholarly research.
ii
The University of Waterloo requires the signatures of all persons using or pho-
tocopying this thesis. Please sign below, and give address and date.
iii
Abstract
This thesis studies a new method of combining Turbo Codes with various modula-
tion techniques to take advantage of inherent trade-os between BER performance,
code rate, spectral eciency and decoder complexity. Our new method, which we
call Symbol-Based Turbo Codes, parses the parallel data streams of the Turbo Code
encoder into n-bit symbols and maps each symbol to a point in a 2
n
-ary signal set.
In the case of Symbol-Based Turbo Codes with BPSK modulation, the BER perfor-
mance can be improved while at the same time decreasing the decoder complexity
as compared with the traditional Turbo Code.
Symbol-Based Turbo Codes are good candidates for spread spectrum commu-
nication systems such as CDMA. Specically, the Symbol-Based Turbo Code with
orthogonal modulation can be used for a non-coherent up-link, or bi-orthogonal
modulation for a coherent up-link. Furthermore, Symbol-Based Turbo Codes with
either M-ary PSK modulation or BPSK modulation can be used for a coherent
down-link.
iv
Acknowledgements
I would like to acknowledge my supervisor Dr. A. K. Khandani for his guidance
throughout my research. Thank-you for sharing your insight and enthusiasm about
the use of Turbo Codes in PCS applications.
I would like to thank NSERC, ICR and the University of Waterloo for their
nancial support.
I would also like to thank all my friends at the University of Waterloo Inter-
Varsity Christian Fellowship. Your friendship and encouragement has meant a lot
to me throughout my years at university.
v
Contents
1 Introduction 1
2 Turbo Codes 6
2.1 Linear Feedback Shift Register Sequences . . . . . . . . . . . . . . 6
2.1.1 Binary Linear Feedback Shift Registers . . . . . . . . . . . . 6
2.1.2 Generalized Linear Feedback Shift Registers . . . . . . . . . 8
2.2 Convolutional Encoders . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3 Turbo Code Encoder . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Upper Bound on BER Performance . . . . . . . . . . . . . . . . . . 13
2.5 Interleaver Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.6 Trellis Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.7 Turbo Code Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.8 Turbo Code BER Performance . . . . . . . . . . . . . . . . . . . . . 25
3 Symbol-Based Turbo Codes 27
3.1 Symbol-Based Turbo Code Encoder . . . . . . . . . . . . . . . . . 28
3.2 Symbol-Based Turbo Code Decoder . . . . . . . . . . . . . . . . . 31
vi
3.3 Orthogonal Modulation . . . . . . . . . . . . . . . . . . . . . . . . 34
3.4 M-ary PSK Modulation . . . . . . . . . . . . . . . . . . . . . . . . 35
3.5 Bi-orthogonal Modulation . . . . . . . . . . . . . . . . . . . . . . . 36
3.6 BPSK Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.7 Parity Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4 Simulation Setup 41
5 Numerical Results 43
5.1 Symbol-Based Turbo Codes BER Performance . . . . . . . . . . . . 43
5.1.1 Orthogonal Modulation . . . . . . . . . . . . . . . . . . . . . 43
5.1.2 M-ary PSK Modulation . . . . . . . . . . . . . . . . . . . . 45
5.1.3 Bi-orthogonal Modulation . . . . . . . . . . . . . . . . . . . 45
5.1.4 BPSK Modulation . . . . . . . . . . . . . . . . . . . . . . . 49
5.1.5 Parity Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.2 Complexity and Memory . . . . . . . . . . . . . . . . . . . . . . . 56
6 Conclusions 59
A Complexity and Memory Calculations 64
Bibliography 72
vii
List of Tables
3.1 Various Modulation Vectors for n-bit Symbols . . . . . . . . . . . . 31
3.2 Mapping Between n-bit Symbols and Bi-orthogonal Vectors . . . . 36
3.3 Puncturing Patterns for Various Rate Turbo Codes . . . . . . . . . 39
5.1 BER Performance Degradation of Symbol-Based Turbo Codes for
Various Modulation Techniques as Compared with Symbol Size n =
4, 20 Iterations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.2 Relative Memory Requirements and Per Iteration Computational
Complexity of the Symbol-Based Turbo Code Decoder . . . . . . . 56
5.3 Total Number of Decoding Operations and Words of RAM Memory
Required for the Symbol-Based Turbo Codes (5 iterations) and a
Convolutional Code (K = 9) . . . . . . . . . . . . . . . . . . . . . 58
A.1 Number of Calculations Performed by the Symbol-Based Turbo Code
Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
A.2 Memory Requirements of the Symbol-Based Turbo Code Decoder
Per Input Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
viii
List of Figures
2.1 Binary Linear Feedback Shift Register . . . . . . . . . . . . . . . . 7
2.2 Generalized Linear Feedback Shift Register Structure . . . . . . . . 9
2.3 NRC and RSC Encoders . . . . . . . . . . . . . . . . . . . . . . . . 11
2.4 Rate 1/3 Turbo Code Encoder . . . . . . . . . . . . . . . . . . . . 13
2.5 Upper Bounds on BER Performance of Turbo Codes for M = 3,
G = (15, 13) and M = 4, G = (23, 35). . . . . . . . . . . . . . . . . 16
2.6 Upper Bounds on BER Performance of Turbo Codes for M = 4,
G1 = (37, 21) and G2 = (23, 35). . . . . . . . . . . . . . . . . . . . 17
2.7 RSC Encoder with Trellis Termination . . . . . . . . . . . . . . . . 21
2.8 Patrick Robertsons Turbo Code Decoder . . . . . . . . . . . . . . 24
2.9 BER Performance of Turbo Codes at Dierent Iterations . . . . . . 25
2.10 BER Performance of Turbo Codes . . . . . . . . . . . . . . . . . . . 26
3.1 Symbol-Based Turbo Code Encoder/Modulator . . . . . . . . . . . 29
3.2 Two Stage Basic and Merged Trellis Diagrams . . . . . . . . . . . 29
3.3 Three Stage Basic and Merged Trellis Diagrams . . . . . . . . . . . 30
ix
3.4 Recursive Systematic Convolutional Encoder With Dual Feed-Forward
Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.5 Symbol-Based Turbo Code Encoder With Partial Parity . . . . . . 40
4.1 AWGN and Rayleigh Fading Channel Models . . . . . . . . . . . . 42
5.1 BER Performance of Symbol-Based Turbo Codes (M = 4, N = 192)
With Orthogonal Modulation . . . . . . . . . . . . . . . . . . . . . 44
With M-ary PSK Modulation and Convolutional Codes (K = 9) . 46
With Bi-orthogonal Modulation over an AWGN Channel . . . . . . 47
5.4 BER Performance of the Rate 1/8 Symbol-Based Turbo Code (M =
4) With Bi-orthogonal Modulation over an AWGN Channel for Var-
ious Block Lengths . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
5.5 BER Performance of Symbol-Based Turbo Code (M = 4, R = 1/3)
with BPSK Modulation for Block Sizes, N = 192, 512 and i = 5, 10
Iterations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5.6 BER Performance of Rate 1/3 (M = 4) and Rate 1/4 (M = 3)
Symbol-Based Turbo Codes (N = 192) With BPSK Modulation for
5 and 10 Iterations . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5.7 Degradation in BER Performance of Rate 1/3 Symbol-Based Turbo
Codes (M = 4, N = 192) With BPSK Modulation vs. Number of
Iterations at a BER of 10
3
. . . . . . . . . . . . . . . . . . . . . . 52
x
With BPSK Modulation and Full Parity . . . . . . . . . . . . . . . 54
With BPSK Modulation and Partial Parity . . . . . . . . . . . . . 55
xi
Chapter 1
Introduction
In a digital wireless communication system, the purpose of the channel code is to
add redundancy to the binary data stream to combat the eect of signal degradation
in the channel. Ideally, channel codes should meet the following requirements:
1) Channel codes should be high rate to maximize data throughput. 2) Channel
codes should have good Bit Error Rate (BER) performance at the desired Signal-to-
Noise Ratio(s) (SNR) to minimize the energy needed for transmission. 3) Channel
codes should have low encoder/decoder complexity to limit the size and cost of the
transceivers. 4) Channel codes should introduce only minimal delays, especially in
voice transmission, so that no degradation in signal quality is detectable. These
requirements are very dicult to obtain simultaneously, excellent performance in
one requirement usually comes at the price of reduced performance in another.
However, for cellular voice and data communication, it is desirable that all these
requirements be met, which makes cellular communication systems very dicult to
design.
1
CHAPTER 1. INTRODUCTION 2
In 1993, Claude Berrou et. al introduced a class of parallel concatenated con-
volutional codes, known as Turbo Codes [1]. They claimed a BER performance of
10
5
at an SNR of 0.7 dB for a rate 1/2 binary code. This performance, which was
only 0.7 dB from the Shannon limit
1
, was a large improvement over other coding
methods at the time. Initially, Turbo Codes were received by the coding community
with a great deal of skepticism, until other researches were able to reproduce their
results [3, 4].
Some researchers have examined combining Turbo Codes with various modula-
tion techniques. However, the majority of these studies focus on high rate, spec-
trally ecient codes. For example, in 1994, S. Le Go, A. Glaviux and C. Berrou
presented a rate R = (m m)/m Turbo Code in conjunction with M-ary Phase
Shift Keying (PSK) or Quadrature Amplitude Modulation (QAM) schemes [5].
These codes processed m m bits from each of the 3 parallel data stream of the
Turbo Code, and punctured the parity bits appropriately before mapping the code-
word to a 2
m
point PSK or QAM signal set. These codes were decoded using soft
demodulation followed by Turbo decoding.
Similarly, R. Pyndiah, A. Picart, and A. Glavieux, applied Turbo decoding to
product codes with 16-QAM and 64-QAM modulation to obtain high rate, spec-
trally ecient codes [6]. For spectral eciencies greater than 4 bits/s/Hz, their
codes performed better than the convolutional Turbo Codes with QAM presented
by Le Go et. al. This is due to the degradation in the performance of convolutional
Turbo Codes when the code is punctured to increase its rate.
1
Claude Shannon originally presented theoretical limits on the performance of a communication
system in [2].
Benedetto et. al presented a combination of Trellis Coded Modulation (TCM)
and Turbo Codes for high rate, spectrally ecient codes in [7]. These codes are
formed by a parallel concatenation of two rate b/(b + 1) constituent codes which
have b systematic bits and one parity bit generated by a recursive convolutional
encoder. The outputs of each constituent code are punctured to obtain the desired
over-all code rate. 8-PSK, 16-QAM, or 64-QAM modulation schemes are then used.
Benedetto et. al reported BER performances within 1 dB of the Shannon limit for
both 2 and 4 bits/s/Hz throughputs. This was the best BER performance for these
throughputs at that time.
The low rate Turbo coding methods primarily focus on deep-space communica-
tions and spread spectrum communications where high coding gains are required
and lower throughputs can be tolerated. Divsalar and Pollara increased the coding
gain of Turbo Codes by parallel concatenating multiple (more than two) Recursive
Systematic Convolutional (RSC) encoders for deep-space applications [8]. These
codes, which the authors called, Multiple Turbo Codes, perform better than the
traditional Turbo Codes in terms of BER performance for moderate block sizes
(i.e. N = 4096) and rates (i.e. R = 1/4). For smaller block sizes (i.e. N = 192),
Multiple Turbo Codes perform worse than the traditional Turbo Codes. Therefore,
Multiple Turbo Codes are appropriate for deep-space communications where long
delays are tolerable, but not for spread spectrum voice communications where long
delays cannot be tolerated.
Other low rate Turbo Coding methods consist of combining Turbo Codes with
orthogonal modulation. These codes are mainly suited for spread spectrum commu-
nication methods such as Code Division Multiple Access (CDMA) systems where
lower code rates can be accommodated in the large spreading factor. Pehkonen
and Komulainen presented super-orthogonal Turbo Codes in [9]. In these codes,
the state of the RSC encoder and the current input bit are used to select a row of
a Walsh-Hadamard matrix (or its complement). The desired code rate is obtained
by puncturing on an orthogonal symbol basis (i.e. certain orthogonal symbols are
not transmitted).
Naftaili Chayat combined Turbo Codes with orthogonal signaling by augmenting
the RSC encoders with more feed-forward outputs. The n parallel outputs of the
RSC encoders are mapped to the points of a 2
n
-ary orthogonal signal set. As
with the previous coding method, the desired rate is obtained by puncturing on an
orthogonal symbol basis [10].
This thesis studies a new method of combining Turbo Codes with various mod-
ulation techniques. Unlike the codes discussed previously, our codes modulate each
parallel data stream independently by parsing each data stream into n-bit sub-
blocks which we call symbols, and mapping each symbol to a point in a 2
n
-ary
signal set. Furthermore, the interleaver is restricted to permute sub-blocks. With
this restriction in place, the eective encoder operates on a symbol-by-symbol ba-
sis. We call these codes Symbol-Based Turbo Codes. Trade-os between the BER
performance, code rate, spectral eciency, and decoder complexity can be made by
the selection of dierent symbol sizes, n, and modulation techniques. In the case of
Symbol-Based Turbo Codes with BPSK modulation, the BER performance can be
improved while at the same time decreasing the decoder complexity as compared
with the traditional Turbo Code.
The rest of this thesis is organized as follows: Chapter 2 gives an overview
of Turbo Codes and other related background theory. Chapter 3 presents the
Symbol-Based Turbo Code encoder and decoder structures. Chapter 4 describes the
simulation setup. Chapter 5 presents the numerical results of the simulations as
well as a discussion on decoder complexity. Finally, Chapter 6 concludes with a
summary of results and suggests some future research directions.
Chapter 2
Turbo Codes
2.1 Linear Feedback Shift Register Sequences
2.1.1 Binary Linear Feedback Shift Registers
The Turbo Code encoder is built using Recursive Systematic Convolutional (RSC)
encoders. Since RSC codes are governed by Linear Feedback Shift Register (LFSR)
theory, we will review the aspects of LFSR sequences which are relevant to Turbo
Codes. An extensive study on shift register sequences was made by Golomb in [11]
A binary LFSR is an arrangement of n memory elements which each store a
binary variable, {0, 1}. The basic structure of a LFSR is outlined in Figure 2.1. At
each step in the sequence, the value in each memory element is shifted one element
to the right, and the left-most memory element is calculated as a linear combination
of the values in the memory elements during the previous step.
Collectively, the values stored in all the memory elements is called the state of
6
2.1. LINEAR FEEDBACK SHIFT REGISTER SEQUENCES 7
a
1
C
2
C
k-1 k-2
k
a a a
k-n
n
C
Figure 2.1: Binary Linear Feedback Shift Register
the LFSR. The C
i
s are binary variables that indicate the position of the switches.
A one indicates a closed switch, and a zero indicates an open switch. From the
structure of an LFSR, it can be shown that the generated sequence {a
n
} satises
the recursive equation
a
k
=
n
i=1
c
i
a
ki
(2.1)
with an initial state a
1
, a
2
, . . . , a
n
. The sequence generated by an LFSR will vary
depending on its structure and the initial state. Any sequence {a
n
} = {a
0
, a
1
, a
2
, . . .}
can be described by the generating function G(x), which for an LFSR sequence is
as follows,
G(x) =
i=0
a
i
x
i
=
n
i=1
c
i
x
i
(a
i
x
i
+. . . +a
1
x
1
)
1
n
i=1
c
i
x
i
=
g(x)
f(x)
. (2.2)
The polynomial f(x) = 1
r
i=1
c
i
x
i
is referred to as the characteristic polynomial
of the sequence {a
n
} and of the shift register which produced it. Note that f(x)
is solely a function of the structure of the LFSR and is independent of the initial
state. Furthermore, f(x) is a monic polynomial of degree n, i.e. c
n
= c
0
= 1.
In an LFSR, the next entry in the sequence is only dependent on the current
state. Once any particular state has occurred for the second time, the generated
sequence will be periodic from that point on. Therefore, the maximum period of
an LFSR sequence is 2
n
1, which corresponds to one cycle through each of the
2
n
1 non-zero states. These sequences are commonly known as maximum length
sequences or m-sequences. Golomb showed that the period of an LFSR sequence
with characteristic polynomial f(x) is the smallest integer p such that f(x) divides
1 x
p
(modulo 2 arithmetic) [11]. This integer p is also called the exponent of
f(x). A necessary, but not sucient condition on f(x) to produce an m-sequence
is that f(x) must be irreducible. The number of polynomial of degree n which have
maximum exponent is given by (2
n
1)/n where () is the Euler -function.
2.1.2 Generalized Linear Feedback Shift Registers
In a generalized LFSR, each memory element contains a value in {0, 1, . . . , q1} and
all calculations are performed over the nite eld GF(q). A sequence, a
0
, a
1
, a
2
, . . .,
generated by a generalized LFSR satises the linear recurrence relation
n
i=0
c
i
a
ki
= 0, k = n, n + 1, . . . c
0
= 1, c
n
= 0, (2.3)
where all the elements are taken from a nite eld GF(q). This equation can be
re-arranged to express a
k
in terms of a linear combination of the previous n values
of the sequence {a
k
} as follows,
a
k
= c
1
0
n
i=1
c
i
a
ki
. (2.4)
The basic structure of a generalized LFSR is shown in Figure 2.2. The generating
function for the sequence produced by a generalized LFSR is G(x) = g(x)/f(x).
This is the same as in the binary case, with the exception that f(x) and g(x) have
coecients in GF(q). Similar to the binary case, the period of a generalized LFSR
sequence is given by the smallest integer p such that f(x) divides 1 x
p
(modulo
q arithmetic). The set of all possible sequences generated by an LFSR is called the
solution space of f(x) and is denoted by S(f).
c
a
k
a
k-1
a
k-2
2 1
c
-c
0
-1
a
k-n
c
n
Figure 2.2: Generalized Linear Feedback Shift Register Structure
If a sequence, after the multiplication of each term by an element in GF(q)
results in a shift of the original sequence, then this element is called a multiplier of
the sequence, and the number of positions the original sequence is shifted forward is
called the span of the multiplier. Furthermore, the set of sequences obtained when
a sequence is multiplied by all the non-zero element of GF(q) is called a block.
Dan Laksov, in [12] states the following two theorems
1
about the relation between
multipliers, spans and blocks:
THEOREM 1: The multipliers of the sequences of S(f), where f(x) is irre-
ducible, period p, e = GCD(p, q 1) and = p/e, are exactly the elements of
1
Dan Laksov attained these theorems from the works of Hall and Ward [13, 14, 15].
2.2. CONVOLUTIONAL ENCODERS 10
GF(q) satisfying x
e
= 1, and have the span 0, , 2, . . . , (e 1).
THEOREM 2: If f(x) is irreducible, then there are t unordered sequences (i.e.
sequences which are not shifts of each other) in each block, and there are b blocks,
where t = (q 1)/e and b = (q
n
1)/((q 1)).
Theorem 1 and 2 can be applied to an LFSR with irreducible polynomial f(x)
with coecients in GF(q), which produces a sequence of the maximum period
q
n
1, where q is a prime. The following results are easily veriable:
= q
n
1/(q 1), span = 0, , 2, . . . , (q 2), t = 1, b = 1
Therefore, the solution space S(f) consists of one block containing one un-
ordered sequence. In other words, S(f) contains each of the q
n
1 phases (or
forward shifts) of one unique sequence. Note that the minimum (non-zero) span is
q
n
1/(q 1), which in the binary case is equal to the period 2
n
1, but for larger
q is less than the period of the sequence.
2.2 Convolutional Encoders
Convolutional encoders can be divided into two main categories, the traditional
Non-Recursive Convolutional (NRC) encoder and the Recursive Systematic Convo-
lutional (RSC) encoder. Figure 2.3 shows the structure of both of these encoders.
The central component of the NRC encoder is the shift register, which stores previ-
ous values of the input bit stream. The outputs are formed by linear combinations of
the current and past input values. This particular encoder is non-systematic, which
2.2. CONVOLUTIONAL ENCODERS 11
denotes that the systematic (input) data is not directly sent as an output. However
NRC encoders can be either systematic or non-systematic. The structure of the
NRC encoder in Figure 2.3 can be expressed in terms of the the generator matrix
G = [G
1
(D) G
2
(D)] where G
1
(D) = 1 +D+D
2
+D
3
+D
4
, and G
2
(D) = 1 +D
4
.
The sequence generated by this NRC encoder will be [u(D)G
1
(D) u(D)G
2
(D)],
where u(D) is the D-series representation of the input data.
d
Shift Register
k
k
Input Outputs
k
d
Input
X
k
Y
k
Outputs
2
1
Y
Y
Shift Register
Recursive Systematic Convolutional Encoder
k
Non-Recursive Convolutional Encoder
Figure 2.3: NRC and RSC Encoders
Figure 2.3 also shows the structure of the RSC encoder which are commonly
used in Turbo Codes. The RSC encoder contains a systematic output, and more
importantly, a feedback loop. The generator matrix for the RSC encoder is G =
[1 A(D)/B(D)] where A(D) = 1 +D
4
and B(D) = 1 +D +D
2
+D
3
+D
4
. A(D)
and B(D) are commonly known as the feed-forward and feedback polynomials (or
generators) respectively.
The feedback structure of the RSC encoder is encapsulated in the feedback poly-
nomial B(D), which is the same as the characteristic polynomial f(x) described
in section 2.1. Therefore, if B(D) has maximum exponent 2
n
1, then the pe-
riod of the output sequence of the RSC encoder will be 2
n
1 where n is the
degree of B(D). The output sequence generated by this RSC encoder is given by
2.3. TURBO CODE ENCODER 12
[u(D) u(D)A(D)/B(D)]. Therefore, an RSC encoder with input sequence u(D)
will produce an innite weight output sequence, with the exception of the the se-
quences u(D) which are a multiple of the feedback polynomial B(D). Note that
this only includes a fraction 2
n
of all the possible input sequences. Furthermore,
the degree of u(D) must be at least that of B(D) [16].
2.3 Turbo Code Encoder
The traditional Turbo Code encoder is built by concatenating two RSC encoders
with an interleaver in between. Usually the systematic output of the second RSC
encoder is omitted to increase the code rate. Figure 2.4 shows the Turbo Code
encoder used in [1, 3]. Due to the interleaver between the RSC encoders and the
nature of the decoding operation, the Turbo Code encoder must operate on the
input data stream in N-bit blocks. (Therefore, Turbo Codes are indeed linear
block codes.) Although the interleaver appears to play only a minor role in the
encoder, in actuality the interleaver is a very important component.
An estimate of the BER performance of a Turbo Code can be made if the code-
word weights or code geometry is known. Intuitively, we would like to avoid pairing
low-weight codewords from the upper RSC encoder with low-weight words from
{Y
2
k
}. Many of these undesirable low-weight pairings can be avoided by properly
designing the interleaver. Since the RSC encoders have innite impulse response,
the input sequence consisting of a single one will produce a high-weight codeword.
However, two suitably placed 1s in the input sequence can drive the RSC encoder
out of the zero state and back again within a very short span. If the interleaver
2.4. UPPER BOUND ON BER PERFORMANCE 13
k
d
N-bit
Y
2
Y
1
X
k
Input Turbo Code Encoder Outputs
Shift Register
Shift Register
k
k
Interleaver
RC Encoder
RC Encoder
(N-bit block)
Figure 2.4: Rate 1/3 Turbo Code Encoder
maps these sequences to similar sequences, the over-all codeword weight will be
low.
For moderate SNR values, the weight distribution of the rst several low-weight
codewords is required. For small interleaver sizes (N), the complete weight distri-
bution can be determined by an exhaustive search using a computer. Calculating
(or even estimating) the weight distribution for large N is a very dicult problem.
Once the weight distribution is known, an estimate of the bit error rate can be
made by using using the union bound [3].
2.4 Upper Bound on BER Performance
An upper bound on the BER performance of an (n, k) systematic block code is
given by the union bound,
P
b

k
w=1
n
d=d
min
a(w, d)
w
n
1
2
erfc
_
_
d
k
n
E
b
N
0
_
_
, (2.5)
where, E
b
/N
0
is the signal-to-noise ratio, w is the Hamming weight of the input
block, d is the Hamming weight of the codeword, and a(w, d), which is known as the
weight enumeration function, is the number of such codewords. For simple block
codes, a(w, d) can be obtained by an exhaustive search. However, for long block
lengths, obtaining a(w, d) can be very dicult.
Benedetto and Montorsi present a method for obtaining the weight enumeration
function of a Turbo Code in [17]. We present an alternative method for obtaining
the weight enumeration function of the constituent RSC codes.
In the trellis diagram of an RSC code, each path in the trellis represents a
transition from a previous state m
, to a current state m with an input bit X

k
and
a parity bit Y
k
. We dene the single stage trellis transition matrix as follows:
T
m
,m
(W, Z) = [a
m
,m
(w, j)W
w
Z
j
], (2.6)
where w is the Hamming weight of the input bit X
k
, j is the Hamming weight of
the parity bit Y
k
, and a
m
,m
(w, j) is the number of transitions in the trellis from
state m
to state m with input weight w and parity bit weight j. Note that the
Hamming weight of the complete codeword is w +j.
The weight distribution function for N stages of the trellis (corresponding to
an N bit block) is obtained by calculating T
N+M
m
,m
(W, Z), where M is the number
of memory elements (assuming that M tail bits are added to terminate the trellis).
Each entry in T
N+M
m
,m
(W, Z) gives the input redundant weight enumeration func-
tion [17] for all trellis paths that start at state m
and end at state m after N +M

transitions. The entry which is of most interest is T
N+M
0,0
(W, Z), which is the input
redundant weight enumeration function of all the paths that start and end at the
all-zero state.
Since the upper bound on the BER performance is dominated by the lower
weight codewords, the calculation of T
N+M
m
,m
(W, Z) can be simplied by only enumer-
ating codewords with input and parity Hamming weights below certain thresholds.
With T
N+M
m
,m
(W, Z) obtained, the remaining calculation is the same as presented
in [17].
For parallel concatenated block codes, such as Turbo Codes, two linear system-
atic codes C
1
and C
2
are linked by an interleaver. In order to obtain the weight
enumeration function of such a parallel code, the calculation must take into account
each constituent code and the interleaver structure. Since this calculation becomes
impractical to perform for even small block lengths, Benedetto and Montorsi in-
troduced an abstract interleaver which they called a uniform interleaver [17]. A
uniform interleaver of length k is a probabilistic device which maps a given input
word of weight w into all the distinct
_
k
w
_
permutations with equal probability
1/
_
k
w
_
.
The denition of a random interleaver results in a weight enumeration function
for the second code which is independent of the rst code. Therefore, the weight
enumeration function for the parallel code can be calculated as follows:
A
Cp
w
(Z) = A
C
1
w
A
C
2
w
/
_
k
w
_
, (2.7)
where A
C
1
w
, A
C
2
w
are the weight enumeration functions of the constituent codes. In
the previous equation, T
k
0,0
(W, Z) can be converted into weight enumeration func-
tions and used for A
C
1
w
and A
C
2
w
. Finally, the upper bound on the BER performance
is given by calculating equation 2.5 using A
Cp
w
(Z).
The upper bound on the BER performance of Turbo Codes are shown in Fig-
ure 2.5 and Figure 2.6 for various block lengths (N) and memory sizes (M). Speci-
cally, the bounds for M = 3, G = (15, 13) and M = 4, G = (37, 21) and G = (23, 35)
RSC encoders are shown.
N=96,M=3
N=96,M=4
N=192,M=3
N=192,M=4
N=288,M=3
N=288,M=4
N=512,M=3
N=512,M=4
1 0.5 0 0.5 1 1.5 2 2.5 3 3.5 4
10
6
10
5
10
4
10
3
10
2
10
1
10
0
SignaltoNoise Ratio (dB)
B
i
t

E
r
r
o
r

R
a
t
e
Figure 2.5: Upper Bounds on BER Performance of Turbo Codes for M = 3, G =
(15, 13) and M = 4, G = (23, 35).
The curves in Figure 2.5 and Figure 2.6 have two major segments with greatly
dierent slopes. The shallow sloping portion of the curves, for bit error rates below
10
5
, are dominated by a few very low weight codewords. For bit error rates greater
than 10
5
, the curves show the impact of the rst several low-weight codewords.
Figure 2.5 show the upper bounds on the BER performance of Turbo Codes with
M = 3 and M = 4 memory element RSC encoders. As the block length increases,
the dierence between these two codes also increase. For example, a BER of 10
4
can be obtained for M = 3, N = 288 or M = 4, N = 192. Therefore, there is a
trade-o between block size (and thus interleaver delay) and memory size (which
corresponds to decoder complexity).
N=96,G1
N=96,G2
N=192,G1
N=192,G2
N=288,G1
N=288,G2
N=512,G1
N=512,G2
1 0.5 0 0.5 1 1.5 2 2.5 3 3.5 4
10
6
10
5
10
4
10
3
10
2
10
1
10
0
B
i
t

E
r
r
o
r

R
a
t
e
Figure 2.6: Upper Bounds on BER Performance of Turbo Codes for M = 4, G1 =
(37, 21) and G2 = (23, 35).
Figure 2.6 show the upper bounds on the BER performance of two Turbo Codes
with dierent generators. The rst generator was used in [1]. Since the feedback
polynomial (37)
8
does not produce a maximum length sequence, the upper bound
for both the steep and shallow portions of the curves are inferior to the second
generator with feedback polynomial (23)
8
which does produce a maximum length
sequence. This same conclusion was also reached by Benedetto and Montorsi in [17].
2.5. INTERLEAVER DESIGN 18
2.5 Interleaver Design
The role of the interleaver in a Turbo Code is to modify the pattern of low-weight
input sequences which result in a low-weight output after passing through the rst
Recursive Convolutional (RC) code so that the output weight of the second RC
code is high. The major focus of interleaver design has been on breaking weight
two input sequences which drives the RC encoder out of the zero state and back
into the zero state within a short span resulting in low-weight outputs. For weight
two input sequences which cannot be broken, it is desirable that the span of such
sequences are large in at least one of the RC codes. Furthermore, the interleaver
needs to permute positions near the right end of the block to positions far away
from the right edge so as to minimize edge eects.
Consider an RC encoder with transfer function G(D) = A(D)/B(D). From
the results of section 2.1, we know that if B(D) has maximum exponent, that
G(D) is a periodic sequence with period p = 2
n
1, where n is the degree of
B(D). Furthermore, we know that the solution set of G(D) consists of all the
2
n
1 phases (or right shifts) of one unique solution, known as an m-sequence. The
phases of this m-sequences correspond to the (impulse) response of G(D) when the
input sequence, u(D), consists of a single one at position i. Therefore, we label
the phases of these sequences by the integers i = 1, 2, . . . , p. It can be shown that
the set of phases of an m-sequence (plus the all-zero sequence) constitute a group
under binary addition [11]. The order of each element in this group is equal to
two, meaning that the sum of each phase with itself results in the all-zero sequence
(denoted as the zero phase).
2.5. INTERLEAVER DESIGN 19
We refer to time positions within the input data block which are congruent to
i modulo p as C
i
. C
i
= {t
i
: t
i
[i, N], t
i
= i mod(p)}. If the system is already in
phase a, then an impulse at position t C
i
will result in phase b = a i at the
output of the corresponding RC encoder, where denotes the group addition of
the phases. Note that an impulse at position t C
a
will result in the zero phase.
In the process of interleaving, if two elements within a given C
i
, i = 1, . . . , p,
are mapped into two positions within a given C
j
, then these positions constitute a
weight two, zero-phase sequence which remains zero-phase after interleaving. The
interleaver can force the elements of a given C
i
, i = 1, . . . , p, to be mapped into
dierent C
j
s if and only if the number of positions in each C
i
is less than p. This
in turn means that the block length N should satisfy N < p
2
. In practice, N p
2
and the interleaver will not be able to break all the weight two input sequences.
The fraction of the unbroken weight two sequences within a given C
i
is at least 1/p.
The interleaver should be designed such that the span of such unbroken sequences
is maximized.
A. Khandani presented an interleaver which is optimal in breaking weight two
input sequences and maximizing the span of the unbroken weight two sequences
in [18]. This interleaver is obtained by partitioning the input block into sub-blocks
of length p and applying a cyclic shift of i positions, i = 0, 1 . . ., to the elements
of the i-th sub-block. The eective number of cyclic shifts applied to the i-th sub-
block is equal to: i(mod p). The BER performance of a Turbo Code with this
interleaver performed poorly. Therefore, the BER performance of a Turbo Code is
not determined solely by the weight two input sequences.
2.6. TRELLIS TERMINATION 20
Also in [18], an alternative interleaver is designed by dening distance functions
for each phase and develops a linear objective function which is solved using the
Hungarian method [19]. These interleavers result in BER performance superior to
that of a random interleaver.
A good review of other non-random and semi-random interleavers was per-
formed by S. Dolinar and D. Divsalar in [20]. Specically, the authors considered a
non-random interleaver that ensures that the minimum distance due to weight two
input sequences grows roughly as
2N, where N is the block length. They also in-

troduce a semi-random interleaver, which they called S-random. This interleaver
is designed by randomly selecting integers i, 1 i N without replacement. Each
selection is compared with the previous S selections. If the current selection is
within a distance S to the previous S selections, then it is rejected. This process
has the eect of permuting all positions within a distance of S in the original block,
to a distance greater than S in the interleaved block. Although this process is not
guaranteed to complete successfully, Dolinar and Divsalar observed that setting
S <
_
N/2 usually produces a solution within a reasonable time.
Many other articles about interleaver design were recently presented at the IEEE
International Symposium on Turbo Codes and Related Topics in Brest France,
September 1997 [21, 22, 23].
2.6 Trellis Termination
In order to decode a linear block code using the trellis representation, it is desirable
that the decoder knows both the starting state and nishing state. This gives rise
2.6. TRELLIS TERMINATION 21
to the need to terminate the trellis of an RSC code. Due to the recursive structure
of the RSC encoder, it is not sucient to merely set the last M information bits
to zero (where M is the number of memory elements in the encoder) to drive the
encoder to the all-zero state. The most commonly used trellis termination was rst
presented by Divsalar and Pollara in [4]. Their RSC encoder, shown in Figure 2.7,
includes a switch with two positions A and B. The switch is in position A for
the rst N clock cycles, and in position B for an additional M cycles to drive
the encoder to the all-zero state. This method is equivalent to setting the last M
information bits equal to the value of the feedback path so that the addition of the
feedback and the input is 0 (mod 2).
Shift Register
d
k
Y
k
X
k
Input Outputs
A
B
Figure 2.7: RSC Encoder with Trellis Termination
In the Turbo Code encoder, usually one trellis is terminated in this manner and
the other trellis is left unterminated. This results in a (n(N + M), N) block code,
where the rate of the code (excluding termination) is 1/n. For large block sizes, the
eect of trellis termination on the BER performance and the code rate is negligible.
However, for small block sizes, trellis termination becomes much more important.
2.7. TURBO CODE DECODER 22
2.7 Turbo Code Decoder
The Turbo Code decoder is constructed using RSC decoders to iteratively improve
the Logarithm of the Likelihood Ratio (LLR) value for each input bit. Claude
Berrou et. al proposed a modied version of the BCJR algorithm
2
for the RSC
decoders in [1]. The BCJR algorithm calculates the a posteriori probabilities (APP)
of the states and transitions of a Markov source observed though a discrete mem-
oryless channel. Claude Berrou et. al modied this algorithm to account for the
recursive nature of RSC encoders. Both Patrick Robertson [3] and Peter Jung [25]
have introduced further modications which reduce the complexity and memory
storage of the algorithm. Benedetto et. al have introduced an alternative Soft-
Input Soft-Output (SISO) maximum a posteriori module to decoded parallel and
serial concatenated codes in [26]. A sub-optimal decoding algorithm, known as the
Soft-Output Viterbi Algorithm (SOVA) can also be used. This algorithm augments
the hard-decision outputs of the Viterbi algorithm with soft-output reliability in-
formation [27].
A detailed derivation of the modied BCJR algorithm can be found in [1], and
will not be repeated here. However, this section will review the basic notation of the
modied BCJR algorithm including the changes proposed by P. Robertson in [3].
The RSC encoder processes the input sequence {d
1
, d
2
, . . . , d
N
} (where d
k

{0, 1}) and produces two parallel data streams, {X
k
}, {Y
k
}, each of length N. The
received data streams are denoted by R
N
1
= (R
1
, R
2
, . . . R
N
), where R
k
= (x
k
, y
k
).
2
The BCJR algorithm is also known as the Bahl et. al algorithm. BCJR refers to each of the
authors in [24].
Each R
k
represents a 2-tuple of real-valued numbers corresponding to the outputs
of the receiver correlators.
The RSC decoder generates an LLR value for each input bit. These LLR values
are given by the expression
(d
k
) = log
_
Pr{d
k
= 1|R
N
1
}
Pr{d
k
= 0|R
N
1
}
_
, (2.8)
where Pr{d
k
= i|R
N
1
} is the APP of the input bit d
k
. The LLR values are generated
by forward and backward recursions which can heuristically be associated with
tracing the most likely path through the trellis in each direction. These recursions
are given by the following equations:
k
(m) =
1
i=0
i
(R
k
, m
, m)
k1
(m
1
i=0
i
(R
k
, m
, m)
k1
(m
)
(2.9)
k
(m) =
1
i=0
i
(R
k+1
, m, m
)
k+1
(m
1
i=0
i
(R
k+1
, m
, m)
k
(m
)
(2.10)
In the above equations,
i
(R
k
, m
, m) = Pr{R
k
, S
k
= m, d
k
= i|S
k1
= m
} encap-
sulates the trellis structure, the APP values of d
k
and the channel statistics. The
LLR values as a function of , and are given by the expression
(d
k
) = log
_
m

1
(R
k
, m
, m)
k1
(m
)
k
(m)
m

0
(R
k
, m
, m)
k1
(m
)
k
(m)
_
. (2.11)
The Turbo Code decoder proposed by P. Robertson in [3] is shown in Figure 2.8.
Each RSC decoder implements the modied BCJR algorithm previously discussed.
For an Additive White Gaussian Noise (AWGN) channel, the LLR values generated
x
1
k
y
k
2
y
k
Input
Decoder
RSC
L
k
1
k
x
Interleaver
Interleaver
n
x
n
L
1
Decoder
L
k
2
n
De-interleaver
k
Threshold
d
k
^
Output
L
n
2
Turbo Code Decoder
De-interleaver
RSC
Figure 2.8: Patrick Robertsons Turbo Code Decoder
by the rst RSC decoder can be expressed as a function of (three) independent
terms, which Berrou et. al called intrinsic and extrinsic information [1]:
1
(d
k
) = L
1
k
+L
2
k
+
2
2
n
x
k
. (2.12)
Intrinsic information is the component of the LLR provided by the systematic
data stream{x
k
}, while extrinsic information is the component of the LLR provided
by the encoded data stream {y
k
}. Therefore, in the previous equation, the last term
corresponds to the intrinsic information, where
2
n
is the variance of the noise. The
remaining two terms, L
1
k
, L
2
k
represent the extrinsic information generated by each
of the RSC encoders. The L
1
k
term represents the extrinsic information generated by
the rst RSC decoder during the current iteration, while L
2
k
represents the extrinsic
information generated by the second RSC decoder during the previous iteration.
In order to prevent the passing of information to the second RSC decoder that was
previously provided by that same RSC decoder, only the L
1
k
values are passed to
the second RSC decoder. The extrinsic component of the LLR values generated
by each RSC decoder are passed between RSC decoders in an iterative manner to
2.8. TURBO CODE BER PERFORMANCE 25
improve the LLR values.
The nal hard-decision is made by threshold decoding. The sign of the LLR
value indicates the bit (0 or 1) and the magnitude of the LLR value indicates the
reliability of the decision.
2.8 Turbo Code BER Performance
Figure 2.9 shows the BER performance of the Turbo Code encoder shown in Fig-
ure 2.4 over an AWGN channel at dierent iterations. For short block lengths
(N = 192), the majority of the improvement in BER performance is obtained af-
ter the rst 5 or so iterations. For large block lengths (N = 10000), the greatest
improvement in BER performance occurs during iterations 5 15, after which the
incremental improvement is quite small.
i=1
i=2
i=3
i=4
i=5
i=10
i=20
0.4 0.6 0.8 1 1.2 1.4 1.6
10
5
10
4
10
3
10
2
10
1
10
0
Turbo Code BER Performance at Different Iterations (N=192)
B
i
t

E
r
r
o
r

R
a
t
e
i=1
i=3
i=5
i=7
i=10
i=15
i=20
0.05 0 0.05 0.1 0.15
10
5
10
4
10
3
10
2
10
1
10
0
Turbo Code BER Performance at Different Iterations (N=10000)
B
i
t

E
r
r
o
r

R
a
t
e
Figure 2.9: BER Performance of Turbo Codes at Dierent Iterations
Three of the major parameters in Turbo Code design that aect the BER per-
2.8. TURBO CODE BER PERFORMANCE 26
formance are the number of memory elements (M), the block length (N) and the
interleaver. Figure 2.10 shows the BER performance of a rate 1/3 Turbo Code
(N = 192) with various numbers of memory elements. As expected, the BER per-
formance improves with an increase in M. However, this improvement comes at
the cost of increased decoder complexity. Figure 2.10 also shows the relationship
between SNR and block length (N) for the BERs of 10
3
, 10
4
and 10
5
. Notice
that for small block lengths (N 100) the required SNR to obtain the three bit
error rates is quite large. At large block lengths (N > 10000) the required SNR is
considerably lower, but further increasing the block length only resulted in a slight
reduction in the required SNR. Although large block lengths improve the BER per-
formance, they also introduce long delays which cannot be tolerated in real-time
systems with stringent delay specications.
3
M=1
M=2
M=3
M=4
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
10
5
10
4
10
3
10
2
10
1
Turbo Code BER Performance for Various M (N=192)
B
i
t

E
r
r
o
r

R
a
t
e
BER = 0.001
BER = 0.0001
BER = 0.00001
10
2
10
3
10
4
10
5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Required SignaltoNoise Ratio vs. Block Size (M=4, G=37,21, R=1/2)
Block Size (N)
S
i
g
n
a
l
t
o
N
o
i
s
e

R
a
t
i
o

(
d
B
)
Figure 2.10: BER Performance of Turbo Codes
3
The BER performance for various M was simulated by the author. The required SNR vs. N
was taken from [3].
Chapter 3
Symbol-Based Turbo Codes
Symbol-Based Turbo Codes are our new method for combining Turbo Codes with
dierent modulation techniques [28]. The motivation for this combination is to take
advantage of inherent trade-os between BER performance, code rate, spectral ef-
ciency, and decoder complexity. The main focus of our study has been to produce
moderate and low-rate (1/3 - 1/32) codes with good BER performance without
dramatically increasing the complexity of the decoder. These codes are well suited
for spread spectrum communication systems where the lower rates can be easily
accommodated in the large spreading gains. A secondary goal has been to produce
spectrally ecient codes which do not suer the same BER performance degra-
dation of traditional Turbo Codes when punctured to increase their code rates.
Unlike the other methods reviewed in Chapter 1 which use the outputs from all the
parallel data streams of the Turbo Code encoder to select a point in a signal space,
Symbol-Based Turbo Codes modulate each parallel data stream independently. In
this chapter, the generalized structure of the Symbol-Based Turbo Code encoder
27
3.1. SYMBOL-BASED TURBO CODE ENCODER 28
and decoder are presented.
3.1 Symbol-Based Turbo Code Encoder
The Symbol-Based Turbo Code encoder combines the traditional Turbo code en-
coder with various modulation schemes by parsing the parallel data streams into
n-bit sub-blocks or symbols. These symbols are then mapped to a 2
n
point signal
set. In order to maintain the correspondence between n-bit encoder output sym-
bols and n-bit input symbols, the interleaver must be restricted to operate on a
symbol-by-symbol basis. Such an interleaver permutes the input data block in n-bit
symbols, but does not change the order of the bits within each symbol. With this
restriction in place, the encoder eectively operates over n-bit symbols instead of
binary symbols, thus the name: Symbol-Based Turbo Codes.
The structure of the Symbol-Based Turbo Code encoder is shown in Figure 3.1.
The input block is parsed into n-bit input symbols, d
k
, and is encoded using a
traditional Turbo Code encoder with a restricted interleaver. Each parallel data
stream then maps the n-bit encoded symbols to a 2
n
point signal set. The over-all
code rate is n/3j where n is the symbol size and j is the dimensionality of the signal
set. This method can easily be adapted to Turbo Codes which concatenate more
than two RSC encoders. Furthermore, each parallel data stream can me modulated
with a dierent modulation scheme. Therefore, there is a great deal of exibility
in designing codes with very high rates as well as very low rates.
By parsing the input data block into n-bit symbols, we are in essence merging
(or compressing) n sections of the encoder trellis into one. Figure 3.2 shows two
Shift Register
Shift Register
Interleaver
RC Encoder
RC Encoder
2
Signal Set
Signal Set
Signal Set
2
2
n
n
n
Y
k
Y
k
2
Restricted
X
k
n
n
n
-Point
-Point
-Point
(n-bit symbols)
n
d
k
k
k
k
x
y
1
y
1
2
j
j
j
Modulation To Channel Turbo-Code Encoder Input Outputs
Figure 3.1: Symbol-Based Turbo Code Encoder/Modulator
stages of the RSC trellis with generator (13, 11)
8
. The solid lines and dotted lines
correspond to the input bit of 0 and 1 respectively. Figure 3.2 also shows the trellis
diagram when two stages of the original trellis are merged together.
000
001
010
011
100
101
110
111
Stage 1 Stage 2 State
Previous
000
001
010
011
100
101
110
111
State
Next
Two Stages of Basic Trellis
000
001
010
011
100
101
110
111
State
000
001
010
011
100
101
110
111
State
Next Previous
Two Stage Merged Trellis
Figure 3.2: Two Stage Basic and Merged Trellis Diagrams
Similarly, Figure 3.3 shows three stages of the basic RSC trellis and the three
stage merged trellis. In general, there are 2
n
branches leaving each state of an
n-stage merged trellis diagram, which correspond to the 2
n
possible n-bit binary
values.
111
110
101
100
011
010
001
000
State
001
010
011
100
101
110
111
000
State
Previous Next
000
001
010
011
100
101
110
111
Stage 1 Stage 2 Stage 3 State
Previous
000
001
010
011
100
101
110
111
Next
State
Three Stage Merged Trellis Three Stages of Basic Trellis
Figure 3.3: Three Stage Basic and Merged Trellis Diagrams
Note that when the number of branches leaving each state is greater than the
number of states in the merged trellis, parallel transitions occur. These parallel
transitions correspond to short error events which cannot be broken by a symbol-
by-symbol interleaver, and consequently, severely degrade the performance of the
code. Therefore, the symbol size is limited to n M where M is the number of
memory elements in the RSC encoder.
The structure of the Symbol-Based Turbo Code encoder allows for modula-
tion using any arbitrary signal set with 2
n
points and J dimensions. We denote
the j-th dimension of the signal point associated with the i-th symbol by m
i,j
for
i = 0, 1, . . . , 2
n
1 (the decimal value of each of the possible n-bit symbols), and
j = 1, 2, . . . , J. The J-dimensional modulation vector corresponding to a partic-
ular n-bit symbol is denoted by m
i
= (m
i,1
, m
i,2
, . . . , m
i,J
). Table 3.1 shows the
modulation vectors for a few common modulation schemes.
3.2. SYMBOL-BASED TURBO CODE DECODER 31
Table 3.1: Various Modulation Vectors for n-bit Symbols
Modulation Scheme Dimensions Modulation Vectors
BPSK n m
i
= (
E
b
,
E
b
, . . .)
Orthogonal 2
n
m
0
= (
E
s
, 0, 0, . . . , 0),
m
1
= (0,
E
s
, 0, . . . , 0), . . .
Bi-orthogonal 2
n1
m
i
= (
E
s
, 0, 0, . . . , 0),
(0,
E
s
, 0, . . . , 0), . . .
M-PSK 2 m
i
= (
E
s
cos
i
,
E
s
sin
i
)
i
= 2i/2
n
ASK 1 m
i
= d, 3d, 5d, . . .
Orthogonal and bi-orthogonal modulation schemes can also be imple-
mented using Hadamard matrices and BPSK modulation.
For larger symbol sizes,
i
is grey coded to improve BER performance.
3.2 Symbol-Based Turbo Code Decoder
The Symbol-Based Turbo Code decoder structure is very similar to the traditional
Turbo Code decoder shown in Figure 2.8. However, the constituent RSC decoders
described in section 2.7 operate on a single stage binary RSC trellis. In the Symbol-
Based Turbo Code decoder, the constituent RSC decoders are modied to operate
on n-bit symbols using the n-stage merged trellis diagram. We introduced the
following changes to the modied BCJR algorithm to accomplish this.
Firstly, the LLR values are dened dierently to account for the 2
n
possible
symbol values (instead of just two values, 0 and 1). The new LLR values are
dened as follows:
(d
k
= i) = log
_
_
Pr{d
k
= i|
R}
Pr{d
k
= 0|
R}
_
_
, i = 0, 1, . . . , 2
n
1 (3.1)
where

R denotes the received data streams. This denition for the LLR values
allows for the easy conversion between symbol LLR values and symbol APP values.
For an Additive White Gaussian Noise (AWGN) channel, the branch metrics
are given by [3]:
Pr{x
k
|d
k
, S
k
, S
k1
} = e
1
N
0
(x
k
b
s
(d
k
,S
k1
,S
k
))
2
(3.2)
Pr{y
k
|d
k
, S
k
, S
k1
} = e
1
N
0
(y
k
b
p
(d
k
,S
k1
,S
k
))
2
(3.3)
where b
s|p
(d
k
, S
k1
, S
k
) is the modulator output associated with the branch from
state S
k1
to state S
k
at step k if the corresponding input d
k
is equal to i. The
b
s|p
() values correspond to the m
i,j
values discussed earlier. These equations can
be generalized for any signal set by calculating them for each dimension and mul-
tiplying the resulting terms together. This calculation is based on the assumption
that each dimension of the modulation vector m
i
is independent of all the others,
and experience independent AWGN.
Thirdly, the expression for the intrinsic information [1, 3] is also modied to take
into account the modulation scheme used. A general expression for the intrinsic
information is as follows:
log
_
Pr{x
k
|d
k
= i}
Pr{x
k
|d
k
= 0}
_
=
1
N
0
J
j=1
[2x
k,j
(m
i,j
m
0,j
) + (m
2
0,j
m
2
i,j
)], (3.4)
where x
k,j
is the j-th component of the k-th received systematic symbol. Depend-
ing on the modulation scheme used, the above expression may be simplied even
further.
Lastly, the nal hard-decision decoding is performed by selecting the largest
LLR value and mapping the index of that LLR value back to an n-bit symbol.
For RSC encoders, whose trellis representation does not have any parallel tran-
sitions, the modied BCJR algorithm can be simplied. This is a practical case to
consider, because, as noted in section 3.1, parallel transitions in the merged trellis
diagram severely degrade the performance of the code. In the modied BCJR al-
gorithm, summations are performed over previous states m
and current states m.

For a trellis diagram with no parallel transitions a previous state m
and current
state m indicate a unique transition. Since a previous state m
and an input i
also uniquely dene a current state m and an output Y in any trellis diagram, the
branch metrics in equations 3.2, 3.3 can be re-dened in terms of the indices m
and i as follows:
Pr{x
k
|S
k1
= m
, d
k
= i} =
J
j=1
exp
_
(x
k,j
m
i,j
)
2
N
0
_
(3.5)
Pr{y
k
|S
k1
= m
, d
k
= i} =
J
j=1
exp
_
(y
k,j
m
Y,j
)
2
N
0
_
(3.6)
Furthermore, the forward and backward recursions are also changed so that
all the summations are performed over the indices m
and i. This simplication

reduces the complexity of the modied BCJR algorithm because all the summations
are performed only over trellis branches which actually exist.
A further simplication can be made to the modied BCJR algorithm by ex-
amining the values. The can be expressed as follows by using Bayes rule and
3.3. ORTHOGONAL MODULATION 34
the simplication previously discussed:
i
(R
k
, m
) = Pr{x
k
|S
k1
= m
, d
k
= i}Pr{y
k
|S
k1
= m
, d
k
= i}Pr{d
k
= i}.
(3.7)
The rst two terms are the branch metrics for the systematic and parity data
streams and are given by equations 3.5, 3.6. The third term is the APP of the
input symbol d
k
. Since the rst two terms do not change between iterations, they
can be calculated once and merely multiplied by the most current APP values
Pr{d
k
= i}.
3.3 Orthogonal Modulation
Symbol-Based Turbo Codes with orthogonal modulation use a 2
n
point orthogonal
signal set to transmit the parallel data streams. As outlined in Table 3.1, the
modulation vectors are m
i
= {0, . . . , 0,
E
s
, 0, . . . , 0}, where E
s
is the transmitted
energy per n-bit symbol. Clearly E
s
= nE
b
, where E
b
is the equivalent energy per
bit. The modulation vectors m
i
are zero in every position except the i-th position,
into which all the symbol energy is placed. Equivalently, the rows of a Hadamard
matrix H
2
n can also be used for the modulation vectors.
The generalized expression for the intrinsic information as given in equation 3.4
can be simplied as follows:
log
_
Pr{x
k
|d
k
= i}
Pr{x
k
|d
k
= 0}
_
=
2
E
s
N
0
(x
k,i
x
k,0
) (3.8)
3.4. M-ARY PSK MODULATION 35
The rates of these codes are n/3(2
n
) where n is the symbol size. Therefore, the
code rates 1/6, 1/6, 1/8, 1/12, 1/19.2, 1/32 are attainable for n = 1, 2, . . . , 6. These
codes are well suited to spread spectrum communication systems where the low
code rates can be accommodated in the large spreading factor. For n = 6, the
resulting code has the same spectral eciency as the IS-95 up-link code (composed
of a rate 1/3 convolutional code and 2
6
-ary orthogonal signaling.) A comparison
of the BER performance of these codes and a convolutional code with orthogonal
signaling with the same structure as the IS-95 up-link code is shown in Chapter 5.
The Symbol-Based Turbo Codes cannot be directly compared with the IS-95 Up-
link because the IS-95 Up-link consists of non-coherent reception while our study
has focused on coherent reception.
3.4 M-ary PSK Modulation
The second Symbol-Based Turbo Code we studied uses M-ary PSK modulation.
The modulation vectors are given by m
i
= (
E
s
cos
i
,
E
s
sin
i
), where
i
=
2i/2
n
. For larger symbol sizes, the
i
s are grey coded to improve BER perfor-
mance.
log
_
Pr{x
k
|d
k
= i}
Pr{x
k
|d
k
= 0}
_
=
2
E
s
N
0
(x
I
(1 cos
i
) x
Q
sin
i
) (3.9)
where x
I
, x
Q
are the in-phase and quadrature components of the k-th systematic
3.5. BI-ORTHOGONAL MODULATION 36
modulation vector.
The rates of these codes are n/6 where n is the symbol size. Therefore, the code
rates 1/6, 1/3, 1/2, 2/3, 5/6 are attainable for n = 1, 2, . . . , 6. The BER performance
of these codes are compared with convolutional codes with a constraint length
K = 9 of similar code rates in Chapter 5.
3.5 Bi-orthogonal Modulation
The third Symbol-Based Turbo Code we studied uses bi-orthogonal modulation.
The modulation vectors are given by m
i
= (0, . . . , 0,
E
s
, 0, . . . , 0). Equivalently,
the rows of a Hadamard matrix H
2
n1 (or the complement of a row) can also be used
for the modulation vectors. Table 3.2 shows the mapping between n-bit symbols
and bi-orthogonal vectors.
Table 3.2: Mapping Between n-bit Symbols and Bi-orthogonal Vectors
Symbol Value Modulation Vectors
Decimal Binary n = 1 n = 2 n = 3
0 000 (
E
s
) (
E
s
, 0) (
E
s
, 0, 0, 0)
1 001 (+
E
s
) (0,
E
s
) (0,
E
s
, 0, 0)
2 010 (0, +
E
s
) (0, 0,
E
s
, 0)
3 011 (+
E
s
, 0) (0, 0, 0,
E
s
)
4 100 (0, 0, 0, +
E
s
)
5 101 (0, 0, +
E
s
, 0)
6 110 (0, +
E
s
, 0, 0)
7 111 (+
E
s
, 0, 0, 0)
If we express the n-bit symbols in terms of the binary digits b
1
b
2
. . . b
n
, then
the sign of the non-zero component of the bi-orthogonal vector is given by b
1
. A
3.6. BPSK MODULATION 37
one corresponds to a positive sign and a zero to a negative sign. Furthermore,
the position in which the symbol energy, E
s
, is placed, is given by the expression
b
2
b
3
. . . b
n
if b
1
= 0, and

b
1
b
2
. . .
b
n
if b
1
= 1, where

b
i
denotes the binary complement
of bit b
i
. This mapping results in the distance properties, d
2
i,j
= 2E
s
if i =

j
and d
2
i,
i
= 4E
s
. This mapping maximizes the BER performance of the code by
separating symbols whose binary representations are complements of one another
by the largest distance.
The expression for the intrinsic information for this modulation scheme is deter-
mined by equation 3.4 and Table 3.2. There is no simplication of this expression
because of the mapping required to maximize the BER performance.
n1
) where n is the symbol size. Therefore
the code rates 1/3, 1/3, 1/4, 1/6, 1/9.6, 1/16 are attainable for n = 1, 2, . . . , 6.
3.6 BPSK Modulation
The forth Symbol-Based Turbo Code we studied uses n-dimensional BPSK modu-
lation. The modulation vectors are given by m
i
= (
E
b
,
E
b
, . . . ,
E
b
). The
encoding and modulating of this code is identical to the traditional Turbo Code
except for the restriction placed on the interleaver as discussed in section 3.1.
log
_
Pr{x
k
|d
k
= i}
Pr{x
k
|d
k
= 0}
_
=
4
E
b
N
0
n
i=1
x
i
b
i
(3.10)
3.6. BPSK MODULATION 38
where the b
i
s are the binary digits of the k-th input symbol.
The rates of these codes are the same for any block size. We can change the rate
of the code by adding an additional feed-forward generator and then puncturing
the resulting encoded bit streams. Figure 3.4 shows an RSC encoder with feedback
polynomial 1+D+D
3
, and feed-forward polynomials 1+D+D
2
+D
3
and 1+D
2
+D
3
.
k
d
Input Outputs
X
k
Y
k
a
Y
b
k
Figure 3.4: Recursive Systematic Convolutional Encoder With Dual Feed-Forward
Outputs
This RSC encoder can be used to obtain a Turbo Code with code rates of
1/5, 1/4, 1/3, 1/2 by puncturing the parallel data streams. In Table 3.3, the punc-
turing patterns for the various code rates are shown. A one denotes a transmitted
bit, and zero a non-transmitted (or punctured) bit. The puncturing patterns shown
in Table 3.3 are used regardless of the symbol size. Other uniform or non-uniform
puncturing patterns can also be used.
3.7. PARITY BITS 39
Table 3.3: Puncturing Patterns for Various Rate Turbo Codes
Code Bit Stream
Rate X Y
1a
Y
1b
Y
2a
Y
2b
1/5 1111 1111 1111 1111 1111
1/4 1111 1111 1010 1111 0101
1/3 1111 1111 0000 1111 0000
1/2 1111 1010 0000 0101 0000
3.7 Parity Bits
The inclusion of various parity codes before and/or after the Symbol-Based Turbo
Code encoder were also studied. The rst Symbol-Based Turbo Code with parity
bits studied parses the input data into n 1 bit sub-block and adds a single parity
bit to each sub-block to create n-bit symbols. These symbol are then encoded
using the Symbol-Based Turbo Code encoder. Interleaving is performed on an n-
bit basis. The rates of these codes are (n 1)/3n for BPSK modulation. We refer
to these codes as Symbol-Based Turbo Codes with full parity because the parity
bit is passed to all of the parallel data streams. The trellis diagram of the RSC
encoder consists of 2
n1
branches leaving each state. These branches correspond
to all the possible n 1 bit sub-blocks. This trellis can also be obtained by the
n-stage merged trellis diagram by removing every branch which does not have an
even parity input symbol. The decoder uses this modied merged trellis diagram
in the constituent decoders.
The second Symbol-Based Turbo Code with parity studied only passes the parity
bit onto the encoded data streams, as shown in Figure 3.5, and not the systematic
data stream. We call these codes Symbol-Based Turbo Codes with partial parity.
3.7. PARITY BITS 40
This structure results in a code rate of (n1)/(a+2j). When BPSK modulation is
used, the code code becomes (n1)/(3n1). Therefore code rates of 1/5, 1/4, 3/11
are attainable for n = 2, 3, 4.
Shift Register
Shift Register
Interleaver
RC Encoder
RC Encoder
Y
k
Y
k
2
Restricted
n
n
k
k
y
1
y
1
2
j
j
-Point
n
2
Signal Set
-Point
n
2
Signal Set
Input Turbo-Code Encoder Outputs Modulation To Channel
n-1 X
k
n-1
d
k
2
n-1
-Point
Signal Set
k
x
Single Bit
Parity
n
n
a
Figure 3.5: Symbol-Based Turbo Code Encoder With Partial Parity
Chapter 4
Simulation Setup
The BER performance of the Symbol-Based Turbo Codes studied were obtained by
simulation using an AWGN channel and a Rayleigh fading channel. The discrete
model of the AWGN channel is given by the expression y
k
= x
k
+ z
k
, where x
k
is the transmitted symbol and z
k
is a Gaussian random vector with independent
and identically distributed (i.i.d.) components with mean zero and variance N
0
/2.
Similarly, the discrete model of the Rayleigh fading channel is given by the ex-
pression y
k
= a
k
x
k
+z
k
, where x
k
and z
k
are the same as above, and the a
k
s are
i.i.d. random variables with a Rayleigh distribution of the form f(a) = 2ae
a
2
for
a 0. For the Rayleigh fading channel, the decoder incorporates the a
k
s into the
decoding algorithm. In other words, it is assumed that the receiver can determine
the multiplicative fading factors. The discrete model for both channels are shown
in Figure 4.1.
Most of the simulations were performed using the Symbol-Based Turbo Code
encoder shown in Figure 3.1. The RSC encoders have M = 4 memory elements and
41
CHAPTER 4. SIMULATION SETUP 42
x
k
E
c
z
k
E
y
k
y
k
= x
k
+z
k
AWGN Channel
x
k
E
d
d
E
c
a
k
E
c
z
k
E
y
k
y
k
= a
k
x
k
+z
k
Rayleigh Fading Channel
Figure 4.1: AWGN and Rayleigh Fading Channel Models
generator polynomial (37, 21)
8
. Unless otherwise noted, 20 iterations are performed
by the decoder. Assuming a data rate of 9.6 Kbits/sec, the IS-95 delay specication
of 20 ms corresponds to a maximum block length of N = 192 bits. This block
length was used for most of the simulations. However, other block lengths were
also simulated for comparison. As discussed previously, when the block size, n,
exceeds the number of memory elements, parallel transitions occur in the merged
trellis diagram which severely degrade the performance of the code. For symbol
sizes of 5 and 6, RC encoders with the value of M = n are used.
Some of the Symbol-Based Turbo Codes were also simulated using the RSC
encoder shown in Figure 3.4, which has M = 3 memory elements and two feed-
forward outputs. In each case, the block size and the code rate are noted.
The Symbol-Based Turbo Codes with orthogonal, bi-orthogonal, M-ary PSK,
and BPSK modulation were simulated. For BPSK modulation, the Symbol-Based
Turbo Code was simulated with no parity, full parity and partial parity.
Chapter 5 shows the numerical results of all the simulations performed.
Chapter 5
Numerical Results
5.1 Symbol-Based Turbo Codes BER Performance
5.1.1 Orthogonal Modulation
Figure 5.1 shows the BER performance of Symbol-Based Turbo Codes with or-
thogonal modulation over an AWGN channel and a Rayleigh fading channel for
symbol sizes n = 1, 2, . . . 6. The rates of these codes are n/3(2
n
). For a symbol
size n = 6, the resulting code has the same spectral eciency as the IS-95 Up-link
code (composed of a rate 1/3 convolution code with 2
6
-ary orthogonal signaling).
In Figure 5.1, the BER performance of the Symbol-Based Turbo Codes are com-
pared with a convolutional code, constraint length K = 9, with 2
6
-ary orthogonal
signaling (i.e. a code with the same structure as the IS-95 Up-link).
The Symbol-Based Turbo Codes cannot be directly compared with the IS-95
Up-link because the IS-95 Up-link consists of non-coherent reception while our
43
5.1. SYMBOL-BASED TURBO CODES BER PERFORMANCE 44
0 2 4
10
5
10
4
10
3
10
2
10
1
AWGN Channel
B
i
t

E
r
r
o
r

R
a
t
e
0 2 4 6
10
5
10
4
10
3
10
2
10
1
B
i
t

E
r
r
o
r

R
a
t
e
o Symbol-Based Turbo Code, Symbol Size n = 1, Rate 1/6
x Symbol-Based Turbo Code, Symbol Size n = 2, Rate 1/6
+ Symbol-Based Turbo Code, Symbol Size n = 3, Rate 1/8
Symbol-Based Turbo Code, Symbol Size n = 4, Rate 1/12
-.- Symbol-Based Turbo Code, Symbol Size n = 5, Rate 1/19.2
... Symbol-Based Turbo Code, Symbol Size n = 6, Rate 1/32
Convolutional Code (K = 9) with Orthogonal Signaling, Rate 1/32
Figure 5.1: BER Performance of Symbol-Based Turbo Codes (M = 4, N = 192)
With Orthogonal Modulation
study has focused on coherent reception. However, Figure 5.1 does show that
the Symbol-Based Turbo Code with orthogonal modulation with symbol size n = 6
performs about 1.4 dB better than the convolutional code with orthogonal signaling
at a BER of 10
3
for an AWGN channel and about 2.9 dB better for a Rayleigh
fading channel. This result suggests that the Symbol-Based Turbo Code (symbol
size n = 6) with non-coherent reception will perform better than the IS-95 Up-link
code. However, simulations are required to conrm this.
5.1.2 M-ary PSK Modulation
The Symbol-Based Turbo Codes with M-ary PSK modulation have rates of n/6,
where n is the symbol size. The BER performance of these codes are compared
with rate 1/3 and rate 1/2 convolutional codes with constraint length (K = 9) for
both AWGN and Rayleigh fading channels in Figure 5.2. For a BER of 10
3
, the
Symbol-Based Turbo Codes with M-ary PSK modulation performs about 0.7 dB
better than convolutional codes of the same rate over an AWGN channel, and about
2.2 dB better over a Rayleigh fading channel.
5.1.3 Bi-orthogonal Modulation
The third Symbol-Based Turbo Code simulated uses bi-orthogonal modulation.
n1
). Figure 5.3 shows the BER performance of
these codes over an AWGN channel.
The Symbol-Based Turbo Code with bi-orthogonal modulation obtains a BER
of 10
3
at an SNR of 0.68 dB for a symbol size of n = 4. For a symbol size of
0 1 2 3 4
10
5
10
4
10
3
10
2
10
1
AWGN Channel
B
i
t

E
r
r
o
r

R
a
t
e
2 4 6 8
10
5
10
4
10
3
10
2
10
1
B
i
t

E
r
r
o
r

R
a
t
e
o Symbol-Based Turbo Code, Rate 1/3
x Symbol-Based Turbo Code, Rate 1/2
Convolutional Code, Rate 1/3, K = 9
-.- Convolutional Code, Rate 1/2, K = 9
With M-ary PSK Modulation and Convolutional Codes (K = 9)
n=1, R=1/3
n=2, R=1/3
n=3, R=1/4
n=4, R=1/6
n=5, R=1/9.6
n=6, R=1/16
0.5 0 0.5 1 1.5 2
10
5
10
4
10
3
10
2
10
1
B
i
t

E
r
r
o
r

R
a
t
e
With Bi-orthogonal Modulation over an AWGN Channel
N=96
N=192
N=512
N=1024
0.5 0 0.5 1 1.5 2
10
5
10
4
10
3
10
2
10
1
B
i
t

E
r
r
o
r

R
a
t
e
Figure 5.4: BER Performance of the Rate 1/8 Symbol-Based Turbo Code (M = 4)
With Bi-orthogonal Modulation over an AWGN Channel for Various Block Lengths
n = 6, a BER of 10
3
is obtained at an SNR of 0.30 dB. As a means of comparison,
the Symbol-Based Turbo Code with bi-orthogonal modulation for a symbol size
n = 3 (rate 1/8) were also simulated for other block lengths, N, and are shown
in Figure 5.4. A BER of 10
3
is obtained at an SNR of 1.27 dB for N = 96, at
0.93 dB for N = 192, at 0.45 dB for N = 512, and at 0.22 dB for N = 1024.
5.1.4 BPSK Modulation
The Symbol-Based Turbo Codes with n-dimensional BPSK modulation were also
simulated. The BER performance of these codes improve only slightly (less than
0.1 dB), by increasing the the symbol size from n = 1 to n = 2. For n = 3, 4, . . .,
the BER performance is essentially the same as the n = 2 code. However, the
strength of these codes can be seen when we consider the 5 and 10 iteration BER
performance for symbol sizes n = 1, 2. Figure 5.5 shows the BER performance
for the Symbol-Based Turbo Code (M = 4, R = 1/3), with BPSK modulation
for i = 5, 10 iterations and block sizes N = 192, 512. For both block sizes, the
Symbol-Based Turbo Code with symbol size n = 2 requires about 5 iterations to
obtain the same BER performance as the traditional Turbo Code (n = 1) with 10
iterations
1
.
The same trend is also observed for the M = 4, R = 1/4 Symbol-Based Turbo
Code with BPSK modulation for a block length of N = 192, as shown in Figure 5.6.
However, for a block length N = 512 about 8 iterations of the n = 2 code are
required to obtain the same BER performance as the n = 1 code with 10 iterations.
1
These codes are also the subject of a patent in North America and has been proposed by
NORTEL for integration into the emerging 3G-IS95 standard.
Therefore, it is recommended, for large block sizes, that RSC encoders with only
one feed-forward output be used in these Symbol-Based Turbo Codes.
n=1,i=5
n=1,i=10
n=2,i=5
n=2,i=10
n=1,i=5
n=1,i=10
n=2,i=5
n=2,i=10
0 0.5 1
10
5
10
4
10
3
10
2
10
1
N=512
B
i
t

E
r
r
o
r

R
a
t
e
0 0.5 1 1.5 2
10
5
10
4
10
3
10
2
10
1
N=192
B
i
t

E
r
r
o
r

R
a
t
e
Figure 5.5: BER Performance of Symbol-Based Turbo Code (M = 4, R = 1/3)
with BPSK Modulation for Block Sizes, N = 192, 512 and i = 5, 10 Iterations
Figure 5.7 shows the degradation in BER performance of Symbol-Based Turbo
Codes with BPSK modulation when less than 20 iterations are performed. Note
that as the symbol size increases, the degradation in BER performance decreases.
Therefore, we conclude that the the modied BCJR algorithm converges faster as
R=1/3, n=1, i=10
R=1/3, n=2, i=5
R=1/4, n=1, i=10
R=1/4, n=2, i=5
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
10
5
10
4
10
3
10
2
10
1
B
i
t

E
r
r
o
r

R
a
t
e
Figure 5.6: BER Performance of Rate 1/3 (M = 4) and Rate 1/4 (M = 3) Symbol-
Based Turbo Codes (N = 192) With BPSK Modulation for 5 and 10 Iterations
the symbol size is increased. The same trends are also observed when orthogo-
nal or bi-orthogonal modulation are used. Table 5.1 shows a comparison of the
degradation in BER performance for various modulation techniques for symbol size
n = 4.
n=1
n=2
n=3
n=4
5 10 15 20
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0.18
0.2
B
E
R

D
e
g
r
a
d
a
t
i
o
n

(
d
B
)
Number of Iterations
Figure 5.7: Degradation in BER Performance of Rate 1/3 Symbol-Based Turbo
Codes (M = 4, N = 192) With BPSK Modulation vs. Number of Iterations at a
BER of 10
3
Table 5.1: BER Performance Degradation of Symbol-Based Turbo Codes for Var-
ious Modulation Techniques as Compared with Symbol Size n = 4, 20 Iterations
Modulation Iteration
Technique i=5 i=10 i=15
Orthogonal 0.0802 0.0200 0.0044
Bi-orthogonal 0.0701 0.0177 0.0042
BPSK 0.0865 0.0217 0.0045
5.1.5 Parity Bits
Symbol-Based Turbo Codes with full parity were the rst class of codes we studied
which combine Symbol-Based Turbo Codes with parity bit codes. These codes,
as discussed in section 3.7, parse the input data into n 1 bit sub-blocks and
maps them to n-bit symbols by adding a single parity bit. These symbols are then
passed through a Symbol-Based Turbo Code encoder. The rates of these codes are
(n 1)/3n for BPSK modulation. Figure 5.8 shows the BER performance of these
code.
The second second set of codes studied are called Symbol-Based Turbo Code
with partial parity. In these codes, the parity bit added to the n 1 bit sub-
blocks is only passed to the encoded data streams and not to the systematic data
stream. Figure 3.5 shows the structure of this encoder. The rates of these codes
are (n 1)/(3n 1) for BPSK modulation. The BER performance of these codes
is shown in Figure 5.9.
For both parity schemes, the n = 2 code is essentially a repetition code. These
codes perform worse than the traditional Turbo Code with no parity. For n = 3, 4
both parity codes perform about 0.2 dB better than the traditional Turbo Code.
R=1/3, no parity
n=2, R=1/6
n=3, R=2/9
n=4, R=1/4
n=5, R=4/15
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
10
5
10
4
10
3
10
2
10
1
B
i
t

E
r
r
o
r

R
a
t
e
SignaltoNoise Ratio (db)
With BPSK Modulation and Full Parity
However, for a rate R = 1/4 code, the full parity code requires a symbol size of
n = 4 while the partial parity code needs a symbol size of n = 3. Since the decoder
complexity is a function of the symbol size n, as will be discussed in section 5.2, the
partial parity code can obtain the same BER performance as the full parity code,
but with lower decoder complexity.
R=1/3, no parity
n=2, R=1/5
n=3, R=1/4
n=4, R=3/11
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
10
5
10
4
10
3
10
2
10
1
B
i
t

E
r
r
o
r

R
a
t
e
SignaltoNoise Ratio (db)
With BPSK Modulation and Partial Parity
5.2. COMPLEXITY AND MEMORY 56
5.2 Complexity and Memory
Merging n sections of the RSC trellis results in a reduction in the eective block
length by a factor of 1/n. This shorter eective block length means that fewer
and values from the forward and backward recursions of the modied BCJR
algorithm need to be stored. Similarly, the shorter eective block length means
that the modied BCJR algorithm is calculated over fewer stages, thus resulting in
a reduction in the number of computations. On the other hand, the merged trellis
diagram has more branches leaving each state (specically 2
n
branches). These ex-
tra branches increases the number of calculations required per stage. Furthermore,
more branches translates into more LLR values that need to be stored. Lastly,
the use of a multi-dimensional signal space results in more complex branch metric
calculations and requires more memory storage. The memory requirements and
computational complexity of the Symbol-Based Turbo Code decoder relative to the
traditional Turbo Code, n = 1, are shown in Table 5.2. The details of this analysis
are discussed in Appendix A.
Table 5.2: Relative Memory Requirements and Per Iteration Computational Com-
plexity of the Symbol-Based Turbo Code Decoder
Memory Symbol Size (n)
Size (M) 1 2 3 4
Memory 3 1.00 0.78 0.88
4 1.00 0.67 0.67 0.84
Complexity 3 1.00 0.99 1.32
4 1.00 0.99 1.31 1.96
Table 5.2 shows that the relative RAM (Random Access Memory) requirements
of the Symbol-Based Turbo Code decoder are less than the traditional Turbo Code
Furthermore, the ROM (Read Only Memory) used to store the interleaver structure
is also reduced by a factor of 1/n.
The relative computational complexity is approximately given by the expression
2
n1
/n. This result is intuitively satisfying because a merged trellis diagram has
2
n
branches leaving each state, and consist of n input bits. The traditional Turbo
Code, n = 1, has 2 branches leaving each state of the RSC trellis, and one stage of
the this trellis corresponds to a single input bit. Therefore (2
n
/n)/(2/1) = 2
n1
/n.
Therefore, the computational complexity per iteration for symbol sizes n = 1, 2
are approximately the same. However, as shown in Figure 5.5 and Figure 5.6,
Symbol-Based Turbo Codes with BPSK modulation and symbol size n = 2 require
approximately 5 iterations to obtain the same BER performance of the traditional
Turbo Code, n = 1, with 10 iterations. Overall, Symbol-Based Turbo Codes with
n = 2 result in an improved performance for the same number of decoding iterations
(or equivalently a reduction in the number of iterations for the same performance),
as well as a reduction in the required memory size with respect to the traditional
Turbo Code, n = 1, at no extra cost. For larger symbol sizes n = 3, 4, the increase
in computational complexity is partially compensated by a reduction in the number
of iterations required.
Table 5.3 compares the computational complexity and memory requirements of
the Symbol-Based Turbo Code decoder with the Viterbi decoding of a convolutional
code with constraint length K = 9.
The Symbol-Based Turbo Code decoder with 5 iterations require more compu-
Table 5.3: Total Number of Decoding Operations and Words of RAM Memory
Required for the Symbol-Based Turbo Codes (5 iterations) and a Convolutional
Code (K = 9)
Memory Memory Size (n) Conv.
Size (M) 1 2 Code (K = 9)
Computations 3 2870 2845 768
RAM Size 27 21 256
Computations 4 5670 5605 768
RAM Size 43 29 256
tations than the convolutional code, specically, 3.7 - 7.4 times more, depending on
the symbol size, n, and the number of memory elements, M, in the RSC encoders.
However, the Symbol-Based Turbo Code decoder requires much less RAM memory
storage than the convolutional code.
Chapter 6
Conclusions
This thesis studies the combination of Turbo Codes with dierent modulation tech-
niques to take advantage of inherent trade-os between BER performance, code
rate, spectral eciency, and decoder complexity. The encoder and decoder struc-
ture of our coding method, which we call, Symbol-Based Turbo Codes, were pre-
sented. The BER performance of Symbol-Based Turbo Codes with orthogonal,
bi-orthogonal, M-ary PSK, and BPSK modulation were simulated and presented.
The decoder memory requirements and computational complexity was also ana-
lyzed. The following observations about Symbol-Based Turbo Codes are noted:
Symbol-Based Turbo Coding is an eective method to combine Turbo Codes
with dierent modulation techniques.
Low rate Symbol-Based Turbo Codes which use orthogonal or bi-orthogonal
modulation display an improvement in BER performance as the symbol size is
increased. Furthermore, these codes perform better than constraint length 9
59
CHAPTER 6. CONCLUSIONS 60
convolutional codes with the same modulation techniques, specically, 1.4 dB
better for an AWGN channel, and 2.9 dB better for a Rayleigh fading channel
in the orthogonal modulation case.
The high-rate Symbol-Based Turbo Codes with M-ary PSK modulation per-
form about 0.7 dB better than convolutional codes of the same rate and
similar decoding complexity over an AWGN channel and about 2.2 dB better
over a Rayleigh fading channel.
The BER performance of the Symbol-Based Turbo Codes studied only de-
grade 1.25 - 1.5 dB between an AWGN channel and Rayleigh fading channel.
In comparison, the convolutional codes displayed a 3 - 4 dB degradation.
The Symbol-Based Turbo Code decoding algorithm converges faster as the
symbol size, n, increases for BPSK, orthogonal and bi-orthogonal modulation
techniques.
The Symbol-Based Turbo Code (M = 4, R = 1/3) with BPSK modulation
and a symbol size n = 2 requires only 5 iterations to obtain the same BER
performance as the traditional, n = 1, Turbo Code with 10 iterations. This
trend is observed for both small and large block sizes. The M = 3, R = 1/4
Symbol Based Turbo Codes also display this feature for small block sizes (i.e.
N = 192), but not for large block sizes.
The Symbol-Based Turbo Code decoder requires less memory than the tradi-
tional Turbo Code decoder. Specically, only 67 - 88% of the memory needed
by the traditional Turbo Code decoder is required for the Symbol-Based Turbo
Code decoder, depending on the memory size of the RSC encoders (M) and
the symbol size (n).
The relative per iteration computational complexity of the Symbol-Based
Turbo Code as compared with the traditional Turbo Code, n = 1, is roughly
given by the expression 2
n1
/n. Therefore, the per iteration complexity of the
n = 2 Symbol-Based Turbo Code is approximately the same as the traditional
Turbo Code (n = 1). However, for small block lengths, the n = 2 code requires
fewer iterations. Therefore the over-all complexity and memory requirements
of the n = 2 code is less than the traditional Turbo Code and is obtained at
no extra cost.
Symbol-Based Turbo Codes with BPSK modulation and partial parity provide
a good trade-o between BER performance and computational complexity.
For example, n = 4 code with full parity performs about the same as the
n = 3 partial parity code. Although these codes have the same rate (1/4)
the computational complexity of the partial parity code is less than the full
parity code.
Symbol-Based Turbo Codes are good candidates for spread spectrum com-
munication systems such as CDMA. Specically, the Symbol-Based Turbo
Code with orthogonal modulation can be used for a non-coherent up-link, or
bi-orthogonal modulation for a coherent up-link. Furthermore, Symbol-Based
Turbo Codes with either M-ary PSK modulation or BPSK modulation can
be used for a coherent down-link.
Future Research Directions
The future research directions in the study of Symbol-Based Turbo Codes are as
follows:
Examine the BER performance for a more realistic fading channel model (i.e.
Jakes model [29].)
Study the degradation in BER performance when sub-optimal RSC decoders
are used.
Investigate the use of other modulation techniques / signal constellations.
Perform the simulations to obtain the BER performance curves for BERs
below 10
5
in order to study the shallow portion of the BER curves. It is
suspected that the performance in this area of the BER curves will degrade
slightly when the symbol size is increased.
The following are a few future research directions for issues related to Turbo
Codes in general:
The modied BCJR algorithm assumes that the receiver can accurately deter-
mine the E
b
/N
0
ratio of the channel. The BER performance of a Turbo Code
needs to be examined for inaccurate estimations of this ratio. For example,
and estimation of aE
b
/N
0
for 0.25 a 4.
The modied BCJR algorithm can accurately decode an RSC code if the
path through the trellis consists of a few strong links periodically spaced
throughout the length of the block. A strong link refers to a stage in the trellis
where a single path is much more likely than all the other paths combined.
If these strong links are placed, say about 20 bits apart, the modied BCJR
can more easily determine the correct path between the strong links. This
property can be taken advantage of by intentionally introducing strong links
(i.e. by doubling the transmitted energy of every, say 20 bits). The optimal
choice of energy increase and span between strong links needs to be examined.
Implement the modied BCJR algorithm using matrices and take advantage
of sparse matrix manipulation techniques.
Use parity bit codes with Tanner graph representations for the constituent
encoders and decode using the forward-backward algorithm for Tanner graphs
discussed in [30].
Appendix A
Complexity and Memory
Calculations
Consider the Symbol-Based Turbo Code encoder discussed in section 3.1 with sym-
bol size n and constituent RSC encoders with M memory elements. The merged
trellis diagram of the RSC encoder have 2
M
states, and 2
n
branches leaving each
state. The parallel data streams are transmitted using the J-dimensional modula-
tion vectors m
i
= (m
i,1
, m
i,2
, . . . , m
i,J
).
The modied BCJR algorithm discussed in section 3.2 can be implemented dif-
ferently depending on the desired trade-o between computational complexity and
memory requirements. The decoder can be implemented to minimize the number
of computations at the expense of large memory requirements. Alternatively, the
decoder can be implemented to minimize the memory requirements at the expense
of a great increase in the number of computations. We propose a trade-o which
results in memory requirements and computational complexity which are both close
64
APPENDIX A. COMPLEXITY AND MEMORY CALCULATIONS 65
to their minimum values.
i
(R
k
, m
) Calculations
The
i
(R
k
, m
) calculations is the primary location in the modied BCJR algorithm

where a trade-o between memory storage and computational complexity can be
made. As discussed in section 3.2, the
i
(R
k
, m
) values are given by the following

expression:
i
(R
k
, m
) = Pr{x
k
|S
k1
= m
, d
k
= i}Pr{y
k
|S
k1
= m
, d
k
= i}Pr{d
k
}. (A.1)
The rst two terms are the branch metrics for the systematic and parity data
streams and the third term is the APP of the input symbol d
k
. For an AWGN
channel, the branch metrics are given the following expressions:
Pr{x
k
|S
k1
= m
, d
k
= i} =
J
j=1
exp
_
(x
k,j
m
i,j
)
2
N
0
_
(A.2)
Pr{y
k
|S
k1
= m
, d
k
= i} =
J
j=1
exp
_
(y
k,j
m
Y,j
)
2
N
0
_
(A.3)
A compromise between memory storage and computational complexity can be made
if the branch metrics are calculated for each of the parallel data streams x, y1, y2 and
stored. In the forward and backward equations, the appropriate branch metrics are
multiplied together, along with the current APP value to form the
i
(R
k
, m
) values.
The calculation of equation A.2, requires 1 subtraction and 1 multiplication for each
exponential term, J 1 multiplications to form the product, and 1 multiplication
to include the common factor e
N
0
. Equation A.2 needs to be calculated for each of
the 2
n
possible values of the input symbol d
k
. Furthermore, this calculation needs
to be performed for each of the parallel data streams. This results in an over-all
number of computations of 3(2
n
)(3J).
Intrinsic Information
A general expression for the intrinsic information is as follows:
log
_
Pr{x
k
|d
k
= i}
Pr{x
k
|d
k
= 0}
_
=
1
N
0
J
j=1
[2x
k,j
(m
i,j
m
0,j
) + (m
2
0,j
m
2
i,j
)]. (A.4)
This expression requires 3 additions (or subtractions) and 1 multiplication for each
term in the summation (assuming that the m
2
i,j
are pre-calculated), J 1 addi-
tions to form the sum, and 1 multiplication for the common factor 1/N
0
. Since
equation A.4 needs to be calculated for each of the 2
n
possible values of the input
symbol d
k
, the resulting number of computations to calculate the intrinsic informa-
tion is (2
n
)(5J). However, as discussed in sections 3.3 3.6, the general expression
for the intrinsic information can be further simplied. This simplication reduces
the number of calculations to 10(2
n
) for orthogonal and bi-orthogonal modulation,
5(2
n
) for M-ary PSK modulation, and n(2
n
) for BPSK modulation.
k
(m) Calculations
The
k
(m) values of the forward recursion are given by the following expression:
k
(m) =
1
i=0
i
(R
k
, m
, m)
k1
(m
1
i=0
i
(R
k
, m
, m)
k1
(m
)
(A.5)
This expression requires 3 multiplications to form each term in the numerator be-
cause the
i
(R
k
, m
, m) values consist of 3 terms, and thus require 2 multiplications.

To form the sum in the numerator (2
n
1) additions are required. These calcu-
lations must be performed for each of the 2
M
states. The denominator is formed
by adding the 2
M
numerator terms together. Finally, 2
M
divisions are required
to form the
k
(m) values. Therefore the total number of calculations required is
3(2
M+n
) + 2
M
(2
n
1) + (2
M
1) + 2
M
.
k
(m) Calculations
The
k
(m) values of the backward recursion are given by the following expression:
k
(m) =
1
i=0
i
(R
k+1
, m, m
)
k+1
(m
1
i=0
i
(R
k+1
, m
, m)
k
(m
)
(A.6)
Using a similar analysis as for the
k
(m) calculations, it can be shown that the
k
(m) values require 6(2
M+n
) + 2
M
(2
n
1) + (2
M+n
1) + 2
M
calculations.
k
(i) Calculations
The values are given by the expression,
k
(i) = log
_
m

1
(R
k
, m
, m)
k1
(m
)
k
(m)
m

0
(R
k
, m
, m)
k1
(m
)
k
(m)
_
. (A.7)
The central term requires 4 multiplications, and needs to be calculated for each of
the branches in the trellis diagram (2
M+n
). Each summation is performed over all
the branches with the same input symbol, thus (2
M
1) additions are required for
each of the 2
n
input symbol values. Lastly, 2
n
divisions are required to complete
the expressions. (The log() function is implemented using a look-up table and is
not included in the number of calculations required.) Therefore, the
k
(i) values
require 4(2
M+n
) + 2
n
(2
M
1) + 2
n
calculations.
Miscellaneous Calculations
The remaining calculations in the modied BCJR algorithm deal with the manip-
ulation of the LLR values. Firstly, the conversion of LLR values to APP values
requires 2
n
1 additions and 2
n
divisions. Secondly, the calculation of the extrinsic
component of the LLR values requires 2(2
n
) subtractions. Thirdly, the LLR values
are used to make a hard decision on the input symbol by selecting the largest. Thus
2
n
calculations are required to make this decision.
Decoder Complexity
All of the analysis of computational complexity in the previous sections is based
on the number of computations required per stage of the merged trellis. In or-
der to compare computational complexities, each expression must be divides by
n to obtain the number of computations required per input bit. The calculation
of the
i
(R
k
, m
) values and the nal hard decision are both overhead calculations
that only need to be performed once. The intrinsic information can also be calcu-
lated only once and stored, but this increases the memory storage requirements. If
the intrinsic information is calculated each time it is needed the memory storage
requirements will be reduces with only a 1-5% increase in complexity. For this
reason, the intrinsic information is not performed as an overhead calculation. The
remaining calculations must be calculated by each RSC decoder at every iteration.
Table A.1 shows the number of computations required for the overhead calculations,
and the for the per iteration calculations. The number of per iteration calculations
is 2 times the number of calculations required for each RSC decoder. Since the
overhead calculations are a function of the the dimensionality of the signal space
(J), Table A.1 reects the values for BPSK modulation. The number of overhead
calculations will be slightly higher for other modulation schemes.
Note that the number of overhead calculations required is not a function of the
number of memory elements. It is only a function of the modulation scheme and
the symbol size. Furthermore, for a decoder that performs 5 10 iterations, the
over-all number of calculations is dominated by the per iteration calculations, and
thus the number of overhead calculation can ignored without greatly changing the
Table A.1: Number of Calculations Performed by the Symbol-Based Turbo Code
Decoder
Calculation Memory Symbol Size (n)
Type Size (M) 1 2 3 4
Overhead 3 20 38 75
Per Iteration 574 569 755
Overhead 4 20 38 75 148
Per Iteration 1134 1121 1486 2223
result.
The relative number of per iteration calculations is approximately given by the
expression 2
n1
/n. This result is intuitively satisfying because a merged trellis
diagram has 2
n
branches leaving each state, and consist of n input bits. The
traditional Turbo Code, n = 1, has 2 branches leaving each state of the RSC
trellis, and one stage of the trellis corresponds to a single input bit. Therefore
(2
n
/n)/(2/1) = 2
n1
/n.
Memory Requirements
The modied BCJR algorithm requires that an intermediate variable be stored for
both the forward and backward recursions for each state. Therefore, the
k
(m)
and
k
(m) values each require 2
M
units of memory storage. The LLR values
L1
k
(i), L2
k
(i),
k
(i), along with intermediate storage of APP values each require
2
n
1 units of memory storage. (There are 2
n
LLR values, but since
k
(0) = 0,
it does not need to be stored.) The branch metrics for each of the parallel data
streams x, y1, y2 each require 2
n
units of memory storage. A trade-o between
memory storage and computational complexity can be made by either calculating
the intrinsic information once, and storing it, or store the received systematic sym-
bols x
k
and calculate the intrinsic information when needed. In the rst case, the
intrinsic information calculation becomes an overhead calculations, but requires 2
n
units of memory storage. In the second case, the memory storage for the systematic
data stream is J/n units per input bit. However, this introduces a 1 5% increase
in the number of per iterations calculations required, depending on the modulation
scheme used. If the second case is chosen to reduce the memory storage then the
amount of memory storage required is (1/n)(2(2
M
) + 4(2
n
1) + 3(2
n
) + J). Ta-
ble A.2 shows the memory storage requirements of a Symbol-Based Turbo Code
decoder when BPSK modulation is used.
Table A.2: Memory Requirements of the Symbol-Based Turbo Code Decoder Per
Input Bit
Memory Symbol Size (n)
Size (M) 1 2 3 4
3 27.0 21.0 23.7
4 43.0 29.0 29.0 36.0
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Symbol-Based Turbo Codes

for Wireless Communications

, to a current state m with an input bit X

and end at state m after N +M

2N, where N is the block length. They also in-

and current states m.

and i. This simplication

) calculations is the primary location in the modied BCJR algorithm

) values are given by the following

, m) values consist of 3 terms, and thus require 2 multiplications.

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