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ZVS Ok
ZVS Ok
ECEN 5817
vds1(t)
D1
Q3
L
D3
iQ1(t) Vg +
Q2 Q4
+ vs(t)
D4
is(t)
D2
Current bi-directional switches ZCS vs. ZVS depends on tank current zero crossings with respect to transistor switching times = tank voltage zero crossings Operation below resonance: input tank current leads voltage Zero-current switching (ZCS) occurs
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|| Zi ||
1 C
R0
f0 Qe = R0 /Re
Re
ECEN 5817
vds1(t)
D1
Q3
L
D3
iQ1(t)
+ vs(t)
Q2
D2
Q4
D4
is(t)
Conduction sequence: Q1D1Q2D2 Q1 is turned off during D1 conduction interval, without loss (same for Q4/D4) Q2 is turned off during D2 conduction interval, without loss (same for Q3/D3)
ECEN 5817
vds1(t)
D1
Q3
L
D3
iQ1(t)
+ vs(t)
Q2
D2
Q4
D4
is(t)
Q1 turns on while D2 is conducting. Stored charge of D2 and of semiconductor output capacitances must be removed. Transistor turn-on transition is identical to hardswitched PWM, and switching loss occurs.
ECEN 5817
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Example
Diode in IRGP50B60 (IGBT+diode): ultra-fast, soft recovery
Reverse recovery time trr, maximum reverse recovery current IRRM, and reverse recovery charge Qrr depend on diode forward current IF prior to turn off, rate of current decay dif/dt, and junction temperature TJ
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Ds
g t gs
t Ts
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L
D3
vds1(t)
iQ1(t) Vg +
Q2 Q4
+ vs(t)
D4
is(t)
D2
Operation above resonance: input tank current lags voltage Zero-voltage switching (ZVS) occurs
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Operation above resonance: tank input impedance Zi is dominated by tank inductor. Zi is positive, and tank input current lags tank input voltage. Zero crossing of the tank input current waveform is(t) occurs after the zero crossing of the voltage vs(t) after switch transitions
|| Zi ||
1 C
R0
f0 Qe = R0 /Re
Re
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ECEN 5817
vds1(t)
D1
Q3
L
D3
iQ1(t)
+ vs(t)
Q2
D2
Q4
D4
is(t)
Conduction sequence: D1Q1D2Q2 Q1 is turned on during D1 conduction interval, without loss ZVS turn-on transitions for all transistors Turn-off transitions are at non-zero current
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+
Q1
vds1(t)
D1
Q3
L
D3
iQ1(t)
+ vs(t)
Q2
D2
Q4
D4
is(t)
When Q1 turns off, D2 must begin conducting. Voltage across Q1 must increase to Vg. Transistor turn-off transition is identical to hard-switched PWM. Switching loss may occur, but
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ECEN 5817
vds1(t)
Q3 Cleg D3
is(t) + vs(t)
Vg
+
Q2 D2 Cleg Cleg D4 Q4
to remainder of converter
Introduce small capacitors Cleg across each device (or use device output capacitances). Introduce delay between turn-off of Q1 and turn-on of Q2.
vds1(t)
Vg
Tank current is(t) charges and discharges Cleg. Turn-off transition becomes lossless. During commutation interval, no devices conduct. So zero-voltage switching exhibits low switching loss: losses due to diode stored charge and device output capacitances are eliminated.
Note: with IGBTs, substantial Cleg may be required
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Conducting devices:
X D2 D3 Commutation interval
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This result is valid provided that (i) the resonant network is purely reactive, and (ii) the load is purely resistive.
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Electronic ballast
Electrosurgical generator
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where
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ZN and ZD
ZD is equal to the tank output impedance under the condition that the tank input source vs1 is open-circuited. ZD = Zo
ZN is equal to the tank output impedance under the condition that the tank input source vs1 is short-circuited. ZN = Zo0
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Reciprocity
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Relations
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So as the load resistance R varies from 0 to , the resonant network input impedance || Zi || varies monotonically from the short-circuit value || Zi0 || to the open-circuit value || Zi ||. The impedances || Zi || and || Zi0 || are easy to construct. If you want to minimize the circulating tank currents at light load, maximize || Zi ||. Note: for many inverters, || Zi || < || Zi0 || ! The no-load transistor current is therefore greater than the short-circuit transistor current.
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Derivation
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Example: || Zi || of LCC
for f < f m, || Zi || increases with increasing R . for f > f m, || Zi || decreases with increasing R . at a given frequency f, || Zi || is a monotonic function of R. Its not necessary to draw the entire plot: just construct || Zi0 || and || Zi ||.
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Discussion: LCC
|| Zi0 || and || Zi || both represent series resonant impedances, whose Bode diagrams are easily constructed. || Zi0 || and || Zi || intersect at frequency fm. For f < fm then || Zi0 || < || Zi || ; hence transistor current decreases as load current decreases For f > fm then || Zi0 || > || Zi || ; hence transistor current increases as load current decreases, and transistor current is greater than or equal to short-circuit current for all R
LCC example
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ECEN 5817
No-load transistor current = 0, both above and below resonance. ZCS below resonance, ZVS above resonance Above resonance: no-load transistor current is greater than short-circuit transistor current. ZVS. Below resonance: no-load transistor current is less than short-circuit current (for f <fm), but determined by || Zi ||. ZCS.
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19.4
Resonant inverter design objectives: 1. Operate with a specified load characteristic and range of operating points
With a nonlinear load, must properly match inverter output characteristic to load characteristic
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Theorem 2: If the tank network is purely reactive, then the boundary between zerocurrent switching and zero-voltage switching occurs when the load resistance R is equal to the critical value Rcrit, given by
It is assumed that zero-current switching (ZCS) occurs when the tank input impedance is capacitive in nature, while zero-voltage switching (ZVS) occurs when the tank is inductive in nature. This assumption gives a necessary but not sufficient condition for ZVS when significant semiconductor output capacitance is present.
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Derivation
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Discussion Theorem 2
Again, Zi, Zi0, and Zo0 are pure imaginary quantities. If Zi and Zi0 have the same phase (both inductive or both capacitive), then there is no real solution for Rcrit. Hence, if at a given frequency Zi and Zi0 are both capacitive, then ZCS occurs for all loads. If Zi and Zi0 are both inductive, then ZVS occurs for all loads. If Zi and Zi0 have opposite phase (one is capacitive and the other is inductive), then there is a real solution for Rcrit. The boundary between ZVS and ZCS operation is then given by R = Rcrit. Note that R = || Zo0 || corresponds to operation at matched load with maximum output power. The boundary is expressed in terms of this matched load impedance, and the ratio Zi / Zi0.
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LCC example
f > f: ZVS occurs for all R f < f0: ZCS occurs for all R f0 < f < f, ZVS occurs for R< Rcrit, and ZCS occurs for R> Rcrit. Note that R = || Zo0 || corresponds to operation at matched load with maximum output power. The boundary is expressed in terms of this matched load impedance, and the ratio Zi / Zi0.
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Typical dependence of Rcrit and matched-load impedance || Zo0 || on frequency f, LCC example.
Typical dependence of tank input impedance phase vs. load R and frequency, LCC example.
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Numerical values
The required short-circuit current can be found by solving the elliptical output characteristic for Isc: hence
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The requirements imply that the inverter tank circuit have an open-circuit magnitude response:
Note that Voc need not have been given as a requirement, we can solve the elliptical relationship, and therefore find Voc given any two required operating points of ellipse. E.g. Isc could have been a requirement instead of Voc
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Hence the tank should be designed such that its output impedance is
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Solving for the tank elements to give required ||Zo0|| and ||Hinf||
Design an LCC tank network for this example
The impedances of the series and shunt branches can be represented by the reactances
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The series branch is comprised of two elements L and Cs, but there is only one design parameter: Xs = 733 . Hence, there is an additional degree of freedom, and one of the elements can be arbitrarily chosen. This occurs because the requirements are specified at only one operating frequency. Any choice of L and Cs, that satisfies Xs = 733 will meet the requirements, but the behavior at switching frequencies other than 100 kHz will differ. Given a choice for Cs, L must be chosen according to:
Rcrit
For the LCC tank network chosen, Rcrit is determined by the parameters of the output ellipse, i.e., by the specification of Vg, Voc, and Isc. Note that Zo is equal to jXp. One can find the following expression for Rcrit:
Since Zo0 and H are determined uniquely by the operating point requirements, then Rcrit is also. Other, more complex tank circuits may have more degrees of freedom that allow Rcrit to be independently chosen. Evaluation of the above equation leads to Rcrit = 1466 . Hence ZVS for R < 1466 , and the nominal operating point with R = 900 has ZVS.
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ECEN 5817
Ellipse again with Rcrit, Rmatched, and Rnom showing ZVS and ZCS
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Converter performance
For this design, the salient tank frequencies are (note that fs is nearly equal to fm, so the transistor current should be nearly independent of load) The open-circuit tank input impedance is
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