Professional Documents
Culture Documents
1) Introduo
Este trabalho mostra o projeto e a implementao de um filtro digital FIR passa baixa
para verificar sua resposta frente a um sinal de teste dada por uma corrente de
alimentao de uma lmpada eletrnica.
2) Sinal de entrada
Para o sinal de entrada (vetor1 no cdigo do programa) foi amostrado um sinal de
corrente de uma lmpada fluorescente compacta utilizando instrumentao virtual
desenvolvida em LABVIEW 2009, placa de aquisio de dados da National Instruments
e sensor de efeito hall.
Transdutor
Hall de Corrente
Lmpada
Eletrnica
Rede CEMIG
DAQ/LabView
Potncia: 17 W
Dados Obtidos:
Potencia Ativa: 17 W;
4
THDv%: 2,028%;
THDi%: 106,818%;
Para uma taxa amostragem de aquisio 7,5 kH foi obtido 250 pontos para o vetor1 que
representa a forma de onda a ser filtrada.
vetor1 = -0.330936, -0.29699, -0.2761, -0.202984, -0.197762, -0.161204, -0.145537, 0.148148, -0.13248, -0.114202, -0.093312, -0.075033, -0.051531, -0.001917, 0.009751, -0.00714, -0.00714, -0.004529, -0.00714, -0.004529, -0.00714, -0.00714, 0.00714, -0.00714, -0.009751, -0.00714, -0.004529, -0.00714, -0.00714, -0.00714, 0.00714, -0.009751, -0.00714, -0.00714, -0.00714, -0.004529, -0.004529, -0.00714, 0.00714, -0.00714, -0.00714, -0.00714, -0.00714, -0.009751, -0.009751, -0.00714, 0.009751, -0.009751, -0.00714, -0.00714, -0.00714, -0.009751, -0.00714, -0.00714, 0.009751, -0.00714, -0.004529, 0.287932, 0.3036, 0.295766, 0.306211, 0.293155,
0.293155, 0.287932, 0.269654, 0.269654, 0.175648, 0.167814, 0.139091, 0.128645,
0.120812, 0.112978, 0.089477, 0.073809, 0.047696, 0.008528, -0.009751, -0.00714, 0.012363, -0.009751, -0.00714, -0.004529, -0.009751, -0.00714, -0.009751, -0.009751,
-0.009751, -0.009751, -0.009751, -0.009751, -0.00714, -0.009751, -0.009751, 0.009751, -0.00714, -0.009751, -0.009751, -0.00714, -0.009751, -0.00714, -0.009751, 0.00714, -0.009751, -0.00714, -0.00714, -0.00714, -0.00714, -0.009751, -0.004529, 0.00714, -0.004529, -0.00714, -0.00714, -0.00714, -0.00714, -0.00714, -0.004529, 0.00714, -0.009751, -0.179483, -0.33877, -0.328325, -0.31788, -0.323102, -0.310046, 0.299601, -0.31788, -0.25521, -0.195151, -0.202984, -0.171649, -0.148148, -0.137703,
-0.124647, -0.11159, -0.095923, -0.080255, -0.059365, -0.004529, -0.004529, 0.004529, -0.001917, -0.004529, -0.00714, -0.004529, -0.004529, -0.004529, 0.004529, -0.001917, -0.00714, -0.00714, -0.009751, -0.00714, -0.00714, -0.00714, 0.00714, -0.009751, -0.00714, -0.00714, -0.00714, -0.00714, -0.00714, -0.001917, 0.00714, -0.004529, -0.00714, -0.00714, -0.00714, -0.00714, -0.00714, -0.009751, 0.00714, -0.009751, -0.009751, -0.009751, -0.00714, -0.00714, -0.00714, -0.00714, 0.004529, -0.00714, -0.00714, 0.28271, 0.329712, 0.314045, 0.308822, 0.290544,
0.295766, 0.293155, 0.251375, 0.246152, 0.170426, 0.165203, 0.144313, 0.136479,
0.120812, 0.105144, 0.086865, 0.07642, 0.050308, 0.011139, -0.00714, -0.009751, 0.009751, -0.00714, -0.012363, -0.00714, -0.009751, -0.00714, -0.009751, -0.009751, 0.00714, -0.009751, -0.009751, -0.009751, -0.00714, -0.00714, -0.00714, -0.00714, 0.009751, -0.004529, -0.004529, -0.009751, -0.00714, -0.001917, -0.00714, -0.00714, 0.00714, -0.004529, -0.00714, -0.00714, -0.004529, -0.009751, -0.009751, -0.009751, 0.00714, -0.00714, -0.00714, -0.00714, -0.009751, -0.004529, -0.009751, -0.00714, 0.00714, -0.179483, -0.328325, -0.330936, -0.325714,-0.320491, -0.294379
O alto ndice de distoro da corrente motivou a visualizao do espectro de corrente.
Como pode ser visto na Figura 4.
%
%
%
%
%
%
No foi imposto uma ordem especfica para o filtro, foi solicitado que o projeto tivesse
uma ordem mnima que atendesse os dados de entrada. Como resultado o Filter Design
& Analys Tool projetou um filtro de 76 ordem. A reposta do ganho e fase em (dB) para
este filtro poder ser visto na Figura 5.
-0.0898
-10
-1.0626
-20
-2.0353
-30
-3.0081
-40
-3.9809
-50
-4.9537
-60
-5.9265
-70
Phase (radians)
Magnitude (dB)
-6.8993
0
0.5
1.5
2
Frequency (kHz)
2.5
3.5
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
0.005
0.01
0.015
0.02
0.025
0.03
0.035
Nota-se que o sinal de sada possui um atraso de fase significativo em relao ao sinal
de entrada. Para atenuao desse atraso a soluo seria diminuir a ordem do filtro
aumentando a frequncia de corte, mas como o espectro do sinal de entrada mostrado na
Figura 7 evidncia uma significativa presena de harmnicos prximos a banda
passante desejada 60 Hz o sinal de sada apresentaria uma maior distoro. Portando
esse impasse depender da necessidade da aplicao em se ter um menor atraso ou uma
melhor qualidade do sinal de sada.
Amplitude Vetor1
0.2
0.15
0.1
0.05
0
1000
2000
3000
Frequencia (Hz)
4000
5000
6000
1000
2000
3000
Frequencia (Hz)
4000
5000
6000
Amplitude Vetor2
0.1
0.05
#include "DSP28x_Project.h"
File
10
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
//
//
//
//
//
//
Initialize the PIE vector table with pointers to the shell Interrupt
Service Routines (ISR).
This will populate the entire table, even if the interrupt
is not used in this example. This is useful for debug purposes.
The shell ISR routines are found in DSP2833x_DefaultIsr.c.
This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
11
EALLOW;
SysCtrlRegs.SCSR = 0x0002;//set bit 1 (WDENINT)- desabilita reset e
habilita int do watchdog
EDIS;
// Enable CPU int1 which is connected to CPU-Timer 0 and wakeint
IER |= M_INT1;
// Enable TINT0 and wakeint in the PIE: Group 1 interrupt 7 and 8
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
// Enable PIE Group 1 INT7
PieCtrlRegs.PIEIER1.bit.INTx8 = 1;
// Enable PIE Group 1 INT8
// Enable global Interrupts and higher priority real-time debug events:
EINT;
// Enable Global interrupt INTM
ERTM;
// Enable Global realtime interrupt DBGM
// Reset the watchdog counter
ServiceDog();
// Enable the watchdog
//
Watchdog Control Register (WDCR) - pag54 - Sprufb0d.pdf
//
| 7
| 6
| 5 4 3 | 2 1 0|
//
|WDFLAG| WDDIS| WDCHK | WDPS |
//
0
0
1 0 1
1 1 1 b
//
WDPS=111b -> WDCLK = OSCCLK/512/64=150Mhz/512/64 = 4477.6Hz
//
-> 256passos - estouro em 56ms
EALLOW;
SysCtrlRegs.WDCR = 0x002f;
EDIS;
// Step 6. IDLE loop. Just sit and loop forever (optional):
i=0;
k=0;
WakeCount=0;
LoopCount=0;
for(;;)
{
LoopCount++;
}
}
void Toggle_LED1(void)
{
GpioDataRegs.GPATOGGLE.bit.GPIO31 = 1;
}
void Toggle_LED2(void)
{
GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;
}
// ******* sevio de interrupo do timer 0
interrupt void cpu_timer0_isr(void)
{
k++;
if(k>=10) {
12
Toggle_LED1();
Toggle_LED2();
k=0;
}
// Implementao Filtro FIR
const float b[77] = {-0.00858023991873314, -0.0000347652191770424,
0.0000760935784184337,
0.000256513110714093,
0.000516560219296775,
0.000855087208497132,0.0012719536918125,
0.00176885434047466,
0.00234969558045079,
0.00301135225385597,
0.00375582111381079,
0.00457992464629308,
0.00548426852288823,
0.00646245652876113,
0.00751346651298373,0.0086295504966837,
0.00980749822255711,
0.0110372551264953, 0.012314154886598,
0.0136267087373359,
0.0149684639220231, 0.0163263198890221,
0.0176927180564,
0.0190537339190931, 0.020400618856995,
0.0217185877506475, 0.022998851085529, 0.0242270549476934,
0.0253938714934042, 0.0264856307720612, 0.0274949375382598,
0.0284097494680282, 0.0292218899487717, 0.0299231057280884,
0.0305089524793309, 0.0309720465423513, 0.0312974138872869,
0.0315046747159177, 0.0315791191315456, 0.0315046747159177,
0.0312974138872869, 0.0309720465423513, 0.0305089524793309,
0.0299231057280884, 0.0292218899487717, 0.0284097494680282,
0.0274949375382598, 0.0264856307720612, 0.0253938714934042,
0.0242270549476934, 0.022998851085529, 0.0217185877506475,
0.020400618856995, 0.0190537339190931, 0.0176927180564,
0.0163263198890221, 0.0149684639220231, 0.0136267087373359,
0.012314154886598, 0.0110372551264953, 0.00980749822255711,
0.0086295504966837, 0.00751346651298373,
0.00646245652876113,
0.00548426852288823,
0.00457992464629308,
0.00375582111381079,
0.00301135225385597,
0.00234969558045079,
0.00176885434047466,
0.0012719536918125,
0.000855087208497132,
0.000516560219296775,
0.000256513110714093,
0.0000760935784184337,
0.0000347652191770424,
-0.00858023991873314};
int M;
int ordem=76;
for (i=0;i<250;i++)
{
float soma = 0;
if (i<ordem+1)
{
M=i;
}
else
{
M=ordem+1;
}
for (j=0; j<M; j++)
{
soma = soma + b[j]*vetor1[i-j];
}
vetor2[i] = soma;
}
13
//===========================================================================
// No more.
//===========================================================================
14