1.Hamid R.

Rategh, Student Member, IEEE, Hirad Samavati, Student Member,

IEEE, and Thomas H. Lee, Member, IEEE, � A CMOS Frequency Synthesizer
with an Injection-Locked Frequency Divider for a 5-GHz Wireless LAN
Receiver� IEEE JOURNAL ON SOLID-STATE CIRCUITS, VOL. 35, NO. 5,
MAY 2000.

[2] Thomas Dellsperger, �Design of a 5 GHz VCO in CMOS�.

[3] Tamara I. Ahrens, Ali Hajimiri, Thomas H. Lee, �A 1.6 GHz 0.5 mW CMOS
LC Low Phase Noise VCO Using Bond Wire Inductance�.

[4] Adam Sherman Klein, �Design and Characterization of RFIC Voltage

Controlled Oscillators in Silicon Germanium HBT and Submicron MOS
Technologies�

[5] Ryan Lee Bunch, Member, IEEE, and Sanjay Raman, Member, IEEE, �Large-
Signal Analysis of MOS Varactors in CMOS Gm LC VCOs� IEEE JOURNAL
OF SOLID-STATE CIRCUITS, VOL. 38, NO. 8, AUGUST 2003.

[6] Professor John Starr Hame, �LC Tank Voltage Controlled Oscillator Tutorial�

[7] Pietro Andreani and Sven Mattisson �On the Use of MOS Varactors in RF
VCO�s� IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 6,
JUNE 2000.

[8] Sander L. J. Gierkink, Salvatore Levantino, Member, IEEE, Robert C. Frye,

Carlo Samori, Member, IEEE, and Vito Boccuzzi, Member, IEEE, �A Low-
Phase-Noise 5-GHz CMOS Quadrature VCO Using Superharmonic Coupling�,
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 7, JULY 2003.

[9] Sander L.J. Gierkink, Salvatore Levantino1, Robert c. Frye, �A Low-Phase-

Noise 5GHz Quadrature CMOS VCO using Common-Mode Inductive Coupling�

[10] Andrei Grebennikov,� Noise Reduction in Transistor Oscillators: Part 2 -

Low Frequency Loading and Filtering�

[1] Rola A. Baki and Mourad N. El-Gama1, � A New CMOS Charge Pump for
Low-Voltage (1V) High-speed PLL Applications�

[2] Jose Alvarez, Member, IEEE, Hector Sanchez, Gianfranco Gerosa, Member,
ZEEE, and Roger Countryman, �A Wide-Bandwidth Low-Voltage PLL�, IEEE
JOURNAL OF SOLID-STATE CIRCUITS, VOL. 30, NO. 4, APRIL 1995.

[3] Masoud Zargari,, David K. Su, C. Patrick Yue,, Shahriar Rabii, �A 5-GHz
CMOS Transceiver for IEEE 802.11a Wireless LAN Systems�.

[4] Hamid Rategh, Hirad Samavati, Thomas Lee

wUniversity of California, Santa Barbara, �5GHz, 32mW CMOS Frequency
Synthesizer with an Injection�Locked Frequency Divider�

[1] X. P. Yu, M. A. Do, J. G. Ma, and K. S. Yeo, �A new 5GHz CMOS dual-
modulus prescaler�

[2]X.P. Yu, M.A. Do, J.G.Ma, K.S. Yeo, R.Wu and G.Q. Yan, �Low power high-
speed CMOS dual-modulus prescaler design with imbalanced phase-switching
technique�

[3] Abdelaziz Benachour, Sherif. H. K. Embabi, Akbar Ali,Texas A&M

University, �A 1.5GHz, Sub-2mW CMOS Dual-Modulus Prescaler�

[4] HIong- Yi Huang, Sheng-Feng Ho anid I-lYsuan- Yi Su Departmenit of

Electronic Engineering, Fu-Jen Catholic University, Taiwan, �A Dual-Modulus
Prescaler Using Double-Edge-Triggered D-Flip-Flops�

[5] Seog-Jun Lee, Beomsup Kim, Senior Member, IEEE, and Kwyro Lee, Senior
Member, IEEE, �A Fully Integrated Low-Noise 1-GHz Frequency Synthesizer
Design for
Mobile Communication Application�, IEEE JOURNAL OF SOLID-STATE
CIRCUITS, VOL. 32, NO. 5, MAY 1997

[6] Hamid R. Rategh, Hirad Samavati, and Thomas H. Lee,� A 5GHz, 1mW
CMOS Voltage Controlled Differential Injection Locked Frequency Divider�

[7] Mustafa Acar, Domine Leenaerts and Bram Nauta,� A Wide-Band CMOS
Injection-Locked Frequency Divider�