Hardware Description Manual

Cabinets
Table of Contents .........................................................................................

Chapter 1 Overview ......................................................................................
1.1 Structure ...........................................................................................
1.2 Composition ......................................................................................
1.2.1 Power Distribution Box .............................................................
1.2.2 Subrack ....................................................................................
1.2.3 Cable Trough ............................................................................
1.2.4 Fan Box ....................................................................................
1.2.5 Air Deflector ..............................................................................
1.2.6 Fiber Management Tray ...........................................................
Chapter 2 CCTR ...........................................................................................
2.1 Configuration Principles ....................................................................
2.2 Structure ...........................................................................................
Chapter 3 CBUR ..........................................................................................
3.1 Configuration Principles ....................................................................
3.2 Structure ...........................................................................................
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1-4
1-6
1-7
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2-1
2-1
3-1
3-1
3-1
Subracks
Chapter 1 Overview ......................................................................................
1.1 Functions and Classification of Subracks .........................................
1.2 Composition ......................................................................................
1.2.1 Components .............................................................................
1.2.2 Backplane .................................................................................
1.3 Switching Subrack ............................................................................
1.3.1 Backplane .................................................................................
1.3.2 Cable Connection .....................................................................
1.4 Service Subrack ................................................................................
1.4.1 Backplane .................................................................................
1.4.2 DIP Switch ................................................................................
1.4.3 Cable Connection .....................................................................
Chapter 2 CSWS ..........................................................................................
2.1 Overview ...........................................................................................
2.2 Configuration .....................................................................................
2.3 External Interface ..............................................................................
Chapter 3 CIPS ............................................................................................
3.1 Overview ...........................................................................................
3.2 Configuration .....................................................................................
3.2.1 1X Service Processing Entity ...................................................
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3-1
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3-1
3.2.2 1xEV-DO Service Processing Entity .........................................

3.2.1 CDMA2000 1X/1xEV-DO Service Integrated Processing
Entity ..................................................................................................
Chapter 4 CRPS ...........................................................................................
4.1 Overview ...........................................................................................
4.2 Configuration .....................................................................................
Chapter 5 CPMS ..........................................................................................
5.1 Overview ...........................................................................................
5.2 Configuration .....................................................................................
3-2
3-3
3-4
4-1
4-1
4-1
4-2
5-1
5-1
5-1
5-2
Boards
Chapter 1 Introduction to the Boards ...........................................................
1.1 Functional Boards .............................................................................
1.2 Board Structure .................................................................................
1.2.1 Board Panels ............................................................................
1.2.2 IC Boards ..................................................................................
Chapter 2 CMUX ..........................................................................................
2.1 Functions and Operating Principles ..................................................
2.1.1 Functions ..................................................................................
2.1.2 Operating Principles .................................................................
2.2 Panel Descriptions ............................................................................
2.3 Technical Indices ..............................................................................
Chapter 3 CRMU ..........................................................................................
3.1.1 Functions ..................................................................................
Chapter 4 CPCU ..........................................................................................
4.1.1 Functions ..................................................................................
Chapter 5 CPPU ...........................................................................................
5.1.1 Functions ..................................................................................
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Chapter 6 CBPU ...........................................................................................
6.1.1 Functions ..................................................................................
Chapter 7 CHAC ..........................................................................................
7.1.1 Functions ..................................................................................
Chapter 8 CBIE ............................................................................................
8.1.1 Functions ..................................................................................
8.3 DIP Switches .....................................................................................
Chapter 9 CMPU ..........................................................................................
9.1.1 Functions ..................................................................................
Chapter 10 CNET .........................................................................................
10.1 Functions and Operating Principles ................................................
10.1.1 Functions ................................................................................
10.1.2 Operating Principles ...............................................................
10.2 Panel Descriptions ..........................................................................
10.3 Technical Indices ............................................................................
Chapter 11 CLPC .........................................................................................
11.1.1 Functions ................................................................................
Chapter 12 CFMR ........................................................................................
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6-3
6-5
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12.1.1 Functions ................................................................................
Chapter 13 CSPU .........................................................................................
13.1.1 Functions ................................................................................
Chapter 14 CLAP .........................................................................................
14.1.1 Functions ................................................................................
Chapter 15 CEVC and CEVD .......................................................................
15.1.1 Functions ................................................................................
Chapter 16 CIWF .........................................................................................
16.1.1 Functions ................................................................................
Chapter 17 CAIE ..........................................................................................
17.1.1 Functions ................................................................................
17.3 DIP Switches ...................................................................................
Chapter 18 CSTU .........................................................................................
18.1.1 Functions ................................................................................
12-1
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12-2
12-3
12-4
13-1
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13-1
13-1
13-3
13-5
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17-6
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18-3

Chapter 19 GCKP ........................................................................................
19.1.1 Functions ................................................................................
19.1.2 Operating principles ................................................................
Chapter 20 GCKB ........................................................................................
Chapter 21 Boards in Power Distribution Box ..............................................
21.1 Overview .........................................................................................
21.1.1 Appearance ............................................................................
21.1.2 Functions and Operating Principles ........................................
21.1.3 System Design .......................................................................
21.1.4 Technical Specifications .........................................................
21.2 XPSU ..............................................................................................
21.2.2 Panel Descriptions..................................................................
21.2.3 DIP Switches ..........................................................................
21.3 XSPB ..............................................................................................
21.3.1 Panel Descriptions..................................................................
21.3.2 Technical Indices ....................................................................
21.4 XLPB ...............................................................................................
21.4.2 Technical Indices ....................................................................
18-4
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21-12
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21-14
Cables
Chapter 1 Network Cable .............................................................................
1.1 Overview of Network Cable ..............................................................
1.2 Structure ...........................................................................................
Chapter 2 Optical Fiber ................................................................................
2.1 Overview of Optical Fiber..................................................................
2.2 Structure ...........................................................................................
Chapter 3 Trunk Cable .................................................................................
3.1 75-Ohm Coaxial Cables ....................................................................
3.2 E1/T1 Twisted Pairs ..........................................................................
Chapter 4 Alarm Box Signal Cable...............................................................
4.1 Overview of Alarm Box Signal Cable ................................................
4.2 Structure ...........................................................................................
Chapter 5 Satellite Input Signal Cable of CLKM ..........................................
11-1
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3-3
4
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5
5.1 Overview of CLKM Satellite Input Signal Cable ................................

5.2 Structure ...........................................................................................
Chapter 6 Clock Output Signal Cable of CLKM ...........................................
6.1 Overview of CLKM Clock Output Signal Cable .................................
6.2 Structure ...........................................................................................
Chapter 7 Reference Clock Input Signal Cable of CLKM .............................
7.1 Overview of CLKM Reference Clock Input Signal Cable ..................
7.2 Structure ...........................................................................................
Chapter 8 Power-Distribution-Box/Fan-Box Monitoring Signal Cable ..........
8.1 Overview of PDB/Fan-Box Monitoring Signal Cable .........................
8.2 Structure ...........................................................................................
Chapter 9 Fan-Box Monitoring Signal Cable ................................................
9.1 Overview of Fan-Box Monitoring Signal Cable .................................
9.2 Structure ...........................................................................................
Chapter 10 Cascading Signal Cable of Power Distribution Subrack ............
10.1 Overview of Cascading Signal Cable of Power Distribution
Subrack ...................................................................................................
10.2 Structure .........................................................................................
Chapter 11 Subrack Internal Signal Cable ...................................................
11.1 Overview of Subrack Internal Signal Cable ....................................
11.2 Structure .........................................................................................
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Appendix
Appendix A Abbreviations and Acronyms ....................................................
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A-1
HUAWEI
1.Cabinets
2.Subracks
3.Boards
4.Cables
5.Appendix
Airbridge cBSC6600 CDMA Base Station Controller

Hardware Description Manual
V200R001

Manual Version
T2-032505-20040820-C-2.11
Product Version
V200R001
BOM
31250205
Huawei Technologies Co., Ltd. provides customers with comprehensive technical support
and service. Please feel free to contact our local office or company headquarters.
Huawei Technologies Co., Ltd.

Address: Administration Building, Huawei Technologies Co., Ltd.,
Bantian, Longgang District, Shenzhen, P. R. China
Postal Code: 518129
Website: http://www.huawei.com
Email: support@huawei.com
Copyright 2004 Huawei Technologies Co., Ltd.
All Rights Reserved

No part of this manual may be reproduced or transmitted in any form or by any
means without prior written consent of Huawei Technologies Co., Ltd.
Trademarks
, HUAWEI, C&C08, EAST8000, HONET,
, ViewPoint, INtess, ETS, DMC,
TELLIN, InfoLink, Netkey, Quidway, SYNLOCK, Radium,

M900/M1800,
TELESIGHT, Quidview, Musa, Airbridge, Tellwin, Inmedia, VRP, DOPRA, iTELLIN,
HUAWEI OptiX, C&C08 iNET, NETENGINE, OptiX, iSite, U-SYS, iMUSE, OpenEye,
Lansway, SmartAX, infoX, TopEng are trademarks of Huawei Technologies Co.,
Ltd.
All other trademarks mentioned in this manual are the property of their respective
holders.
Notice
The information in this manual is subject to change without notice. Every effort has
been made in the preparation of this manual to ensure accuracy of the contents, but
all statements, information, and recommendations in this manual do not constitute
the warranty of any kind, express or implied.
About This Manual

Release Notes
The manual applies to Airbridge cBSC6600 CDMA Base Station Controller V200R001.
Related Manuals
The related manuals are listed in the following table.
Manual
Content
Airbridge cBSC6600 CDMA Base

Station Controller Compliance and
Safety Manual
Describes regulatory compliance statement and regulatory

compliance information of the cBSC6600, and safety
information needed to install and maintain the equipment.

Station Controller Technical
Manual-System Description
Introduces the development of the CDMA network, and the

product features, system configuration, system functions,
related operation and maintenance, and technical
specifications of the cBSC6600.

Manual-System Architecture
Describes the general architecture of the cBSC6600, the

subracks, clock system, O&M system, and power supply
system, and signal flows.

Manual-Interfaces and Protocols
Details the external interfaces, related protocols and

standards, and typical service flows for the cBSC6600.

Manual-System Function
Introduces the networking capacity, radio channel

management, power control, handoff decision, performance
management, alarm management, dynamic configuration, and
reliability design of the cBSC6600.

Station Controller Hardware
Description Manual
Details the structures and working principles of the cables,

boards, subracks, and cabinets of the cBSC6600.

Station Controller Installation
Manual-Hardware Installation
Covers the hardware installation of the cBSC6600.

Station Controller Installation
Manual-Software Installation
Describes the software installation of the cBSC6600.

Station Controller Operation
Manual-Data Configuration
Covers the data configuration of the cBSC6600.

Station Controller Maintenance
Describes contents and methods of routine maintenance over

the cBSC6600.
Manual
Content
Manual-Routine Maintenance
Manual-Troubleshooting
Details the troubleshooting for the cBSC6600.

Manual-Parts Replacement
Presents procedures and methods of replacing boards and

components of the cBSC6600.
Organization
This manual is divided into five modules, covering the following contents:
z
Module 1 Cabinets describes the composition and structure of the cabinet.
Module 2 Subracks describes the basic structure and configuration of each

subrack.
Module 3 Boards describes the working principles, panel, and technical indices
of the major boards in the BSC system.

z
Module 4 Cables describes basic structure of the major cables.
Module 5 Appendix describes the abbreviations and acronyms used in the

manual.
Intended Audience
The manual is intended for the following readers:
z
Installation engineers and technicians
Operation and maintenance personnel
Conventions
The manual uses the following conventions:
I. General conventions
Convention
Description
Arial
Normal paragraphs are in Arial.
Arial Narrow
Warnings, Cautions, Notes and Tips are in Arial Narrow.
Boldface
Headings are in Boldface.
Courier New
Terminal Display is in Courier New.
II. Command conventions

Convention
Description
Boldface
The keywords of a command line are in Boldface.
italic
Command arguments are in italic.
[]
Items (keywords or arguments) in square brackets [ ] are optional.
{ x | y | ... }
Alternative items are grouped in braces and separated by vertical bars.

One is selected.
[ x | y | ... ]
Optional alternative items are grouped in square brackets and separated

by vertical bars. One or none is selected.
{ x | y | ... } *
Alternative items are grouped in braces and separated by vertical bars. A

minimum of one or a maximum of all can be selected.
[ x | y | ... ] *
Optional alternative items are grouped in square brackets and separated

by vertical bars. Many or none can be selected.
III. GUI conventions

Convention
Description
<>
Button names are inside angle brackets. For example, click the <OK>
button.
[]
Window names, menu items, data table and field names are inside square
brackets. For example, pop up the [New User] window.
Multi-level menus are separated by forward slashes. For example,

[File/Create/Folder].
IV. Keyboard operation

Format
Description
<Key>
Press the key with the key name inside angle brackets. For example,
<Enter>, <Tab>, <Backspace>, or <A>.
<Key1+Key2>
Press the keys concurrently. For example, <Ctrl+Alt+A> means the three
keys should be pressed concurrently.
<Key1, Key2>
Press the keys in turn. For example, <Alt, A> means the two keys should
be pressed in turn.
V. Mouse operation
Action
Click
Description
Press the left button or right button quickly (left button by default).
Action
Description
Double Click
Press the left button twice continuously and quickly.
Drag
Press and hold the left button and drag it to a certain position.
VI. Symbols
Eye-catching symbols are also used in the manual to highlight the points worthy of
special attention during the operation. They are defined as follows:
Caution: means reader be extremely careful during the operation.

Note: means a complementary description.

Table of Contents
Table of Contents
Cabinets
Chapter 1 Overview ....................................................................................................................... 1-1
1.1 Structure ............................................................................................................................ 1-1
1.2 Composition ....................................................................................................................... 1-2
1.2.1 Power Distribution Box............................................................................................ 1-3
1.2.2 Subrack ................................................................................................................... 1-3
1.2.3 Cable Trough........................................................................................................... 1-3
1.2.4 Fan Box ................................................................................................................... 1-4
1.2.5 Air Deflector............................................................................................................. 1-6
1.2.6 Fiber Management Tray.......................................................................................... 1-7
Chapter 2 CCTR ............................................................................................................................. 2-1
2.1 Configuration Principles..................................................................................................... 2-1
2.2 Structure ............................................................................................................................ 2-1
Chapter 3 CBUR............................................................................................................................. 3-1
3.2 Structure ............................................................................................................................ 3-1
Subracks
1.1 Functions and Classification of Subracks.......................................................................... 1-1
1.2 Composition ....................................................................................................................... 1-1
1.2.1 Components ............................................................................................................ 1-1
1.2.2 Backplane................................................................................................................ 1-2
1.3 Switching Subrack ............................................................................................................. 1-3
1.3.1 Backplane................................................................................................................ 1-3
1.3.2 Cable Connection.................................................................................................... 1-5
1.4 Service Subrack................................................................................................................. 1-6
1.4.1 Backplane................................................................................................................ 1-6
1.4.2 DIP Switch............................................................................................................... 1-8
Chapter 2 CSWS ............................................................................................................................ 2-1
2.1 Overview ............................................................................................................................ 2-1
2.2 Configuration...................................................................................................................... 2-1
2.3 External Interface............................................................................................................... 2-2

Table of Contents
Chapter 3 CIPS............................................................................................................................... 3-1

3.1 Overview ............................................................................................................................ 3-1
3.2 Configuration...................................................................................................................... 3-1
3.2.1 1X Service Processing Entity .................................................................................. 3-1
3.2.2 1xEV-DO Service Processing Entity ....................................................................... 3-2
3.2.1 CDMA2000 1X/1xEV-DO Service Integrated Processing Entity............................. 3-3
Chapter 4 CRPS ............................................................................................................................. 4-1
4.1 Overview ............................................................................................................................ 4-1
4.2 Configuration...................................................................................................................... 4-1
Chapter 5 CPMS............................................................................................................................. 5-1
5.1 Overview ............................................................................................................................ 5-1
5.2 Configuration...................................................................................................................... 5-1
Boards
Chapter 1 Introduction to the Boards.......................................................................................... 1-1
1.1 Functional Boards .............................................................................................................. 1-1
1.2 Board Structure.................................................................................................................. 1-1
1.2.1 Board Panels........................................................................................................... 1-2
1.2.2 IC Boards ................................................................................................................ 1-2
Chapter 2 CMUX ............................................................................................................................ 2-1
2.1 Functions and Operating Principles................................................................................... 2-1
2.1.1 Functions................................................................................................................. 2-1
2.1.2 Operating Principles................................................................................................ 2-1
2.2 Panel Descriptions ............................................................................................................. 2-4
2.3 Technical Indices ............................................................................................................... 2-5
Chapter 3 CRMU ............................................................................................................................ 3-1
3.1.1 Functions................................................................................................................. 3-1
Chapter 4 CPCU............................................................................................................................. 4-1
4.1.1 Functions................................................................................................................. 4-1
ii

Table of Contents
Chapter 5 CPPU ............................................................................................................................. 5-1

5.1.1 Functions................................................................................................................. 5-1
Chapter 6 CBPU............................................................................................................................. 6-1
6.1.1 Functions................................................................................................................. 6-1
Chapter 7 CHAC............................................................................................................................. 7-1
7.1.1 Functions................................................................................................................. 7-1
Chapter 8 CBIE .............................................................................................................................. 8-1
8.1.1 Functions................................................................................................................. 8-1
8.3 DIP Switches...................................................................................................................... 8-5
Chapter 9 CMPU ............................................................................................................................ 9-1
9.1.1 Functions................................................................................................................. 9-1
Chapter 10 CNET ......................................................................................................................... 10-1
10.1 Functions and Operating Principles............................................................................... 10-1
10.1.1 Functions............................................................................................................. 10-1
10.1.2 Operating Principles............................................................................................ 10-2
10.2 Panel Descriptions ......................................................................................................... 10-4
10.3 Technical Indices ........................................................................................................... 10-6
Chapter 11 CLPC ......................................................................................................................... 11-1
11.1.1 Functions............................................................................................................. 11-1
iii

Table of Contents

Chapter 12 CFMR......................................................................................................................... 12-1
12.1.1 Functions............................................................................................................. 12-1
Chapter 13 CSPU ......................................................................................................................... 13-1
13.1.1 Functions............................................................................................................. 13-1
Chapter 14 CLAP ......................................................................................................................... 14-1
14.1.1 Functions............................................................................................................. 14-1
Chapter 15 CEVC and CEVD ...................................................................................................... 15-1
15.1.1 Functions............................................................................................................. 15-1
Chapter 16 CIWF.......................................................................................................................... 16-1
16.1.1 Functions............................................................................................................. 16-1
Chapter 17 CAIE .......................................................................................................................... 17-1
17.1.1 Functions............................................................................................................. 17-1
17.3 DIP Switches.................................................................................................................. 17-4
iv

Table of Contents
Chapter 18 CSTU ......................................................................................................................... 18-1

18.1.1 Functions............................................................................................................. 18-1
Chapter 19 GCKP......................................................................................................................... 19-1
19.1.1 Functions............................................................................................................. 19-1
19.1.2 Operating principles ............................................................................................ 19-1
Chapter 20 GCKB ........................................................................................................................ 20-1
Chapter 21 Boards in Power Distribution Box ......................................................................... 21-1
21.1 Overview ........................................................................................................................ 21-1
21.1.1 Appearance ......................................................................................................... 21-1
21.1.2 Functions and Operating Principles .................................................................... 21-2
21.1.3 System Design .................................................................................................... 21-3
21.1.4 Technical Specifications...................................................................................... 21-5
21.2 XPSU ............................................................................................................................. 21-6
21.2.2 Panel Descriptions .............................................................................................. 21-8
21.2.3 DIP Switches ....................................................................................................... 21-9
21.3 XSPB ........................................................................................................................... 21-10
21.3.1 Panel Descriptions ............................................................................................ 21-10
21.3.2 Technical Indices .............................................................................................. 21-12
21.4 XLPB............................................................................................................................ 21-13
21.4.1 Functions and Operating Principles .................................................................. 21-13
Cables
Chapter 1 Network Cable.............................................................................................................. 1-1
1.1 Overview of Network Cable ............................................................................................... 1-1
1.2 Structure ............................................................................................................................ 1-1
Chapter 2 Optical Fiber................................................................................................................. 2-1
2.1 Overview of Optical Fiber .................................................................................................. 2-1
2.2 Structure ............................................................................................................................ 2-1
Chapter 3 Trunk Cable .................................................................................................................. 3-1
3.1 75-Ohm Coaxial Cables..................................................................................................... 3-1
v

Table of Contents
3.2 E1/T1 Twisted Pairs........................................................................................................... 3-3

Chapter 4 Alarm Box Signal Cable .............................................................................................. 4-1
4.1 Overview of Alarm Box Signal Cable................................................................................. 4-1
4.2 Structure ............................................................................................................................ 4-1
Chapter 5 Satellite Input Signal Cable of CLKM......................................................................... 5-1
5.1 Overview of CLKM Satellite Input Signal Cable ................................................................ 5-1
5.2 Structure ............................................................................................................................ 5-1
Chapter 6 Clock Output Signal Cable of CLKM.......................................................................... 6-1
6.1 Overview of CLKM Clock Output Signal Cable ................................................................. 6-1
6.2 Structure ............................................................................................................................ 6-1
Chapter 7 Reference Clock Input Signal Cable of CLKM .......................................................... 7-1
7.1 Overview of CLKM Reference Clock Input Signal Cable................................................... 7-1
7.2 Structure ............................................................................................................................ 7-1
Chapter 8 Power-Distribution-Box/Fan-Box Monitoring Signal Cable..................................... 8-1
8.1 Overview of PDB/Fan-Box Monitoring Signal Cable ......................................................... 8-1
8.2 Structure ............................................................................................................................ 8-1
Chapter 9 Fan-Box Monitoring Signal Cable .............................................................................. 9-1
9.1 Overview of Fan-Box Monitoring Signal Cable.................................................................. 9-1
9.2 Structure ............................................................................................................................ 9-1
Chapter 10 Cascading Signal Cable of Power Distribution Subrack ..................................... 10-1
10.1 Overview of Cascading Signal Cable of Power Distribution Subrack............................ 10-1
10.2 Structure ........................................................................................................................ 10-1
Chapter 11 Subrack Internal Signal Cable................................................................................ 11-1
11.1 Overview of Subrack Internal Signal Cable ................................................................... 11-1
11.2 Structure ........................................................................................................................ 11-1
Appendix
Appendix A Abbreviations and Acronyms ...........................................................................A-1
vi
HUAWEI
Airbridge cBSC6600 CDMA Base Station

Controller
Cabinets

Cabinets
Table of Contents
Table of Contents
1.1 Structure ............................................................................................................................ 1-1
1.2 Composition ....................................................................................................................... 1-2
1.2.1 Power Distribution Box............................................................................................ 1-3
1.2.2 Subrack ................................................................................................................... 1-3
1.2.3 Cable Trough........................................................................................................... 1-3
1.2.4 Fan Box ................................................................................................................... 1-4
1.2.5 Air Deflector............................................................................................................. 1-6
1.2.6 Fiber Management Tray.......................................................................................... 1-7
Chapter 2 CCTR ............................................................................................................................. 2-1
2.2 Structure ............................................................................................................................ 2-1
Chapter 3 CBUR............................................................................................................................. 3-1
3.2 Structure ............................................................................................................................ 3-1

Cabinets
Chapter 1 Overview
Chapter 1 Overview
This chapter introduces the outlook and composition of the BSC cabinet.
1.1 Structure
Huawei cBSC6600 system uses B68-21 cabinet, complying with IEC297 and IEEE.
The cBSC6600 is designed in modular structure to facilitate product expansion and
maintenance. It features interference-free realized through electromagnetic shielding
interface.
Figure 1-1 shows the outlook of the cabinet.
Figure 1-1 B68-21 cabinet (unit: mm)
1-1

Cabinets
Chapter 1 Overview
The following lists the technical specifications of the cabinet:

z
Outer dimensions: 2100 mm % 600 mm % 800 mm (height % width % depth)
Available height inside the cabinet: 40 U
Weight: 135 kg when empty, and not heavier than 350 kg when fully configured
Cabinet cabling mode: Upward and downward cabling, and front and back cabling
Subracks, fan boxes, air deflectors and boards are all inserted from the front of the
cabinet
Note:
1U is equal to 1.75 inches, that is, 44.45 mm. It is the height unit defined in the IEC297 standard.
1.2 Composition
Figure 1-2 shows the composition of the BSC cabinet.
(1) Air deflector

(4) Subrack
(2) Fan box

(5) Power distribution box
Figure 1-2 Composition of BSC cabinet
1-2
(3) Cable trough

Cabinets
Chapter 1 Overview
The BSC cabinets are classified into CDMA BSC business rack (CBUR) and CDMA
BSC control rack (CCTR) according to their functions and applications. Both the CBUR
and the CCTR use the B68-21 cabinet. However, the compositions of the CBUR and
CCTR differ in internal parts.
For detailed information of CBUR and CCTR, refer to Chapter 2 and Chapter 3.
1.2.1 Power Distribution Box

The power distribution box of the B68-21 cabinet is installed on the top of the cabinet.
The power distribution box leads in two 48 V power supplies, and outputs four groups
of 48 V power for functional subracks in the cabinet. The power distribution box
provides internal lightning protection and over-current protection. It also detects the
input voltage and the state of the output power, and sends out alarm signals when
faults occur.
The height and the depth of the power distribution box are 2 U and 420 mm
respectively.
For operating principles and detailed information about the boards of the power
distribution box, see the module Boards.
1.2.2 Subrack
The subrack is designed to integrate all the boards in it through the backplane to form a
standalone unit.
The BSC subracks are classified into the CDMA switch subrack (CSWS) and the
service subrack according to their functions and applications.
For details, see the module Subrack.
1.2.3 Cable Trough

The cable trough is used to separate the cables led out from the front of the subracks to
both sides of the cabinet. It also functions to maintain a congestion-free air duct.
The height of the cable trough is 1 U.
Figure 1-3 shows the outlook of the cable trough.
1-3

(1) Plastic cable trough
Cabinets
Chapter 1 Overview
(2) Hanger
Figure 1-3 Cable trough
1.2.4 Fan Box

In the BSC cabinet, a fan box is installed below each subrack with its own air duct.
The fan boxes adopt the front air inlet and back air outlet to guarantee speedy airflow
among the boards.
The height and the depth of the fan box are 1 U and 420 mm respectively. Each fan box
is configured has six fans, each of which is 120 mm in diameter and 38 mm in
thickness.
Figure 1-4 shows the outlook of the fan box.
(1) Enclosure of the fan box

(4) Panel shield of the fan box
(7) Hanger
(2) Face shield of the fan box

(5) Pressing direction indication of the handle
(8) Fan
Figure 1-4 Fan box

1-4
(3) Indicator
(6) Handle

Cabinets
Chapter 1 Overview
Figure 1-5 shows the positions of DIP switches of a fan box.
Figure 1-5 Positions of DIP switches

The fan monitoring board address depends on the setting of DIP switch SW2 on the fan
box. The monitoring information of XPSU and the fan monitoring board are both
reported to the BAM through CMUXs. Therefore, you must set different addresses for
the XPSU and the fan monitoring board monitored by the same CMUX. The addresses
"0", "1", and "2" are available. The address of the CSWS fan monitoring board is set to
"2" permanently, and the other fan monitoring board is set to "1" permanently. The
XPSU address can be "0" or "2".
Table 1-1shows the ON/OFF state of SW2 bits, when the fan monitoring board address
is "1" or "2".
Table 1-1 ON/OFF state of SW2 bits
Bit
State of "1"
ON
ON
ON
OFF
State of "2"
ON
ON
OFF
ON
The SW3 bits have four settings. Each setting depends on the operational state of the
fan monitoring board.
The operational state of the fan monitoring board include fixed low speed operational
state, fixed high speed operational state, inboard temperature controlled, and
controlling operational state. Controlling operational state is the default.
1-5

z
Cabinets
Chapter 1 Overview
Fixed low speed operational state: The fan works at 70% of rated power. In this
state, the controlling party cannot perform any operation on the serial port of the
board. Table 1-2 shows the corresponding ON/OFF state of SW3 bits.

Bit
State
OFF
OFF
ON
ON/OFF
Fixed high speed operational state: The fan works at 1005 of rated power. In this
state, the controlling party cannot perform any operation on the serial port of the
board. Table 1-3 shows the corresponding ON/OFF state of SW3 bits

Bit
State
OFF
OFF
OFF
ON/OFF
Inboard temperature controlled operational state: The fan monitoring board

controls the fan rotating speed by collecting the temperature data provided by an
inboard temperature sensor. In this state, the controlling party cannot perform any
operation on the serial port of the board. Table 1-4 shows the corresponding
ON/OFF state of SW3 bits.

Bit
State
OFF
ON
ON/OFF
ON/OFF
Controlling operational state: The operational state of the fan monitoring board is
controlled by the control information issued through the serial port. The board can
be configured with a rotating speed in the range from 70% of rated power to 100%.
Table 1-5 shows the corresponding ON/OFF state of SW3 bits.

Bit
State
ON
ON/OFF
ON/OFF
ON/OFF
1.2.5 Air Deflector

The air deflector is located in the lower part of the fan box, serving as the front air inlet
of the upper subrack and the back air outlet of the lower subrack.
1-6

Cabinets
Chapter 1 Overview
Each subrack has its own air duct for heat dissipation. In front of the air deflector is a
plastic panel, which is full of air intake vents. The rear frame isolates the air ducts of the
modules, ensuring separate and congestion-free air ducts.
The height of the air deflector is 2 U.
Figure 1-6 shows the outlook of the air deflector.
(1) Enclosure
(4) Plastic ventilation panel
(2) Slanting air deflector

(5) Installing direction indication
(3) Hanger
(6) Air intake indication
Figure 1-6 Air deflector
1.2.6 Fiber Management Tray

The fiber management tray is installed on the front column of the cabinet, used to coil
up the extra optical fibers.
Figure 1-7 shows the outlook of the fiber management tray.
Figure 1-7 Fiber management tray
1-7

Cabinets
Chapter 2 CCTR
Chapter 2 CCTR
This chapter introduces the configuration principles of control subracks and the
functions of all parts in the CDMA control rack (CCTR).
2.1 Configuration Principles

One BSC system can be configured with only one CCTR. The configuration principles
of control subracks are as follows:
z
Small-capacity BSC: The CDMA resource and packet subrack (CRPS) and CDMA
integrated processing subrack (CIPS) are configured.
Large-capacity BSC: The CRPS and CDMA switching subrack (CSWS) are
configured.
2.2 Structure
Figure 2-1 shows assembly diagram of the CCTR.
2-1

(1) Dummy panel

(4) Subrack
(7) Cabling tray
(10) Cabling frame
Cabinets
Chapter 2 CCTR
(2) Cable trough

(5) Air deflector
(8) Clock processing module (CLKM)
(11) KVM 3 in 1
(3) Fan box

(6). BAM server
(9) LAN switch
Figure 2-1 CCTR assembly diagram

As shown in Figure 2-1, the CCTR consists of the following parts:
I. Power distribution box

See the module Boards of this manual.
II. Subrack
See the module Subracks of this manual.
III. Cable trough

See the module Cabinets of this manual.
2-2

Cabinets
Chapter 2 CCTR
IV. Fan box

V. Air deflector
VI. KVM control platform

The KVM control platform integrates functions of a keyboard, touch pad mouse, and
monitor. It is 1 U high when folded. It can be connected with a computer or server
directly, or with multiple computers or servers through the KVM switch. The KVM
control platform helps to implement the functions related to the monitor, keyboard, and
mouse.
The KVM control platform can automatically control the on-off operation of the power
supply. When the LCD is pulled out, the power is switched on; when it is put into the
cabinet after folded, the power is switched off.
1)
Outlook
Figure 2-2 shows the outlook of the KVM control platform.
Figure 2-2 Outlook of the KVM control platform

2)
Front panel
Figure 2-3 shows the front panel of the KVM platform.
Figure 2-3 Front panel of the KVM control platform

3)
Rear panel
2-3

Cabinets
Chapter 2 CCTR
Figure 2-4 shows the rear panel of the KVM control platform.
(1) Power interface
(2) KVM interface
Figure 2-4 Rear panel of the KVM control platform
VII. LAN Switch

The S3026C LAN switch is used in the BSC system. It provides 10 Mbps/100 Mbps
adaptive full-duplex Ethernet ports and the virtual LAN (VLAN) function. When the
CDMA high-speed access controller (CHAC) is configured in the CRPS or the CPMS,
the LAN switch is configured with the Gigabit single-mode optical interface unit for the
communication between the BSC and the PDSN.
The S3026C LAN Switch complies with the IEC297 standard. It is 1 U in height and its
outer dimensions are 436 mm (W) 42 mm (H) 338 mm (D). Its input voltage ranges
from 48 V DC to 60 V DC.
1)
Appearance
Figure 2-5 shows an S3026C LAN switch.
Figure 2-5 S3026C LAN switch

2)
Front panel
Figure 2-6 illustrates the front panel of the S3026C LAN switch.
(1)
(1) Power indicator (POWER)
(3)
(2)
(2) Network port
(3) Configuration port (CONSOLE)
Figure 2-6 Front panel of S3026C LAN switch

The Ethernet port is a standard RJ-45 connector. There are status indicators on the
front panel, which are defined as follows:
2-4

Cabinets
Chapter 2 CCTR
Table 2-1 Meaning of Ethernet interface indicators on the S3026C LAN switch
Indicator
Power indicator
10Base-T/100BaseTX
interface
indicator
Mark
Status
POWER
LINK/ACTIVE
(Orange)
Speed (Green)
Meaning
On
The LAN switch is powered on.
Off
The LAN switch is powered off.
On
The connection is normal.
Off
The interface is not connected with any

equipment.
Blinking
The data transmitting or receiving is on-going.
On
100 Mbps operational mode
Off
10 Mbps operational mode
The S3026C LAN switch provides a configuration port (CONSOLE) in compliance with
the EIA/TIA-232 asynchronous serial port specifications. With this Console interface,
the user can complete the local configuration of the LAN switch. Table 2-2 shows the
attributes of the Console.
Table 2-2 Attributes of the Console
Attribute
Description
Type of the connector
RJ-45
Interface standard
EIA/TIA-232 asynchronous serial port specifications
Baud rate
9600 bps (default)

z
Services supported
3)
Support the connection with the character terminal

Support the connection with the serial port of the local terminal or the
PC and allow operating the terminal emulation program on the PC.
Rear panel
Figure 2-7 illustrates the rear panel of the S3026C LAN switch.
Figure 2-8 shows a 1-port 1000Base- LX module.
(1) DC power switch
(2) DC power socket
Figure 2-7 Rear panel of S3026C LAN switch
2-5
(3) Grounding bolt

Cabinets
Chapter 2 CCTR
Class 1 Laser Product

1000BASE-LX
MM MODULE
LINK
ACTIVE
TX
RX
Figure 2-8 Panel of the 1-port 1000Base- LX module

Table 2-3 lists the indicators on the panel of the 1-port 1000Base- LX module.
Table 2-3 Indicators of the 1-port 1000Base- LX module
Indicator
Status description
LINK
When it is off, it means the link is disconnected. When it is on, it means the link is
connected.
ACTIVE
When it is off, it means no data is transmitted or received. When it blinks, it means the
data transmitting or receiving is on going.
Note:
For details about the S3026C LAN Switch, see the S3026C LAN Switch Installation Manual.
VIII. Cabling tray

The cabling tray is configured between the active and standby LAN switches in the
CCTR, providing spaces for the cable layout of the two LAN switches.
Figure 2-9 shows a cabling tray.
Figure 2-9 Cabling tray
IX. CLKM
The CLKM receives satellite synchronization clock signals and outputs timing signals to
the CRPS as a clock reference source.
1)
Appearance
2-6

Cabinets
Chapter 2 CCTR
Figure 2-10 shows the appearance of a CLKM.
Figure 2-10 CLKM

2)
Front panel
Figure 2-11 shows the front panel of the CLKM.
(1)
(2)
(1) Indicator
(4) Input port of the slave clock
reference source
(3)(4)(5) (6)
(2) Commissioning serial

port
(5) Output interface for 2
MHz test clock
(1)
(2)
(3)(4)(5) (6)
(3) Input port of the master clock reference

source
(6) GPS/GLONASS satellite antenna interface
Figure 2-11 Front panel of CLKM

3)
Rear panel
Figure 2-12 shows the rear panel of the CLKM.
(1) DC power input socket

(2) Output interface for PP16S/8 kHz clock signal
(3) Satellite time information output port/CLKM maintenance serial port
(4) Loading network interface
(5) Grounding bolt
Figure 2-12 Rear panel of CLKM

For details about the CLKM, see the module Boards.
X. Cabling frame
The cabling frame is used to lead the coaxial cable connected to the CLKM from the
back of the cabinet to the front.
2-7

Cabinets
Chapter 2 CCTR
Complying with the IEC297 standard, the cabling frame is 1 U in height. It consists of a
frame body and a front cabling support. The frame body is used to bind the coaxial
cables.
Figure 2-13 shows the structure of a cabling frame.
Figure 2-13 Cabling frame
XI. BAM
The BAM implements operation and maintenance functions. It can communicate with
the Host via LAN, receive current information reported by the Host, and display the
operation result.
The BAM server complies with the IEC297 standard. It is 2 U in height and its outer
dimensions are 445 mm (W) 89 mm (H) 508 mm (D). Its input voltage ranges from
-48 V DC to -60 V DC.
1)
Appearance
Figure 2-14 shows the appearance of a BAM.
Figure 2-14 BAM

2)
Front panel
Figure 2-15 shows the front panel of the BAM.
2-8

Cabinets
Chapter 2 CCTR
Figure 2-15 Front view of BAM

Table 2-4 explains the layout of the BAM front panel.
Table 2-4 Layout of BAM front panel
Serial
No.
Silk-screen
mark
Description
(1)
Not
available
Front panel
(2)
Not
available
Peripheral
(3)
Not
available
Non-shielding switch. Press this switch and then the system will enter the
pause state and perform the fault diagnosis.
(4)
Power switch
(5)
Reset switch
CRT
CRT (Critical) indicator (yellow) is used to indicate alarms. When it is on, it

indicates that a critical fault exists in the current system and the system
cannot work normally.
(7)
MJR
MJR (Major) indicator (yellow) is used to indicate alarms. When it is on, it

indicates that a major fault exists in the current system while the system can
still work normally. However, the system performance will be substantially
degraded.
(8)
MNR
MNR (Minor) indicator (yellow) is used to indicate alarms. When it is on, it

indicates that a minor fault exists in the current system, but the system can
still work normally
(9)
PWR
PWR (Power) indicator (yellow) is used to indicate alarms. When it is on, it

indicates that the power supply is faulty.
(10)
Tx/Rx
Network interface card (NIC) running status indicator (green).
(6)
(11)
Hard disk drive (HDD) running status indicator (green)
2-9

Serial
No.
Cabinets
Chapter 2 CCTR
Silk-screen
mark
Description
Active power indicator (green). When it is on, it indicates that the current
system uses the DC power supply. When it is off, it indicates that the power
supply is shut down or a fault occurs to the power supply. When it flashes, it
indicates that the system is in the ACPI sleep mode.
(12)
(13)
Not
available
Removable screw
(14)
Not
available
Hard disk
3)
Rear panel
Figure 2-16 shows the rear panel of the BAM.
Figure 2-16 Rear panel of BAM

Table 2-5 explains the layout of the BAM rear panel.
Table 2-5 Layout of BAM rear panel
Serial
No.
Silk-screen
mark
Description
Not available
Half-length 64-bit, 66 MHz PCI expansion board slot (where 5 V riser

board is inserted)
Alarms
DB15 male socket used to connect the alarm relay on the front panel
Not available
Full length 64-bit, 33 MHz PCI expansion board slot (where 3.3 V riser
board is inserted)
Not available
Redundant power supply (hot swappable)
Not available
DC input power socket ( connected to the 48 V DC power supply,

while + to the GND)
USB port 1
Monitor interface
SCSI Ultra160 interface (68 pins)
2-10

Serial
No.
Cabinets
Chapter 2 CCTR
Silk-screen
mark
Description
10 Mbps/100 Mbps adaptive network card interface
10
Integrated interface for mouse and keyboard. With it, mouse and
keyboard can be connected with Y cables.
11
Serial port, adopting 8-pin RJ45 connector.
12
USB port 0
13
14
Not available
10Mbps/100Mbps adaptive network card interface

Grounding bolt
2-11

Cabinets
Chapter 3 CBUR
Chapter 3 CBUR
This chapter introduces the configuration principles of service subracks and the
functions of all parts in the CDMA BSC business rack (CBUR).
3.1 Configuration Principles

The CBUR can be configured according to the number of subscribers supported and
the service requirements. One CBUR can be configured with up to three service
subracks.
3.2 Structure
The CBUR uses the B68-21 cabinet. Figure 3-1 shows the assembly diagram of the
cabinet.
3-1

(1) Dummy panel

(4) CIPS
Cabinets
Chapter 3 CBUR
(2) Fan box

(5) Air deflector
(3) Cable trough

Figure 3-1 CBUR assembly diagram

The CBUR is composed of the following parts:
I. Power distribution box

See the module Boards of this manual.
II. Subrack
See the module Subracks of this manual.
III. Cable trough

See Chapter 1, Overview of the module Cabinets.
IV. Fan box

3-2

Cabinets
Chapter 3 CBUR
V. Air deflector
3-3
HUAWEI

Controller
Subracks

Subracks
Table of Contents
Table of Contents
1.1 Functions and Classification of Subracks.......................................................................... 1-1
1.2 Composition ....................................................................................................................... 1-1
1.2.1 Components ............................................................................................................ 1-1
1.2.2 Backplane................................................................................................................ 1-2
1.3 Switching Subrack ............................................................................................................. 1-3
1.3.1 Backplane................................................................................................................ 1-3
1.4 Service Subrack................................................................................................................. 1-6
1.4.1 Backplane................................................................................................................ 1-6
1.4.2 DIP Switch............................................................................................................... 1-8
Chapter 2 CSWS ............................................................................................................................ 2-1
2.1 Overview ............................................................................................................................ 2-1
2.2 Configuration...................................................................................................................... 2-1
Chapter 3 CIPS............................................................................................................................... 3-1
3.1 Overview ............................................................................................................................ 3-1
3.2 Configuration...................................................................................................................... 3-1
3.2.1 1X Service Processing Entity .................................................................................. 3-1
3.2.2 1xEV-DO Service Processing Entity ....................................................................... 3-2
3.2.1 CDMA2000 1X/1xEV-DO Service Integrated Processing Entity............................. 3-3
Chapter 4 CRPS ............................................................................................................................. 4-1
4.1 Overview ............................................................................................................................ 4-1
4.2 Configuration...................................................................................................................... 4-1
Chapter 5 CPMS............................................................................................................................. 5-1
5.1 Overview ............................................................................................................................ 5-1
5.2 Configuration...................................................................................................................... 5-1

Subracks
Chapter 1 Overview
Chapter 1 Overview
This chapter introduces the classification of subracks and the similarities and
differences of switching subracks and service subracks.
1.1 Functions and Classification of Subracks

A subrack integrates all the boards in it into a standalone functional unit through the
backplane.
According to different functions, BSC subracks can be divided into switching subracks
and service subracks. According to different boards used in subracks, service subracks
can be divided into CDMA integrated processing subrack (CIPS), CDMA resources and
packet subrack (CRPS), and CDMA packet module subrack (CPMS).
1.2 Composition
1.2.1 Components
The switching subrack and the service subrack are composed of the same components.
The service subrack contains 16 slots.
The switching subrack contains 15 slots. The slot for CNET is special and its width is
around 1.5 times of the common slot.
Figure 1-1 shows the composition of a BSC subrack.
1-1

(1) Rear cross beam

(4) Hanger
(7) Subrack top-bottom marker
(2) Shielding ventilated plate

(5) Guide rail
(8) Side panel
Subracks
Chapter 1 Overview
(3) Front cross beam

(6) Board
(9) Rear cover plate
Figure 1-1 Composition of the subrack

The subrack is 9 U in height and its dimensions are 400 mm (H) 482.6 mm (W) 420
mm (D).
The BSC subrack can ensure the electrical continuity of the subrack as a whole and the
shielding effect thanks to its standard shielding design. The subrack and the front panel
of the board are shielded from each other by using the conductive cloth. Two DC power
filters are installed at the back of the subrack, filtering the 48 V AC power to suppress
the conductive radiation of the power to modules
The shielding effect of the subrack can reach
z
30 230 MHz: 30 dB
230 1000 MHz: 20 dB
1.2.2 Backplane
Backplane is an important part of a subrack. Different boards in the same subrack are
connected through the printed circuits on the backplane. This substantially reduces the
cabling at the back of the backplane and improves the operational reliability of the
equipment.
The switching subrack and the service subrack have their own backplanes, which will
be detailed later.
1-2

Subracks
Chapter 1 Overview
1.3 Switching Subrack

1.3.1 Backplane
I. Structure
Figure 1-2 shows the structure of the backplane for the switching subrack.
1-3

Subracks
Chapter 1 Overview
Figure 1-2 Backplane structure of the switching subrack
1-4

Subracks
Chapter 1 Overview
II. COBA
The control path board (COBA) is an auxiliary board of the CSWS backplane. It is
connected with the backplane through an A-connector. The COBA provides fifteen
10/100 MHz Ethernet ports for the internal communication among the fifteen boards in
the CSWS.
1.3.2 Cable Connection

The CSWS is a standard 9 U shielding subrack. Figure 1-3 shows its internal cable
connection.
J151-154/J161-164/J181/J2: power sockets

1: Power cable of COBA
3: CSWS internal signal cable
5: 3-pin power cable
J171-J174: Signal cable sockets

2: GND/PGND connection cable of the backplane
4: Subrack internal power cable
6: GND and metal shielding board connection cable
Figure 1-3 CSWS internal connection
Caution:
The polarity of the power sockets (JP151/JP152/JP153/JP154) on the CSWS backplane is illustrated in
Figure 1-4. Be careful when connecting the power cable. Wrong connection may damage the backplane.
1-5

Subracks
Chapter 1 Overview
Figure 1-4 Power socket on the CSWS backplane
1.4 Service Subrack

1.4.1 Backplane
Figure 1-5 shows the structure of the backplane for the service subrack.
1-6

Subracks
Chapter 1 Overview
Figure 1-5 Backplane structure of service subrack
1-7

Subracks
Chapter 1 Overview
1.4.2 DIP Switch

The DIP switch S1 on the backplane has eight switches used to set the subrack No..
When the switch is set to On, it represents 0. Otherwise, it represents 1. Through the
setting of these eight switches, an 8-bit binary number is specified to represent the
subrack No..
For example, as the decimal number 3 becomes 00000011 when it is converted into
the binary number, the S1 should be set as shown in Figure 1-6 to represent subrack 3.
ON
ECE
S100
S107
S1
Figure 1-6 Setting S1 to represent subrack 3
1.4.3 Cable Connection

Figure 1-7 shows the internal connection of the service subrack.
JP2-JP4: Power sockets

43: Signal monitoring cable
JB8: D-connector
44.: Filter connection cable
42. Power cable
Figure 1-7 Internal connection of service subrack
Caution:
The polarity of the power sockets (JP2/JP3/JP4) on the backplane of the service subrack is illustrated in
Figure 1-8. It is different from those on the CSWS backplane. Be careful when connecting the power cable.
Wrong connection may burn the backplane.
1-8

Figure 1-8 Power socket on the backplane of the service subrack
1-9
Subracks
Chapter 1 Overview

Subracks
Chapter 2 CSWS
Chapter 2 CSWS
This chapter involves the following contents:
z
Functions of the CDMA switching subrack (CSWS)
Board types and slots in the CSWS
External interfaces provided by the CSWS
2.1 Overview
The CSWS is the ATM switching center of the BSC system, featuring a total switching
capacity of 25 GB. The interface board of the CSWS provides 155 Mbps SDH optical
interfaces or 155 Mbps ATM over SDH (STM-1) optical interfaces for the
communication between the CSWS and the service subracks.
2.2 Configuration
The CSWS Switching subrack, positioned at the lower part of the control cabinet, is
configured with the following boards:
z
CDMA main process unit (CMPU)
CDMA network transfer and switch (CNET)
CDMA line process unit with two 622 M engines (CLPC)
The CSWS contains fifteen slots. Figure 2-1 shows its board configuration.
C
M
P
U
C
M
P
U
C
L
P
C
C
L
P
C
C
L
P
C
C
L
P
C
C
L
P
C
C
N
E
T
C
N
E
T
C
L
P
C
C
L
P
C
C
L
P
C
C
L
P
C
C
L
P
C
C
L
P
C
9 10 11 12 13 14
Figure 2-1 Configuration of boards in the CSWS

The fifteen slots are grouped into three areas based on their features and functions:
2-1

z
Subracks
Chapter 2 CSWS
CMPU area: Slots 0 and 1, configured with CMPUs which complete the resource
allocation and status monitoring. As the control center of the switching module,
the two CMPUs operate in 1+1 hot backup mode to ensure high reliability. When
the active CMPU gets faulty, another CMPU in hot backup mode will be
automatically switched over to the active status.
CNET area: Slots 7 and 8, configured with CNETs. The CNET is comprised of
the switching network and the circuit clock unit. It is the core for the normal
operation of the switching module. The switching network units and the circuit
clock units on the two boards form two independent operating planes. The
switching network unit carries out protocol-independent 40 % 40 622 M
fixed-length switching, with a switching capacity of 25 G.
General board area: Slots 2 6 and slots 9 14. There are eleven slots in total.
The CLPC is configured in these slots. The CLPC provides eight 155 M ATM
over SDH optical interfaces. It consists of the control unit, the ATM layer unit,
and the input/output interface unit. The input/output interface unit is integrated
into the CLPC as a sub-board.
2.3 External Interface

When the CSWS is fully configured, it can provide
z
Eighty eight STM-1 optical interfaces
Two operation and maintenance (O&M) network interfaces
Four O&M serial ports
Four BITS clock or line clock input interfaces
Four time synchronization input interfaces
Two time synchronization output interfaces
Two 2 Mbps external synchronization output interfaces
2-2

Subracks
Chapter 3 CIPS
Chapter 3 CIPS
This chapter introduces the functions, configuration, and external interfaces of the
CDMA integrated processing subrack (CIPS).
3.1 Overview
The CIPS implements the following functions:
z
Service frame selection
Data distribution
Signaling control
Voice coding/decoding
Echo cancellation
SS7 signaling processing
The signaling service processing of IWF
3.2 Configuration
The CIPS can support 1xEV-DO and 1X services at the same time, and form different
processing entities according to different configuration services.
z
1X service processing entity
1xEV-DO service processing entity
1X/1xEV-DO service integrated processing entity
In the small-capacity BSC system, a maximum of four subracks corresponding to the

1X service processing entity can be configured in the CCTR and CBUR. In the
large-capacity BSC system, a maximum of 40 subracks can be configured in the
CBUR.
3.2.1 1X Service Processing Entity

The corresponding subrack of the CDMA2000 1X service processing entity can be
z
CDMA BSC interface equipment (CBIE/CXIE)
CDMA radio frame processing (FP MAC RLP) board (CFMR)
CDMA interworking function board (CIWF)
CDMA enhanced vocoder with echo canceller board (CEVC) or CDMA

enhanced voice processing with echo canceller disabled (CEVD)
CDMA system multiplexer unit (CMUX)
CDMA link access protocol board (CLAP)
CDMA signal process unit (CSPU)

3-1

Subracks
Chapter 3 CIPS
CDMA A-interface equipment (CAIE) or CDMA synchronous transport unit
(CSTU).
The pure 1X service subrack contains sixteen slots. Figure 3-1 shows its board
configuration.
C
B
I
E
C
F
M
R
C
F
M
R
C
F
M
R
C
I
W
F
C
E
V
C
C
E
V
C
C
M
U
X
C
M
U
X
7 8
C
E
V
C
C
E
V
C
C
L
A
P
C
S
P
U
C
S
P
U
C
I
W
F
C
A
I
E
9 10 11 12 13 14 15
Figure 3-1 Board configuration of the pure 1X service subrack

The sixteen slots are grouped into two areas according to their functions and
features.
z
SCC unit area: Slots 7 and 8, configured with two CMUXs operating in the 1+1
hot backup mode.
General board area: Slots 0 6 and slots 9 15. There are fourteen slots in total.
The CBIE/CXIE, CFMR, CIWF, CEVC/CEVD, CLAP, CSPU, and CAIE/CSTU
can be configured in these slots.
Since CSPUs operate in 1+1 hot backup mode and require the support of the
backplane, they must be configured in the active and standby slots.
3.2.2 1xEV-DO Service Processing Entity

The corresponding subrack of the 1xEV-DO service processing entity can be
z
CBIE/CXIE
CFMR
CMUX
CSPU
The subrack contains 16 slots. Figure 3-2 shows its board configuration.
3-2

C
B
I
E
C
F
M
R
C
F
M
R
C
F
M
R
C
F
M
R
C
F
M
R
C
F
M
R
C
M
U
X
C
M
U
X
7 8
C
F
M
R
C
F
M
R
C
F
M
R
Subracks
Chapter 3 CIPS
C
S
P
U
C
S
P
U
C
F
M
R
C
B
I
E
9 10 11 12 13 14 15
Figure 3-2 Board configuration of pure 1xEV-DO service subrack

With respect to their features and functions, the 16 slots are grouped into two areas.
CMUX area: slots 7 and 8, configured with two CMUXs operating in 1 + 1 hot standby
mode.
General board area: slots 0 6, and 9 15 (totally 14 slots). These slots can be
configured with the CBIE/CXIE, CFMR, and CSPU. As CSPUs operate in 1 + 1 hot
standby mode, the two CSPUs are configured in two slots with active-standby
relationship.
3.2.1 CDMA2000 1X/1xEV-DO Service Integrated Processing Entity

The CDMA2000 1X/1xEV-DO service integrated processing entity can process
CDMA2000 1X services and CDMA2000 1xEV-DO services simultaneously. It is
generally configured in the small-capacity BSC.
The corresponding subrack can be configured with the following boards:
z
CBIE/CXIE
CFMR
CIWF
CEVC/CEVD
CMUX
CLAP
CSPU
CAIE/CSTU
The subrack contains 16 slots. Figure 3-3 shows its board configuration.
3-3

C
B
I
E
C
F
M
R
C
F
M
R
C
F
M
R
C
F
M
R
C
E
V
C
C
E
V
C
C
M
U
X
C
M
U
X
7 8
C
E
V
C
C
E
V
C
C
L
A
P
Subracks
Chapter 3 CIPS
C
S
P
U
C
S
P
U
C
I
W
F
C
A
I
E
9 10 11 12 13 14 15
Figure 3-3 Board configuration of CDMA2000 1X/1xEV-DO service subrack

In the CDMA2000 1X/1xEV-DO service integrated processing entity, one CFMR
processes 1xEV-DO services, and the other processes 1X services.
With respect to their features and functions, the 16 slots are grouped into two areas.
CMUX area: slots 7 and 8, configured with two CMUXs operating in 1 + 1 hot standby
mode.
General board area: slots 0 6, and 9 15 (totally 14 slots). These slots can be
configured with the CBIE/CXIE, CFMR, CIWF, CEVC, CLAP, CSPU, and CAIE/CSTU.
As CSPUs operate in 1 + 1 hot standby mode, the two CSPUs are configured in two
slots with active-standby relationship.

In full configuration, the CIPS can provide the following interfaces:
z
In the small-capacity BSC

--64-channel E1/T1 interfaces
--Two O&M network ports
In the large-capacity BSC

--64-channel E1/T1 interfaces
--2-port 155 M optical interfaces
3-4

Subracks
Chapter 4 CRPS
Chapter 4 CRPS
CDMA resource and packet subrack (CRPS).
4.1 Overview
The CRPS completes resource management, traffic measurement, and packet data
processing. It also supplies the reduced TDMA frame number (RFN) and the system
clock for the CIPSs, and provides the A3/A7/A13 interface.
4.2 Configuration
Generally, only one CRPS is configured at the upper part of the control cabinet in
BSC system.
The CPRS is configured with the following boards:
z
CDMA base station interface equipment (CBIE/CXIE)
CDMA buffer process unit (CBPU)
CDMA resource management unit (CRMU)
CDMA PCF control unit (CPCU)
CDMA high-speed access controller (CHAC)
CDMA system multiplexer unit (CMXU)
CDMA packet process unit (CPPU)
The CRPS contains sixteen slots. Figure 4-1 shows its board configuration.
C
B
I
E
C
B
P
U
CCC
RRP
MMC
UUU
C
P
C
U
C
H
A
C
C
M
U
X
C
M
U
X
C
H
A
C
C
B
P
U
C
P
P
U
C
P
P
U
C
B
I
E
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Figure 4-1 Configuration of boards in the CRPS
4-1

Subracks
Chapter 4 CRPS
features.
z
CMUX area: Slots 7 and 8, configured with two CMUXs operating in 1+1 hot
backup mode.
General board area: Slots 0 6 and slots 9 15. There are fourteen slots in total.
The CBIE/CXIE, CBPU, CRMU, CPPU, CPCU, and CHAC can reside in these
slots.
Operating in the 1+1 hot backup mode, CHACs, CRMUs and CPCUs require the
support of the backplane and should be configured in the two slots with
active-standby relationship.

In full configuration, the CRPS can provide the following interfaces:
z
64-channel E1/T1 interfaces
2-port 155 M optical interfaces
2-port GE optical interfaces
Two 1PPS clock interfaces
Two clock module maintenance serial ports
4-2

Subracks
Chapter 5 CPMS
Chapter 5 CPMS
CDMA packet module processing subrack (CPMS).
5.1 Overview
The CPMS performs the packet control function (PCF) in the CDMA2000 1X protocol,
including interface signaling processing and packet data service access.
For the signaling on the PCF A9/A11 interfaces, the CPMS completes such functions
as connection management, mobility management (handoff function), charging, short
data burst (SDB) and MD5 encryption.
The CPMS also completes the PCF functions such as the replacement and transfer
of GRE and IP route heads. It sets up the A10/A11 interface to the PDSN and
converts the uplink A8 traffic data into the A10 traffic data before sending them to the
PDSN. It also buffers the downlink A10 traffic data before sending them to the BSC.
In the BSC system, one CRPS can handle the data service with a data throughput of
40 Mbps. When the data throughput is over 40 Mbps, CPMSs should be configured. A
maximum of four CPMSs can be configured, with a data throughput of 100 Mbps for
each CPMS. Only the large-capacity BSC need to be configured with the CPMS.
Generally, only one CPMS is configured.
5.2 Configuration
The CPMS is configured in the CBUR. Figure 5-1 and Figure 5-2 show the board
configurations of the CPMS.
C
M
U
X
C
M
U
X
7 8
C
P
P
U
C
P
P
U
C
P
P
U
C
P
P
U
C
P
P
U
9 10 11 12 13 14 15
Figure 5-1 Configuration of boards in CPMS (with external PCF)
5-1

C
H
A
C
C
H
A
C
C
B
P
U
C
B
P
U
C
B
P
U
C
B
P
U
C
B
P
U
C
M
U
X
C
M
U
X
7 8
C
P
P
U
C
P
P
U
C
P
P
U
Subracks
Chapter 5 CPMS
C
P
P
U
C
P
P
U
C
P
C
U
C
P
C
U
9 10 11 12 13 14 15
Figure 5-2 Configuration of boards in CPMS (with built-in PCF)

features.
z
CMUX area: Slots 7 and 8, configured with two CMUXs operating in 1+1 hot
backup mode.
General board area: Slots 0 6 and slots 9 15. There are altogether 14 slots in
this area, which can be configured with the CHAC, CBPU, CPPU, and CPCU.
Operating in the 1+1 hot backup mode, CHACs and CPCUs require the support
of the backplane and thus should be configured in the two slots with
active-standby relationship.

When the CPMS is fully configured, it can provide four STM-1 optical interfaces.
5-2
HUAWEI

Controller
Boards

Boards
Table of Contents
Table of Contents
Chapter 1 Introduction to the Boards.......................................................................................... 1-1
1.1 Functional Boards .............................................................................................................. 1-1
1.2 Board Structure.................................................................................................................. 1-1
1.2.1 Board Panels........................................................................................................... 1-2
1.2.2 IC Boards ................................................................................................................ 1-2
Chapter 2 CMUX ............................................................................................................................ 2-1
2.1.1 Functions................................................................................................................. 2-1
Chapter 3 CRMU ............................................................................................................................ 3-1
3.1.1 Functions................................................................................................................. 3-1
Chapter 4 CPCU............................................................................................................................. 4-1
4.1.1 Functions................................................................................................................. 4-1
Chapter 5 CPPU ............................................................................................................................. 5-1
5.1.1 Functions................................................................................................................. 5-1
Chapter 6 CBPU............................................................................................................................. 6-1
6.1.1 Functions................................................................................................................. 6-1

Boards
Table of Contents
Chapter 7 CHAC............................................................................................................................. 7-1

7.1.1 Functions................................................................................................................. 7-1
Chapter 8 CBIE .............................................................................................................................. 8-1
8.1.1 Functions................................................................................................................. 8-1
8.3 DIP Switches...................................................................................................................... 8-5
Chapter 9 CMPU ............................................................................................................................ 9-1
9.1.1 Functions................................................................................................................. 9-1
Chapter 10 CNET ......................................................................................................................... 10-1
10.1.1 Functions............................................................................................................. 10-1
Chapter 11 CLPC ......................................................................................................................... 11-1
11.1.1 Functions............................................................................................................. 11-1
Chapter 12 CFMR......................................................................................................................... 12-1
12.1.1 Functions............................................................................................................. 12-1
Chapter 13 CSPU ......................................................................................................................... 13-1
13.1.1 Functions............................................................................................................. 13-1
ii

Boards
Table of Contents

Chapter 14 CLAP ......................................................................................................................... 14-1
14.1.1 Functions............................................................................................................. 14-1
Chapter 15 CEVC and CEVD ...................................................................................................... 15-1
15.1.1 Functions............................................................................................................. 15-1
Chapter 16 CIWF.......................................................................................................................... 16-1
16.1.1 Functions............................................................................................................. 16-1
Chapter 17 CAIE .......................................................................................................................... 17-1
17.1.1 Functions............................................................................................................. 17-1
17.3 DIP Switches.................................................................................................................. 17-4
Chapter 18 CSTU ......................................................................................................................... 18-1
18.1.1 Functions............................................................................................................. 18-1
Chapter 19 GCKP......................................................................................................................... 19-1
19.1.1 Functions............................................................................................................. 19-1
19.1.2 Operating principles ............................................................................................ 19-1
iii

Boards
Table of Contents
Chapter 20 GCKB ........................................................................................................................ 20-1

Chapter 21 Boards in Power Distribution Box ......................................................................... 21-1
21.1 Overview ........................................................................................................................ 21-1
21.1.1 Appearance ......................................................................................................... 21-1
21.1.3 System Design .................................................................................................... 21-3
21.1.4 Technical Specifications...................................................................................... 21-5
21.2 XPSU ............................................................................................................................. 21-6
21.2.2 Panel Descriptions .............................................................................................. 21-8
21.2.3 DIP Switches ....................................................................................................... 21-9
21.3 XSPB ........................................................................................................................... 21-10
21.3.1 Panel Descriptions ............................................................................................ 21-10
21.4 XLPB............................................................................................................................ 21-13
21.4.1 Functions and Operating Principles .................................................................. 21-13
iv

HUAWEI M800 CDMA Mobile Switching Center
Board
Chapter 1 Introduction to the Boards

A board is an integrated circuit board that can fulfill a specific function. It consists of
hardware and software. A physical board loaded with different software can fulfill
different functions.
1.1 Functional Boards

BSC boards are alike in structures and appearances, as shown in Figure 1-1.
1) Interface
2) Board panel
3) Indicator
4) Ejector levers
5) Plug
Figure 1-1 Board hardware

Each board occupies one slot in a subrack. The slots are of the same width except that
the slots occupied by CNETs are as 1.5 times wide as the others.
1.2 Board Structure

Panels and integrated circuit (IC) boards compose board hardware. Functions of a
board are realized on its IC board.
1-1

HUAWEI M800 CDMA Mobile Switching Center
Board
1.2.1 Board Panels

Some boards have the same panel, whereas some do not. Panel differences lie in:
z
CNET panels are of different width.
If boards provide different ports, their panels are different in the shapes and
amounts of apertures of embedded ports on the panels.
There are levers on front panels. You can use them to fasten boards on subracks or
draw boards out of subracks.
For details about specific panels, see associated board descriptions in this module.
1.2.2 IC Boards
Each board is configured with only one printed circuited board (PCB), on which are
such components as IC chips, indicators, and plugs. Some boards also have pinch
boards, ports, and reset switches on their PCBs to perform expansion and provide
physical interfaces.
When you insert a board into a subrack, the plug on the board engages with the pins on
the subrack backplane. Thus, the data channel between the board and backplane
forms. In this way, all boards in a subrack can exchange data through the subrack
backplane.
Indicators indicate running statuses of boards. For various statuses and indications of
specific indicators on different boards, see associated board descriptions in this
module.
1-2

Boards
Chapter 2 CMUX
Chapter 2 CMUX
This chapter introduces the functions, operating principles, and technical indices of
the CDMA system multiplexer unit (CMUX).
The CMUX is the main control board of service subrack. Composed of the main
board and optical sub-board, it performs the cell distribution of the subrack where it
resides, the time division multiplexing (TDM) switching and the system maintenance.
Each subrack is configured with two CMUXs. They operate in active-standby mode to
guarantee the reliability of system.
The CMUX is configured in the CIPS, CRPS, and CPMS.
2.1 Functions and Operating Principles

2.1.1 Functions
The CMUX provides the functions as follows:
z
ATM cell switching.
TDM switching.
AAL2 switching.
Providing synchronization clock.
Providing hot backup and active-standby switchover functions.
Managing and monitoring the software loading of all boards in the subrack.
Monitoring the power subrack, fan box, and environmental operating status.
2.1.2 Operating Principles

Figure 2-1 shows the hardware structure of the CMUX.
2-1

Optical
interface
module
Backplane
bus
Boards
Chapter 2 CMUX
ATM
switching
module
Synchronization
module
Local clock
module
Backplane
ATM bus
interface
module
System clock clock

module
CPU
Control logic
module
TDM switching
module
Backplane
bus
Power module
Figure 2-1 Hardware structure of CMUX

The CMUX consists of the following modules.
I. CPU
There are two sets of central processing units (CPUs) on the CMUX. The CPU A
initializes and controls the peripheral chips and manages the boards inside the
subrack. The CPU B can be used as a peripheral of CPU A. However, it cannot
control other modules on the CMUX.
II. ATM bus interface module

Through the ATM bus interface module, the CMUX connects the backplane bus to the
CMUX bus and transmits and receives signals between the CMUX and other boards.
III. Optical interface module

The optical sub-board of CMUX is connected to the main board through connectors.
The CPU A can control and configure the components on the sub-board. The optical
interface module can be connected with the relevant modules through single-mode or
multi-mode 155 Mbps optical fibers. The optical sub-board is not only the channel for
transmitting and receiving ATM cells between the CMUX and other modules but also
the channel for the CMUX to report alarms and communicate with the BAM.
The chips of the sub-boards, which can be configured by the CPU A, can generate
alarms such as signal loss alarm and receiving cell error alarm. The CPU A can
analyze these alarm messages and decide whether to initiate an active-standby
switchover.
IV. System clock module

The CMUX also generates the system clock for the subrack. It can retrieve one 8 kHz
clock signal from the six upper-level clocks from the optical sub-board, panel, and
2-2

Boards
Chapter 2 CMUX
backplane, and after the phase-lock processing generate frame synchronization and
clock signals for other boards in the subrack and itself.
V. TDM switching module

This module is designed to perform timeslot switching between the backplane bus
and extended bus. The CPU A configures this module and has a data channel
connecting to this module for the CMUX to load and control other boards.
VI. Synchronization module

This module synchronizes the BSC with the satellite clock so as to realize the BSC
intra-subrack synchronization and inter-subrack synchronization.
VII. ATM switching module

This module is the core switching module of CMUX. It fulfills such functions as ATM
layer connection management, resource management, operation, and multicast.
z
For connection management, it offers the connection enabling control function

for five kinds of services, namely, constant bit rate (CBR), realtime variable bit
rate (rt-VBR), non-realtime variable bit rate (nrt-VBR), available bit rate (ABR),
and unspecified bit rate (UBR).
For resource management, it offers such functions as policing, buffer

management, and quality of service (QoS) management.
VIII. Control logic module

This module fulfills the following functions:
z
Micro-processor interface between the two CPUs and the peripheral chips.
Active-standby switchover. It ensures:

-One board is active and the other is standby.
-Insertion and removal of the standby board do not affect the status of the active
board.
-A switchover occurs automatically when the active board is reset.
Watchdog, ensuring the system to reset automatically in the case of exception.
Serial port release protection. It prevents the abnormal CPU A from affecting the
serial port communication between other boards.
IX. Local clock module

There are many chips on the CMUX. Accordingly, multiple clocks are available. The
high-precision (< 50 ppm) crystal oscillator is used to guarantee high efficiency of the
chips.
2-3

Boards
Chapter 2 CMUX
X. Power module
This module provides the CMUX with various types of power supplies to ensure the
normal power supply of all modules.
2.2 Panel Descriptions

Figure 2-2 shows the side view and panel silk screen of CMUX.
Table 2-1 describes the meanings of the indicators on the panel of CMUX. Table
2-2explains the meanings and connection relationship of the panel interfaces.
RUN
ALM
ACT
RESET
TX
RX
Optical
pinch plate
ETH
1PPS
COM1
COM2
Figure 2-2 Side view and panel silk screen of CMUX

Table 2-1 Meaning of CMUX indicators
Name
Color
Description
Meaning
Normal
status
On: There is power input and the CMUX is faulty.

Off: There is no power input or the CMUX is faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CMUX operates normally.

0.125 s on and 0.125 s off: The CMUX is being
loaded.
2 s on and 2 s off: The CMUX is under self-test.
2-4
1 s on and 1
s off

Name
Color
Description
ALM
Red
Alarm
indicator
ACT
Green
Active/stand
by
status
indicator
Boards
Chapter 2 CMUX
Meaning
Normal
status
Off: Normal.
On (or fast flashing): Alarm status, indicating a fault
in the CMUX operation.
On: The CMUX is in the active state.
Off: The CMUX is in the standby state.
Off
On/Off
Table 2-2 Description of CMUX interfaces

Interface
Usage
Connection relationship
RESET
Reset the CMUX
None.
TX
Transmit port of the optical

component on the optical
sub-board
Upon the large-capacity configuration, it is

connected to the optical RX port of the switching
subrack.
RX
Receive port of the optical

component on the optical
sub-board
Upon the large-capacity configuration, it is

connected to the optical RX port of switching
subrack.
ETH
Debug network interface of the

CPU A
Connected to the network port in LAN Switch so

that the CIMS can maintain the subrack.
1PPS
Reserved port
For the CMUX in the CRPS/CRMS, the CMUX in

slot 7 is connected to CLK_A of the GCKB and
that in slot 8 to CLK_B. For the CMUX in other
subracks, the 1PPS interface is not used.
COM1
Serial port 1 for management and

maintenance, operating in the
active/standby mode with COM2.
For the CMUX in the CRPS/CRMS, the CMUX in

slot 7 is connected to COM_A of the GCKB and
that in slot 8 to COM_B. For the CMUX in other
subracks, the COM1 interface is not used.
COM2
Serial port 2 for management and

maintenance, operating in the
active/standby mode with COM1.
2.3 Technical Indices

I. Optical interface indices
z
One 155 Mbps optical interface of the multi-mode/single-mode fiber.
The operating wavelength range of the single-mode optical interface is

1261 1360 nm. The operating wavelength range of the multi-mode optical
interface is 1270 1380 nm. The central wavelength of single/multi-mode
optical interfaces is 1300 nm.
The maximum transmission distance of the multi-mode optical interface is 2 km.
2-5

z
Boards
Chapter 2 CMUX
The maximum transmission distance of the single-mode optical interface

reaches 15 km.
The maximum average transmission power of the single-mode optical interface

is 8 dBm and the minimum average transmission optical power is 15 dBm.
The receiving sensitivity is 31 dBm and the receiving overload power is 8
dBm;
The maximum average transmission power of the multi-mode optical interface is

14 dBm and the minimum average transmission optical power is 19 dBm. The
receiving sensitivity is 30 dBm and the receiving overload power is 14 dBm.
II. Power supply indices and board dimensions

z
Input voltage: 36 V DC to 72 V DC
Power consumption: 38 W
Dimensions: 366.7 mm % 340 mm
2-6

Boards
Chapter 3 CRMU
Chapter 3 CRMU
the CDMA resource management unit (CRMU).
The CRMU maintains and manages interface resources, as well as processes and
distributes interface signaling messages.
It is configured in the CRPS and CRMS, operating in 1+1 backup mode.

3.1.1 Functions
The functions of CRMU include:
z
Maintain, manage, and distribute the resources of A2 interface, A3 interface, and

A8 interface.
Process and distribute signaling messages on the A3, A7, and A9 interfaces.

I. Operating principles of the hardware
Figure 3-1 shows the hardware structure of CRMU.
Debugging serial port
Intra-board
bus
Backplane bus
interface module
Debugging network
interface
SDRAM
DIMM
Central
processing
module
Flash
BootROM
Logic
Watchdog
Clock module
SDRAM
Power module
Figure 3-1 Hardware structure of CRMU
3-1
Backplane
bus

Boards
Chapter 3 CRMU
The CRMU is equipped with a high-performance processor and a powerful

communication controller. Its peripherals include:
z
SDRAM DIMM, as the memory of the processor system.
Flash/BootROM, storing the startup program and application programs.
SDRAM, as the buffer space for communication.
Watchdog, monitoring the universal processor system and ensuring that the
board can recover itself by means of reset in the case of a fault.
Logic module, performing such functions as control of vital chips, adjustment of

the time sequence of important signals, address translation, and active-standby
switchover.
Debugging network interface and serial port, located inside the board and
serving for board debugging only.
Power supply module, supplying power to the chips on the board.
The functions of the CRMU hardware include:

z
Provide hardware processing capability of AAL5 cell SAR.
Provide a set of backplane bus interfaces.
Provide one 10/100 Mbps Ethernet interface and one RS-232 serial interface for
debugging.
Provide one operation and maintenance (O&M) serial port as emergency

channel.
Support 1+1 backup.
Support online insertion and removal.
II. Operating principles of the software

Figure 3-2 shows the software structure of CRMU.
Interface
signaling
processing
A interface
resource
management
O&M
Transmission layer processing
Main program
Bottom layer drive
Figure 3-2 Software structure of CRMU

1)
Interface signaling processing module
3-2

Boards
Chapter 3 CRMU
This module processes some of the signaling messages on the A7, A3 and A9
interfaces, and transfers the upper-layer signaling messages on the interfaces.
2)
A-interface resource management module

This module manages, maintains, distributes and releases the service resources
of A2, A3 and A8 interfaces.
3)
O&M module
Through the CMUX, this module receives O&M commands from the BAM and
performs such functions as maintenance, configuration, alarm management, and
measurement.

Figure 3-3 shows the side view and panel silk screen of CRMU.
Table 3-1 describes the meanings of the indicators on the CRMU panel.
RUN
ALM
ACT
Figure 3-3 Side view and panel silk screen of CRMU

The status of the indicators is defined as follows.
3-3

Boards
Chapter 3 CRMU
Table 3-1 Meaning of CRMU indicators

Name
Color
Description
Meaning
Normal
status
On: There is power input but the CRMU is faulty.

Off: There is no power input or the CRMU is faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CRMU operates normally.

0.125 s on and 0.125 s off: The CRMU is being
loaded.
1 s on
and 1 s
off
2 s on and 2 s off: The CRMU is under self-test.

Off: Normal.
ALM
Red
Alarm indicator
On (or fast flashing): Alarm status, indicating a

fault in the CRMU operation.
ACT
Green
Active/standby
status indicator
On: The CRMU is in the active state.

Off: The CRMU is in the standby state.

I. Power supply indices and board dimensions
z
Input voltage:36 V DC to 72 V DC
3-4
Off
On/Off

Boards
Chapter 4 CPCU
Chapter 4 CPCU
the CDMA PCF control unit (CPCU).
As the signaling processing board of packet control function (PCF), the CPCU
processes the signaling on the A9 and A11 interfaces.
It is configured in the CRPS and CTCS.

4.1.1 Functions
The CPCU performs the functions as follows:
z
Process the upper layer signaling of the A9 and A11 interfaces.
Manage CBPU resources and PCF session ID resources.
Establish signaling and traffic connections.
Maintain the status of packet calls.

Figure 4-1 shows the hardware structure of CPCU.
Intra-board
bus
Backplane bus
Debugging network
interface
SDRAM
DIMM
interface module
Central
processing
module
Logic
Flash
BootROM
Watchdog
Clock module
SDRAM
Power module
Figure 4-1 Hardware structure of CPCU
4-1
Backplane
bus

Boards
Chapter 4 CPCU
The CPCU is equipped with a high-performance processor and a powerful

z
Logic module, performing such functions as controlling vital chips, adjusting the
time sequence of important signals, address translation, and active-standby
switchover.
Debugging network interface and serial port, located inside the board, for board
debugging only.
The hardware of the board performs the following functions:

z
Provide hardware processing capability of AAL5 cell segmentation and

reassembly (SAR).
debugging.
Provide one operation and maintenance serial port as emergency channel.

Figure 4-2 shows the software structure of CPCU.
Protocol
processing
Operation and
maintenance
Resource
management
Main program
Bottom layer drive
Figure 4-2 Software structure of CPCU

1)
Protocol processing module

This module processes the upper-layer signaling of the A9 and A11 interfaces,
controls signaling flow and allocation of service resources, and establishes and
releases the signaling and traffic connections.
4-2

2)
Boards
Chapter 4 CPCU
Resource management module

This module manages PCF session ID and CBPU resources. The CBPU serves
as a resource pool. According to the load information reported periodically by the
CBPU, the CPCU allocates the CBPU resources with minimum load to establish
packet calls so as to balance the load of overall subrack.
3)
Operation and maintenance module

Through the CMUX, this module receives operation and maintenance
commands from the BAM and performs such functions as maintenance,
configuration, alarming, and statistics.

Figure 4-3 shows the side view and panel silk screen of CPCU.
Table 4-1 describes the meanings of the indicators on the CPCU panel.
RUN
ALM
ACT
Figure 4-3 Side view and panel silk screen of CPCU
4-3

Boards
Chapter 4 CPCU
Table 4-1 Meaning of CPCU indicators

Name
Color
Description
Meaning
Normal
status
On: There is power input but the CPCU is faulty.

Off: There is no power input or the CPCU is faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CPCU operates normally.

0.125 s on and 0.125 s off: The CPCU is being
loaded.
1 s on
and 1 s
off
2 s on and 2 s off: The CPCU is under self-test.

ALM
Red
Alarm
indicator
ACT
Green
Active/standby
status
indicator
Off: Normal.
fault in the CPCU operation.
On: The CPCU is in the active state.
Off: The CPCU is in the standby state.

z
4-4
Off
On/Off

Boards
Chapter 5 CPPU
Chapter 5 CPPU
the CDMA packet processing unit (CPPU).
The CPPU, an A8 interface packet data processing board, operates in resource pool
mode to share loads. It can be expanded according to the traffic flow.
The CPPU is configured in the CRPS and CPMS.

5.1.1 Functions
The functions of CPPU include:
z
Process and transfer uplink packet data on the A8 interface.
Process and transfer downlink packet data on the A8 interface.

Figure 5-1 shows the hardware structure of CPPU.
Intra-board
bus
Backplane bus
interface module
Debugging network
interface
SDRAM
DIMM
Central
processing
module
Backplane
bus
Logic
Flash
BootROM
Watchdog
Clock module
SDRAM
Power module
Figure 5-1 Hardware structure of CPPU

The CPPU is equipped with a high-performance processor and a powerful
z

5-1

Boards
Chapter 5 CPPU

the time sequence of important signals, address translation, and active/standby
switchover.
The functions of the CPPU hardware include:

z
debugging.
Provide one O&M serial port as emergency channel.

Figure 5-2 shows the software structure of CPPU.
Interface
signaling
processing
A8 interface
data packet
processing
O&M
Main program
Bottom layer drive
Figure 5-2 Software structure of CPPU

1)

This module processes the internal signaling between the CFMR and the CPPU
and between the CRMU and the CPPU, and manages the A8 interface path
together with the CRMU and the CFMR.
2)
A8 interface data packet processing

It includes channel monitoring, generic routing encapsulation (GRE) data packet
processing and transfer, and buffer queue management.
5-2

3)
Boards
Chapter 5 CPPU
O&M module
performs such functions as maintenance, configuration, alarm management and
measurement.

Figure 5-3 shows the side view and panel silk screen of CPPU.
Table 5-1 describes the meanings of the indicators on the CPPU panel.
RUN
ALM
ACT
Figure 5-3 Side view and panel silk screen of CPPU

Table 5-1 Meaning of CPPU indicators
Name
Color
Description
Meaning
Normal
status
On: There is power input but the CPPU is faulty.

Off: There is no power input or the CPPU is
faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CPPU operates

normally.
0.125 s on and 0.125 s off: The CPPU is being
loaded.
2 s on and 2 s off: The CPPU is under self-test.
5-3
1 s on and 1
s off

Boards
Chapter 5 CPPU
Name
Color
Description
Meaning
ALM
Red
Alarm indicator

fault in the CPPU operation.
ACT
Green
Active/standby
status indicator
On: In the normal state.
Normal
status
Off: Normal.
Off: Not in use.

z
5-4
Off
On
Boards
Chapter 6 CBPU
Chapter 6 CBPU
the CDMA buffer processing unit (CBPU).
The CBPU is the buffer process unit of the packet control function (PCF). By means
of resource pool, the CBPU achieves load sharing and can be easily expanded as per
the traffic demands.
The CBPU is configured in the CRPS or the CPMS.

6.1.1 Functions
The CBPU fulfills the following functions:
z
Buffering, processing and forwarding the downlink packet data from the packet
data serving node (PDSN) to the BSC.
The CBPU forwards the generic routing encapsulation (GRE) packet to the BSC
directly, and forwards the short data burst (SDB) data to the CPCU and then to
the BSC.
Re-sequencing the downlink data packets forwarded through the CDMA

high-speed access controller (CHAC) when the PCF is connected with the PDSN
through the local area network (LAN) or internet.

I. Hardware operating principles
Figure 6-1 shows the hardware structure of CBPU.
6-1
Boards
Chapter 6 CBPU
Bus
inside the
CBPU Backplane bus
interface module
Debugging
serial port
Debugging
network interface
SDRAM
DIMM
Central
processing
module
Backplane
bus
Logic
Flash
BootROM
Watchdog
SDRAM
Clock
module
Power module
Figure 6-1 Hardware structure of CBPU
The
CBPU
is
equipped
with
high-performance
processor
and
powerful
communication controller. Its peripherals include

z
SDRAM DIMM, the memory of the processor.
Flash/BootROM, storing the startup program and applications.
SDRAM, the buffer for communication.
Watchdog, monitoring the processor and ensuring that the CBPU can be
recovered by means of reset in the case of failure.
Logic module, designed to control vital chips, adjust time sequence of important
signals, perform address translation and implement active-standby switchover.
Debugging network interface and serial port, located in the CBPU and serving for
CBPU debugging only.
Power supply module, supplying power for the chips on the CBPU.
The hardware of the CBPU performs functions such as

z
Performing segmentation and reassembly (SAR) of AAL5 cells.
Providing a set of backplane bus interfaces.
Providing a 10M/100Mbps Ethernet interface and a RS-232 serial port for

debugging.
Providing an operation and maintenance serial port as an emergency channel.
Supporting online insertion and removal.
6-2
Boards
Chapter 6 CBPU
II. Software operating principles

Figure 6-2 shows the software structure of CBPU.
Interface
signaling
processing
A10 interface
data packet
processing
O&M
Main program
Bottom layer drive
Figure 6-2 Software structure of CBPU

1)

The interface signaling processing module processes the internal signaling
between the CBPU and the CPCU, and manages the A10 interface path together
with the CPCU.
2)
A10 interface data packet processing module

This module performs the following functions:
3)
Monitor channel.
Process, re-sequence, and forward GRE data packets.
Forward SDB data to the CPCU.
Manage the buffer queue.

This module performs maintenance, configuration, alarm management, and
measurement by receiving operation and maintenance commands from the BAM
through the CMUX and the CPCU.

Figure 6-3 shows the side view and the panel silk screen of the CBPU. Table 6-1
describes the indicators on the CBPU panel.
6-3
Boards
Chapter 6 CBPU
RUN
ALM
ACT
Figure 6-3 Side view and panel silk screen of CBPU
Table 6-1 Meaning of CBPU indicators

Name
Color
Description
Meaning
Normal
status
On: There is power input while the CBPU is faulty.

Off: There is no power input or the CBPU is faulty.
RUN
Green
Board
status
indicator
1 s on and 1 s off: The CBPU runs normally.

0.125 s on and 0.125 s off: The CBPU is being
1 s on
and 1 s
off
loaded.
2 s on and 2 s off: The CBPU is under self-test.
Off: Normal.
ALM
Red
Alarm indicator
Off
On (or fast flashing): Fault occurs.
6-4
Boards
ACT
Green
Chapter 6 CBPU
Active/standby
On: The CBPU is in the active state.
status indicator
Off: The CBPU is in the standby state.
On

z
Dimensions: 366.7 mm 340 mm
6-5

Boards
Chapter 7 CHAC
Chapter 7 CHAC
the CDMA high-speed access controller (CHAC).
The CHAC processes GRE traffic data, forwards traffic and signaling data, and
transfers AT access authentication messages between the AN and AN-AAA. It
provides A10/A11 interfaces to the PDSN, and A12 interface to the AN-AAA.
The CHAC is configured in the CRPS or the CPMS.

7.1.1 Functions
The CHAC performs the following functions:
z
Downlink traffic data forwarding. It forwards the A10 traffic data received from
the PDSN to the CBPU.
Uplink traffic data processing and forwarding. It processes the A8 traffic data
received from the CPPU and the SDB data received from the CPCU, and
forwards them to the PDSN through the A10 interface.
Downlink signaling data forwarding. It directly forwards the A11 signaling data
received from the PDSN to the CPCU.
Uplink signaling data forwarding. It directly forwards the A11 signaling data
received from the CPCU to the PDSN.
Providing 1000M Ethernet interface to the PDSN and supporting RFC826

(Ethernet ARP) protocol.
Carrying signaling messages between the AN and AN AAA.

I. Hardware operating principle
The CHAC, which forwards and processes PCF data packets, consists of processor
module, ATM adaptation module, bus interface module, and sub-board interface, as
shown in Figure 7-1.
7-1

Boards
Chapter 7 CHAC
SDRAM
DIMM
Flash
BootROM
Backplane bus
interface module
Central
processing
module
Intra-board
bus
Backplane
bus
ATM adaptation
module
Network interface
subborad
SDRAM
Power module
Figure 7-1 Hardware structure of CHAC
The CHAC is configured with a special chip which integrates a high-performance
processor and several micro-processing engines for packet forwarding. It can process
up to 2 million packets per second.
The CHAC forwards data in form of packets, while the backplane bus interface
module receives and transmits data in form of ATM cells. Therefore, the data packets
need to be segmented into ATM cells before being sent to the backplane bus
interface module. Similarly, the ATM cells also need to be reassembled into data
packets before reaching the interface processing module of the destination board.
The whole process is called segment and reassembly (SAR). The SAR function is
performed by the ATM adaptation module between the processor and the backplane
bus interface module.
According to the ATM theory, adaptation modes can be divided into ATM adaptation
layer 1 (AAL1), ATM adaptation layer 2 (AAL2) and ATM adaptation layer 5 (AAL5)
depending on the traffic types and the demands for transmission timeliness and
efficiency. Based on the features of the IP data packet, the CHAC adopts the
adaptation mode of AAL5.
Using the SC optical connector, the 1,000M Ethernet interface provides single-mode
or multi-mode optical interface. The single-mode optical interface supports up to 10
km transmission, suitable for long-distance transmission. The multi-mode optical
interface supports up to 500 m transmission, suitable for short-distance transmission.
II. Software operating principle

The CHAC software consists of Core software and micro-code. Running on the virtual
operating system (VOS), the Core software is composed of loading module, operation
and maintenance module, forwarding management module, address translation
module, and bottom layer drive module. The micro-code refers to the code that runs
7-2

Boards
Chapter 7 CHAC
in the micro-engine of the CHAC. The software structure of the CHAC is shown in
Figure 7-2.
Loading
Forwarding
management
O&M
Address
translation
Message interface
VOS
Function interface
Function interface
Bottom layer drive
Core and micro-engine

communication protocol
Micro-code
Figure 7-2 Software structure of CHAC

1)
Loading module
The loading module, together with the BAM, performs loading and upgrading of
the service software.
2)

This module receives the operation and maintenance commands from the BAM
through the CMUX, and performs relevant maintenance, configuration, alarm
and measurement.
3)
Address translation module

This module maintains the mapping tables between the IP address and the
medium access control (MAC) address, facilitating the forwarding by the
micro-engine.
4)
Forwarding management module

This module communicates with the forwarding control module of the CPCU,
receives the forwarding table entries issued by the CPCU and fills them into the
forwarding table used by the micro code.
5)
Micro-code
The micro code is designed specifically to forward traffic, signaling and other
control messages to implement the major functions of the CHAC.

Figure 7-3 shows the side view and the panel silk screen of the CHAC.
Table 7-1 describes all the indicators on the CHAC panel.
7-3

Boards
Chapter 7 CHAC
Table 7-2 describes the interfaces on the CHAC panel.
RUN
ALM
RESET
Optical
subboard
TX
RX
Figure 7-3 Side view and panel silk screen of CHAC

Table 7-1 Meaning of CHAC indicators
Name
Color
Description
Normal
status
Meaning
1 s on and 1 s off: The CHAC runs normally.
RUN
Green
Board
status
indicator
0.125 s on and 0.125 s off: The CHAC is being

loaded.
2 s on and 2 s off: The CHAC is under test.
On: There is power input while the CHAC is faulty.
1 s on
and 1 s
off
Off: There is no power input or the CHAC is faulty.

ALM
Red
Alarm
indicator
Off: Normal.
Off
Table 7-2 Description of CHAC interfaces

Interface
Usage
Connection
RESET
Reset the CHAC
Press it to reset the board.
TX
1000M Ethernet optical transmission interface
Send 1000M Ethernet data
7-4

Interface
RX
Boards
Chapter 7 CHAC
Usage
Connection
1000M Ethernet optical receiving interface
Receive 1000M Ethernet data

I. Indices of 1000M Ethernet optical interface
Rate: 1250 Mbps.
Mode: single-mode (HFCT-53D5) and multi-mode (HFBR-53D5)
Connector: SC
The standard of optical interface: GPCS interface.
II. Indices of multi-mode optical interface

1)
Transmitter:
(Ambient temperature: 0C 70C, VCC: 4.75 V 5.25 V)

Table 7-3 1000M multi-mode optical transmitter parameters
Parameter
Typical
value
Maximum
Symbol
Minimum
Output optical power

50/125um, NA=0.20
optical fibers
POUT
9.5
Output optical power

62.5/125um, NA=0.20
optical fibers
POUT
9.5
Extinction ratio
Central wavelength
830
tr/tf
RIN12
Coupling power ratio
Total
jitter
transmitter at TP2
2)
CPR
dBm
(average)
dBm
(average)
dB
Spectrum width
Optical
pulse
ascending/descending
time
Unit
850
860
nm
0.85
ns rms
0.26
ns
117
dB/Hz
of
227
Receiver
7-5
Remarks
See note 1
See note 1
See note 2
See notes 3
and 4
dB
See note 5
ps
See note 6

Boards
Chapter 7 CHAC
Table 7-4 1000M multi-mode optical receiver parameters

Parameter
Symbol
Minimum
Input optical power
PIN
17
Sensitivity of the
strain-gauge type
receiver
62.5 um
50 um
201
Central operating
wavelength
770
Unit
Remarks
dBm
(average)
12.5
dBm
13.5
(average)
ps
Cut-off frequency
on the 3 dB
bandwidth of the
receiver
Echo loss
Maximum
0
9.5
The
spreadout
degree of the
strain-gauge type
receiver eye pattern
at TP4
Typical
value
See note 7
See note 6
860
nm
1500
MHz
See note 8
dB
See note 9
12
Note:
The maximum output optical power complies with the IEEE 802.3 z standards, featuring first class
laser safety.
The extinction ratio is the ratio of the mean output optical power when the transmitter outputs the "0"
code to the mean output optical power when the transmitter outputs 1 code.
Unfiltered 20% 80% value.
The features of the laser pulse effect can be presented in the eye pattern. The output wave complies
with section 38.6.5 in IEEE 802.3 z.
CPR is measured in accordance with section 38.6.10 in IEEE 802.3 z and the standard of
EIA/TIA-526-14A.
TP is the turning point as defined in section 38.2.1 in IEEE 802.3 z.
The receiver sensitivity is sampled in the center of the eye pattern and measured when the
extinction ratio deteriorates most severely.
The 3dB bandwidth of the receiver is measured according to the indicators listed in section 38.6.11
in IEEE 802.3 z.
Echo loss is defined as the minimum loss of the received optical power reflected on the optical
fibers.
7-6

Boards
Chapter 7 CHAC
III. Indices of single-mode optical interface

1)
Transmitter:

Table 7-5 1000M single-mode optical transmitter parameters
Parameter
Output
power
Symbol
Minimum
Typical
value
Maximum
optical
POUT
dBm
9.5
11.5
dBm
11.5
(average)
9 mm SMF
Output
power
Unit
(average)
Remarks
See note 1
optical
62.5/125 mm MMF
POUT
See note 1
50 mm MMF
Extinction ratio
Central wavelength
1285
dB
1343
nm
2.8
ns rms
0.26
ns
RIN12
120
dB/Hz
Total jitter of
transmitter at TP2
227
ps
Spectrum
rms
width
Optical
pulse
ascending/descen
ding time
2)
1310
See note 2
tr/tf
See notes 3
and 4
See note 5
Receiver

Table 7-6 1000M single-mode optical receiver parameters
Parameter
Input optical power
Symbol
Minimum
PIN
20
Typica
l value
Maximum
3
Sensitivity of the
strain-gauge
type
receiver
14.4
7-7
Unit
Remarks
dBm
(average)
dBm
(average)
See note 6

Parameter
Symbol
Boards
Chapter 7 CHAC
Minimum
The
spreadout
degree
of
the
strain-gauge
type
receiver eye pattern
at TP4
201
Central
operating
wavelength
1270
Maximum
Unit
ps
Cut-off frequency on
the 3dB bandwidth of
the receiver
Echo loss
Typica
l value
Remarks
See note 5
1355
nm
1500
MHz
See note 7
dB
See note 8
12
Note:
The maximum output optical power complies with the IEEE 802.3 z standards, featuring the first
class laser safety.
The extinction ratio is the ratio of the mean output optical power ratio when the transmitter outputs
the "0" code to the mean output optical power when the transmitter outputs "1" code.
Unfiltered 20% 80% value.
The features of the laser pulse effect can be presented in the eye pattern. The output wave complies
with section 38.6.5 in IEEE 802.3 z.
TP is the turning point as defined in section 38.2.1 in IEEE 802.3 z.
The receiver sensitivity is sampled in the center of the eye pattern and measured when the
extinction ratio deteriorates most severely.
The 3 dB bandwidth of the receiver is measured according to the indices listed in section 38.6.11 in
IEEE 802.3 z.
Echo loss is defined as the minimum loss of the received optical power reflected on the optical
fibers.
IV. Power supply indices and board dimensions

z
7-8

Boards
Chapter 8 CBIE
Chapter 8 CBIE
the CDMA base station interface equipment (CBIE).
The CBIE supports ATM over E1/T1 and ATM over fractional E1/T1. It provides not
only the A3/A7/A13 interface between BSCs but also the Abis interface between the
BSC and the BTS. Each CBIE provides 32 E1/T1 interfaces.
The CBIE is configured in the CRPS and the CIPS.

8.1.1 Functions
The CBIE implements the following functions:
z
Providing 32 standard E1/T1 interfaces.
Supporting the inverse multiplexing over ATM (IMA) processing of 32 E1s/T1s

and the pure ATM-over-E1/T1 mode, that is, user-network interface (UNI) mode.
Providing the Abis interface between the BTS and the BSC and performing AAL2
switching and AAL5 transparent transmission.
Providing the A3/A7/A13 interface between the BSCs.
Offering two 2 MHz reference clock source outputs and two 8 kHz reference
clock sources to the backplane.
Supporting ATM over Fractional E1/T1.

Figure 8-1 shows the operating principles of CBIE.
8-1

Boards
Chapter 8 CBIE
Backplane
bus interface
module
Central
processing
module
Backplane bus
ATM switching
module
IMA
processing
module
2M clock
HW switching
module
Clock
module
Trunk circuit
interface module
4 8E1/T1
Power module
Figure 8-1 Hardware structure of CBIE
In Figure 8-1, the dotted lines represent the central processing unit (CPU) buses
through which the central processing module is connected to all other modules. The
solid lines represent traffic information flow and clock signal flow.
I. Central processing module

The central processing module serves as the control and scheduling center of the
CBIE. It accomplishes such functions of the CBIE as initialization, loading, operation
and maintenance, service processing, and alarm reporting. Meanwhile, it performs
the AAL2 processing of the CBIE.
II. Clock module

The clock module provides operating clock for all modules. It extracts two 2 MHz
clock signals from the E1/T1 interface and outputs them to the panel.
III. Backplane bus interface module

The backplane bus interface module connects the backplane bus to the ATM bus. It
offers traffic transport channel to enable the communication between the CBIE and
other boards.
IV. ATM switching module

The ATM switching module dispatches the input ATM cell flows to different processing
modules. It provides three ports that operate in the ATM mode.
8-2

Boards
Chapter 8 CBIE
V. IMA processing module

The IMA processing module implements the IMA for 32 E1s/T1s. It supports both IMA
and UNI modes. Each CBIE can support 32 IMA groups or 32 UNIs at most.
VI. HW switching module

The highway switching module performs timeslot switching and data rate conversion
of highway, and supports link-side timeslot cross connection.
VII. Trunk circuit interface module

The trunk circuit interface module
z
Provides 32 E1/T1 links.
Supports two connection modes, namely, 75 : coaxial cable and 120 : twisted
pair.
Isolates and protects the external electrical interfaces.
VIII. Power module

The power module provides multiple types of power supplies to ensure normal
running of each functional module.

Figure 8-2 shows the side view and the panel silk screen of the CBIE.
Table 8-1 describes the indicators on the CBIE panel, Table 8-2 describes the
interfaces in the panel, and Table 8-3 describes the DIP switches.
8-3

Boards
Chapter 8 CBIE
S14
S12
RUN
ALM
ACT
S13
S11
J18
J19
S9
E1/T1
J21
S10
E1/T1
S6
S8
S5
E1/T1
S15
S7
E1/T1
S17
S16
CLK1
CLK2
J18
Figure 8-2 Side view and panel silk screen of CBIE

Table 8-1 Meaning of CBIE indicators
Name
Color
Description
Meaning
Normal status
On: There is power input while the CBIE is

faulty.
RUN
Green
Board status
indicator
Off: There is no power input or the CBIE is

faulty.
1 s on and 1 s off: The CBIE runs normally.
1 s on and 1 s
off
0.125 s on and 0.125 s off: The CBIE is

being loaded.
ALM
Red
Alarm indicator
ACT
Green
Active/standby
status indicator
Off: Normal.
On: The CBIE is in the active state.
Off: The CBIE is in the standby state.
Off
On
Table 8-2 Description of CBIE interfaces

Interface
E1/T1
Description
Usage
E1/T1 interface in the

panel
Connected with E1 cables 0 7 that are numbered in the

ascending sequence from the bottom up.
8-4

Interface
Boards
Chapter 8 CBIE
Description
Usage
E1/T1

panel
Connected with E1 cables 8 15 that are numbered in the

ascending sequence from the bottom up.
E1/T1

panel
Connected with E1/T1 cables 16 23 that are numbered in

the ascending sequence from the bottom up.
E1/T1

panel
Connected with E1/T1 cables 24 31 that are numbered in

the ascending sequence from the bottom up.
CLK1
Output interface 1 for 2

MHz clock reference
source
Providing the clock signal extracted from the line as clock

reference source 1.
CLK2
Output interface 2 for 2

MHz clock reference
source
Providing the clock signal extracted from the line as clock

reference source 2.
8.3 DIP Switches

The meanings of the DIP switches on the CXIE are explained in Table 8-3.
Table 8-3 Description of CBIE DIP switches
DIP
switch
Bit
S7
3
58
S16
18
S15
18
Statu
s
Meaning
Description
On
The 75 coaxial cable is selected
Off
The E1/T1 twisted pair is selected
Impedance matching selection

indication of E1/T1 cables 0 7.
The selection must be consistent
with that of S16 and S15.
On
Off
On
Off
On
Off

indication of E1/T1 cables 8 15.
The selection must be consistent
with that of S5 and S6.
indication of E1/T1 cables 16
23. The selection must be
consistent with that of S10 and
S11.
indication of E1/T1 cables 24
31. The selection must be
consistent with that of S13 and
S14.
Not in use.
On
The 75 coaxial cable is selected.
Off
Impedance matching selection of

E1/T1 cables 0 3
On
8-5

DIP
switch
Bit
S5
18
S6
18
S10
18
S11
18
S13
18
S14
18
S7
18
S8
18
S9
18
S12
18
Statu
s
Boards
Chapter 8 CBIE
Meaning
Description
Off
E1/T1 cables 4 7
On
Off

E1/T1 cables 8 11
On
Off
On
Off
On
Off
On
Off
On
Off
On
Connected to PGND
Off
Disconnected
On
Connected to PGND
Off
Disconnected
On
Connected to PGND
Off
Disconnected
On
Connected to PGND
Off
Disconnected

E1/T1 cables 12 15
E1/T1 cables 16 19
E1/T1 cables 20 23
E1/T1 cables 24 27
E1/T1 cables 28 31
TX PGND switch of E1/T1 cables
07
8 15
16 23
24 31
Table 8-4 describes the meanings of jumpers on the CBIE.

Table 8-4 CBIE Jumpers
Jumper
J18
J19
J21
Status
Meaning
Short-circuited
System B is under commissioning.
Not short-circuited (default)
System B runs normally.
Short-circuited
System A is under commissioning.
System A runs normally.
Short-circuited
The CBIE is under commissioning.
The CBIE runs normally.
8-6

Boards
Chapter 8 CBIE

I. Interface indices
z
Performing IMA processing of 32 E1s/T1s and supporting ATM over E1/T1 and
ATM over Fractional E1/T1.
Supporting 75 coaxial cable transmission and E1/T1 twisted pair transmission.
Outputting two 2 MHz reference clock sources. The eye pattern and frequency
stability comply with the ITU-T G.703 recommendations.
Complying with the ITU-T G.703 recommendations in physical features and with
the ITU-T G.704 recommendations in transmission frame structure.

z
Input voltage: 36V DC to 72 V DC
8-7

Boards
Chapter 9 CMPU
Chapter 9 CMPU
the CDMA main processing unit (CMPU).
The CMPU, the core control board in the switching module, implements the
maintenance, management and alarm of the boards in the switching module, and the
agent maintenance of the BSC system.
The CMPU is configured in the slot for the main control board of the CSWS.

9.1.1 Functions
The CMPU accomplishes the following functions:
z
Manage and allocate the resources of the switching module.
Process signaling and internal switching information.
Manage and monitor other boards in the switching module.
Select the active-standby clock and the plane of the switching network.

The CMPU structure is shown in Figure 9-1.
Traffic
engine unit
NMS of
BAM
CNET
Control
processing unit
CMPU
Figure 9-1 Hardware structure of CMPU

Through the traffic engine unit and control processing unit, the CMPU monitors the
CDMA network transfer and switch (CNET) and the CDMA line process unit (CLPC),
and performs the link handoff between them.
The CMPU performs such global functions as resource management and status
monitoring, and monitors the CMPU status in real time. When the active CMPU goes
9-1

Boards
Chapter 9 CMPU
faulty, the standby one can detect it timely and perform active-standby switchover
automatically.

Figure 9-2 shows the side view and the panel silk screen of the CMPU.
Table 9-1 describes the indicators on the CMPU panel.
Table 9-2 illustrates the meanings and connection of the interfaces on the CMPU
panel.
RUN
ALM
ACT
IDE hard disk

RESET
Figure 9-2 Side view and panel silk screen of CMPU

Table 9-1 Meaning of CMPU indicators
Indicator
Color
Description
RUN
Green
Board status
indicator
ALM
Red
Alarm
indicator
Off: Normal.
ACT
Green
Active/standby
status
indicator
On: The CMPU is in the active state.
Normal
status
Meaning
0.125 s on and 0.125 s off: The CMPU is
being reset and starting up.
Flashing at other periods: the CPU of the
CMPU is running.
Off: The CMPU is in the standby state.
9-2
Flashing
Off
On or Off

Boards
Chapter 9 CMPU
Table 9-2 Description of CMPU interfaces

Interface
Description
Usage
Used to reset the

CMPC
Press it to reset the CMPU.
100
Mbps
network
interface
socket of BAM
RJ45 socket
indicators
Self-adaptive 10/100 Mbps Ethernet interface. The

socket is equipped with connection and transceiving
indicators. When the connection indicator is on, the
connected network runs normally. When the transceiving
indicator flashes, data transceiving is in process.
Serial port 1
RS232 DB9 socket
Connected with the console or Modem to fulfill remote

maintenance.
Serial port 2
RS232 DB9 socket
Connected with the console or Modem to fulfill remote

maintenance.
RESET
with

z
9-3

Boards
Chapter 10 CNET
Chapter 10 CNET
the CDMA network transfer and switching unit (CNET).
The CNET performs the traffic switching between the boards in the switching subrack
and the traffic switching on the optical interfaces of CLPC/CLPU.
It is configured in the slot for the CSWS.

10.1.1 Functions
In terms of function, the CNET consists of switching network and clock module.
The switching network performs the functions as follows.
z
Perform fast switching of fixed-length packets at 40 % 40 ports with a total

switching capacity of 25 G.
Provide 40 switching network ports, each with a rate up to 622 Mbps.
Provide a shared buffer with the capacity of 8000 cells.
Provide distributed system design, with separate clock input for each input
interface.
Support four delay priorities of each port.
Perform blocking-free management through the adaptive dynamic threshold

backpressure mechanism.
Provide the system diagnosis function to report the status of the switching
network in real time and to help the system detect and trace faults.
The functions of clock module cover:

z
Extract timing signals from the external synchronization timing interface and line
synchronization signals, and provide timing signals for the entire system after the
processing.
Provide two 2 Mbps input interfaces.
Provide two 2 MHz input interfaces, which can also be used as two 2 Mbps input
interfaces.
Provide one 8 KHz input interfaces, which can also be used as a 2 Mbps input
interface.
Provide two time synchronization input interfaces, each of which can lead in
differential 1PPS signals and serial port text information.
Provide one time synchronization output interface.
Provide one 2 Mbps external synchronization output interface.
Provide the enhanced stratum-3 clock for the system.

10-1

Boards
Chapter 10 CNET

The CNET is composed of five units, namely, the high speed backplane interface unit,
switching network unit, intra-board clock and synchronous logic unit, control unit, and
switch clock unit. The circuits of the first three units are on the central switching
network board (CNU), and the circuits of the other two are on the sub-board of CNU.
Figure 10-1 shows the logical structure of CNET.
2Mbit/s
2MHz
Switch clock unit
High-speed
backplane
interface unit
Backplane bus
Control unit
Switching
network unit
Clock and
synchronization
logic unit
Figure 10-1 Logical structure of CNET
I. High-speed backplane interface unit

This unit performs speed adaptation and signaling format conversion between the
CNU and the high-speed backplane.
II. Switching network unit

Based on the core switching network structure of 3-level blocking-free shared buffer,
this unit performs fast switching of fixed-length packet at 40 % 40 ports (with a port
rate up to 622 M and a total switching capacity of 25 G) and supports four delay
priorities.
The switching network unit has the following features.
z
Two switching network units need to be configured to form a dual-plane system

(plane A and plane B). Plane A operates synchronously with plane B, each
performing full-capacity fixed-length packet switching independently. The
dual-plane operating mode enhances the reliability of the switching network. It
can implement port-based switchover and thus minimize the impact on users
because of the switching network plane switchover.
In the switching network, the switching flow is controlled by means of

backpressure signal for the purpose of block-free and loss-free switching.
10-2

z
Boards
Chapter 10 CNET
In the switching network, the impartial optional route scheduling algorithm is

used to arbitrate the switching data packets to guarantee the availability of the
switching channel.
In the switching network, the advanced adaptive dynamic threshold (ADT) is

used to manage the storage queues so as to allocate the buffer resources of the
system reasonably.
It provides the system diagnosis function to report the status of the switching
network in real time and to help the system detect and trace faults.
III. Clock and synchronous logic unit

The functions include:
z
Provide highly-accurate reference clock signals for the high-speed transceiver.
Provide global clock signals and global timeslot synchronization signals for the
switching network.
IV. Control unit

The functions include:
z
Configure the switching network unit, monitor the status of switching network,
and handle faults.
Perform switch clock phase-locking.
Monitor the clock unit and handling faults, for example, process the clock system
first upon clock system fault.
V. Switch clock unit

1)
Functions
The switch clock unit on the CNET provides the service modules with global
synchronous clock through the optical interface on the CLPC.
By using Huawei mature clock synchronization tracing algorithm, the clock unit
offers enhanced stratrum-3 clock function. Four operating modes are available:
fast pull-in, locked, holdover and free-run.
The external synchronization timing input interfaces of clock unit include 2 Mbps,
2 MHz, 8 KHz and time synchronization interfaces. The 2 Mbps interface and the
2 MHz interface work in multiplexing mode, and the time synchronization input
interface leads in 1PPS pulse signals and serial port text information. The
external synchronization timing output interface of the clock unit outputs 2 Mbps
and 1 PPS pulse signals.
2)
Dual-plane structure
Like the switching network unit, the BSC clock unit is also based on the
dual-plane structure, but it differs in that its two clock planes are not of equal
status. When the selected clock plane is active, the other clock plane will be
standby. According to the 8 KHz synchronization clock sent from the active plane
10-3

Boards
Chapter 10 CNET
clock unit, the clock unit on the standby plane maintains synchronization with the
active plane to decrease the deviation of phase and frequency of the two plane
clocks upon the switchover so as to ensure the steady and reliable operation.
The clock synchronization reference of the active plane clock unit can be
standard 2 Mbps reference source, 2 MHz reference source or clock source
retrieved from the SDH/SONET/PDH line port. It depends on the quality of the
current system clock synchronization source.
When no building integrated timing supply system (BITS) clock provides the BSC
system
with
timing
synchronization,
the
clock
unit
acquires
timing
synchronization from the line automatically. There are two synchronization link
input interfaces in the clock unit. When the active reference is lost, it will switch
automatically over to the standby reference under the control of software. If the
standby reference also goes faulty, it will switch to the holdover status
automatically. In addition, there is another synchronization clock output interface,
outputting a high-precision 2 MHz synchronization clock, which can serve as the
clock reference for other connected devices through coaxial cables led from the
panel.

Figure 10-2 shows the side view and panel silk screen of CNET. Table 10-1 describes
the meanings of the indicators on the CNET panel. Table 10-2 explains the meanings
and connection relationship of the panel interfaces.
10-4

Boards
Chapter 10 CNET
RUN
CLK
ACT
CLK IN0
CLK IN1
Clock
pinch
board
CLK OUT0
CLK OUT1
CLK IN2
CLK IN3
Figure 10-2 Side view and panel silk screen of CNET

Table 10-1 Meaning of CNET indicators
Indicator
RUN
Color
Description
Green
Board status
indicator
Meaning
0.5 s on and 0.5 s off: The CNET operates
normally.
Normal status
Flashing
On or Off: The CNET operates abnormally.

0.125 s on and 0.125 s off: In the fast pull-in
status.
CLK
Green
Clock status
indicator
3 s on and 1 s off: In the locked status.

3 s off and 1 s on: In the holdover status.
3 s On and1 s
Off
1 s on and 1 s off: In the free-run status.
ACT
Green
Active/stand
by
status
indicator of
clock plane
On: In the active state.

Off: In the standby state.
On/Off
Table 10-2 Description of CNET panel interfaces

Interface
CLK IN0
Usage
Satellite synchronization clock source input interface 1 (leading in serial port text
information and 1PPS pulse).
10-5

Boards
Chapter 10 CNET
Interface
Usage
CLK IN1
Satellite synchronization clock source input interface 2 (leading in serial port text
information and 1PPS pulse).
CLK OUT0
Output differential PP16S pulse (It outputs one pulse every 16 seconds. The pulse is of
the same width as 1PPS).
CLK OUT1
Output 2 Mbps clock
CLK IN2
BITS clock or line clock input 1 (leading in 2 MHz, 2 Mbps and 8 KHz clock signals)
CLK IN3
BITS clock or line clock input 2 (leading in 2 MHz and 2 Mbps clock signals)

I. Technical indices of the circuit clock unit
z
Frequency precision: Output frequency deviation in free-run status is

!4.6 % 10-6/year.
-9
Holdover precision: Superior to !1 % 10 /day.
Pull-in range: !4.6 % 10 .
z
z
-6
-6
Pull-out range: !4.6 % 10 .

Drift transfer: Complies with the ITU-T G.812.

z
10-6

Boards
Chapter 11 CLPC
Chapter 11 CLPC
the CDMA line processing card (CLPC).
The CLPC with two 622 Mbps engines can process eight 155 Mbps ATM optical
interfaces.
In the case of large-capacity configuration, the CDMA line process unit (CLPU) with
four 622 Mbps engines and can process sixteen 155 Mbps ATM optical interfaces is
used.
The CLPC is configured in the CSWS.

11.1.1 Functions
The CLPC fulfills the following functions:
z
Serve as the control unit of line interface card to provide various subscriber ports
with different input/output interface units configured.
Provide eight 155 Mbps optical interfaces for ATM over SDH.
Provide dual-path links in the backup mode to form the dual-plane structure with
the switching network.
Implement the functions of the ATM layer in the ATM protocol reference model
and support the related protocols.
Support the constant bit rate (CBR), realtime variable bit rate (rt-VBR),
non-realtime variable bit rate (nrt-VBR), unspecified bit rate (UBR) and available
bit rate (ABR) defined by the ATM forum.
Ensure the quality of services (QoS) through different flow management.
Dispatch strategy and congestion management.
Add the internal cell head that contains the routing information, control
information to the cell at the interface of the switching network, and transmit the
cell to the switching network for cell switching.

The CLPC consists of power supply unit, control unit, ATM layer unit, and input/output
interface unit. Figure 11-1 shows the hardware structure of CLPC.
11-1

Boards
Chapter 11 CLPC
Control
unit
Input/output
interface unit
Backplane
bus
Transcoder and
high-speed
transceiver sub-unit
ATM layer
processing sub-unit
ATM?layer
Power supply unit
Figure 11-1 Hardware structure of CLPC
I. Power supply unit

The power supply unit supplies the power for the CLPC.
II. Control unit

The control unit fulfils the following functions:
z
Initialize and manage the major chips in the CLPC.
Establish, disconnect, and maintain the virtual connection in the switch.
Select and hand over the dual planes of the switching network.
III. ATM layer

Composed of the processing sub-unit and transcoder and high-speed transceiver
sub-unit, the ATM layer implements the functions of the ATM layer in the ATM protocol
reference model.
The ATM layer processing sub-unit accomplishes all the functions of the ATM layer.
The transcoder and high-speed transceiver sub-unit is in charge of signal conversion
and interface adaptation between the switching network interface and the high-speed
differential signal interface.
IV. Input/output interface unit

The input/output interface unit is the sub-board of the CLPC. The CLPC can be
equipped with two ATM-featured input/output interface units to support the physical
user interface for ATM over SDH.

Figure 11-2 shows the side view and the panel silk screen of the CLPC.
Table 11-1 describes the indicators on the CLPC panel.
11-2

Boards
Chapter 11 CLPC
RUN
Input/output
interface unit
Input/output
interface unit
Figure 11-2 Side view and panel silk screen of CLPC

Table 11-1 Meaning of CLPC indicators
Indicator
Color
Description
RUN
Green
Board status
indicator
Normal
status
Meaning
0.5 s on and 0.5 s off: The CLPC runs
normally.
On or Off: The CLPC is faulty.
0.5 s on
and 0.5 s
off

z
The
CLPC
offers
eight
155Mbps
SONET
OC-3c/SDH
STM-1
multi-mode/single-mode optical (MT-RJ connector) interfaces.

z
The operating wavelength of single-mode optical interface ranges from 1261 nm

to 1360 nm; whereas that of multi-mode optical interface ranges from 1270 nm to
1380 nm. The central wavelength of single/multi-mode optical interfaces is
1300 nm.
The maximum transmission distance of multi-mode optical interface is 500 m;

and that of single-mode optical interface is 15 km.
11-3

z
Boards
Chapter 11 CLPC
The maximum average transmit power of single-mode optical interface is 8

dBm and the minimum is 15 dBm. The receiving sensitivity is 31 dBm and the
receiving overload power is 8 dBm.
The maximum average transmit power of multi-mode optical interface is 14

dBm and the minimum is 19 dBm. The receiving sensitivity is 30 dBm and the
receiving overload power is 14 dBm.

z
11-4

Boards
Chapter 12 CFMR
Chapter 12 CFMR
the CDMA radio frame (FP MAC RLC) processing board (CFMR).
The CFMR processes layer 2 protocol of the radio link.
The CFMR is configured in the CIPS.

12.1.1 Functions
The CFMR fulfils the following functions:
z
Frame protocol processing function

The frame protocol processing module processes the service frames on the Abis
and A3 interfaces.
In the uplink direction, it extracts the frame number, frame quality indication, time
adjustment and BTS power measurement parameters in the FCH/SCH data from
the service frames.
In the downlink direction, it fills the frame number, forward and reverse link
power control parameters to the downlink service frames.
In addition, it carries out the cyclic redundancy check (CRC) for the service
frames.
Selection and distribution function

During a soft handoff, the CFMR decides the MS uplink signal frames in several
cells and chooses the best frame for next processing. It duplicates the downlink
signal frame and then distributes the frames to several downlink tributaries.
Outer-loop power control function

The CFMR exercises the outer-loop power control using a specific algorithm
based on the power control parameters configured and the power measurement
values reported on the uplink.
Multiplexing/demultiplexing function
Multiplexing/demultiplexing is a major function of the Media Access Control
(MAC) processing.In the downlink direction, the CFMR encapsulates the
signaling data, voice data and packet data into the MuxPDU.
In the uplink direction, it identifies different MuxPDUs from the uplink frames, and
then separates the signaling data, voice data and packet data from the
12-1

Boards
Chapter 12 CFMR
MuxPDUs and sends the data to LAC SAR and TRAU frame protocol processing
unit and RLP processing unit respectively.
z
LAC SAR function

The CFMR accomplishes the SAR sub-layer function of the link access control
(LAC). In the downlink direction, it splits LAC PDUs into fragments and fills them
in the MuxPDU. In the uplink direction, it separates LAC data from the MuxPDU
and reassembles them into LAC PDUs.
Radio link protocol (RLP) function

The RLP is a functional entity in the MAC processing. It ensures reliable
transmission of the packet data.
Internal protocol processing unit function

The CFMR processes the internal communication protocol between the CSPU
and the CFMR, and transports LAC PDUs and control frames.
The control frames include the RLP_BLOB parameters used by the RLP unit,
logical/physical mapping parameters used by the multiplexing/demultiplexing unit,
selection and distribution algorithm, outer-loop power control algorithm, and
power control target value.
Transcoder and rate adaptation unit (TRAU) frame protocol processing

The CFMR adds TRAU frame protocol to the voice service frames demultiplexed
from the MAC and transports them to the CEVC.
The voice service frames sent from the CFMR include frame synchronization,
in-band commands, frame data, and CRC bits.

The operating principles of the CFMR are illustrated in Figure 12-1.
Backplane
bus interface
module
Flash
BootRom
Protocol
processing
module
Central
processing
module
Clock
module
SDRAM
Power module
Figure 12-1 Hardware structure of CFMR
12-2
Backplane
bus

Boards
Chapter 12 CFMR
I. Protocol processing module

The protocol processing module is configured with a special high-performance chip
which accomplishes the MAC and LAC SAR functions of the dedicated channel in the
BSC. It performs:
z
Processing, selection/ distribution, multiplexing and quality of service (QoS)

control of frame protocol
RLP protocol processing
LAC SAR
TRAU frame protocol processing
Relevant operation and maintenance control
II. Central processing module

The central processing module is configured with a high-performance CPU which
processes the high-speed traffic data and control data and reports board status. It
performs ATM SAR, interface protocol processing and data distribution, operation and
maintenance, and service resource management.
III. Backplane bus module

The CFMR communicates with other boards in the CIPS through the backplane bus,
that is, it exchanges control information with the CMUX and traffic data with
CBIE/CXIE.
IV. Clock module

The clock module provides clock for the functional modules of the CFMR. It also
drives the clock signals generated by the CFMR and adjusts their phases to meet the
requirements.
V. Power module
The power module supplies power for the functional modules of the CFMR.

Figure 12-2 shows the side view and the panel silk screen of the CFMR.
Table 12-1 describes the indicators on the CFMR panel.
12-3

Boards
Chapter 12 CFMR
RUN
ALM
ACT
Figure 12-2 Side view and panel silk screen of CFMR

Table 12-1 Meaning of CFMR indicators
Name
Color
Description
Meaning
Normal
status
On: There is power input while the CFMR is faulty.

Off: There is no power input or the CFMR is faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CFMR runs normally.

0.125 s on and 0.125 s off: The CFMR is being
loaded.
1 s on
and 1 s
off
2 s on and 2 s off: The CFMR is under self-test.

ALM
Red
Alarm indicator
ACT
Green
Active/standby
status indicator
Off: Normal.
On: The CFMR is in the active state.
Off: The CFMR is in the standby state.

z
12-4
Off
On

z
Boards
Chapter 12 CFMR
12-5

Boards
Chapter 13 CSPU
Chapter 13 CSPU
the CDMA signal processing unit (CSPU).
The CSPU processes the interface signaling and call signaling, and distributes
service processing resources.
It is configured in the CIPS, operating in 1+1 backup mode.

13.1.1 Functions
The functions of CSPU include:
z
Process upper-layer signaling messages on such interfaces as Um, Abis, A1, A3,
A7 and A9.
Allocate various resources necessary to establish signaling and traffic

connections.
Process call signaling messages.

Figure 13-1 shows the hardware structure of CSPU.
Intra-board
bus
Backplane bus
interface module
Debugging network
interface
SDRAM
DIMM
Central
processing
module
Flash
BootROM
Logic
Watchdog
Clock module
SDRAM
Power module
Figure 13-1 Hardware structure of CSPU

13-1
Backplane
bus

Boards
Chapter 13 CSPU
The CSPU is equipped with a high-performance processor and a powerful

z
Watchdog, monitoring the processor system and ensuring that the board can
recover itself by means of reset in the case of a fault.

the time sequence of important signals, address translation, and active-standby
switchover.
The functions of the CSPU hardware include:

z
Provide one 10 M/100 Mbps Ethernet interface and one RS-232 serial interface
for debugging.
Provide one operation and maintenance (O&M) serial port as emergency

channel.
Support 1+1 backup.

Figure 13-2 shows the software structure of CSPU.
Protocol
processing
Radio
resource
management
BTS
management
Main program
Bottom layer drive
Figure 13-2 Software structure of CSPU

1)
Protocol processing module

This module performs the following functions:
13-2
O&M

z
Boards
Chapter 13 CSPU
Process the upper-layer signaling messages on such interfaces as the Um,
Abis, A1, A7, A3, and A9.
2)
Control the signaling flow and allocation of service resources.
Establish and release signaling and traffic connections.
Process call signaling.
Radio resource management module

This module perform the following functions:
z
Manage logical radio interface channel resources.
Allocate and release radio channel resources as requested.
Control soft handoff, softer handoff, and hard handoff of MS according to the
radio environment measurement information on the Um interface.

z
Control transmission power of the MS and the BTS according to the service
demands and QoS.

3)
BTS management module

This module perform the following functions:
4)
Establish and reconfigures logic resources.
Monitor the real-time status of logic resources.
Block and unblock logic resources.
O&M module
performs such functions as maintenance, configuration, alarm management, and
measurement.

Figure 13-3 shows the side view and panel silk screen of CSPU.
Table 13-1 describes the meanings of the indicators on the CSPU panel.
13-3

Boards
Chapter 13 CSPU
RUN
ALM
ACT
Figure 13-3 Side view and panel silk screen of CSPU

The status of the indicators is defined as follows.
Table 13-1 Meaning of CSPU indicators
Name
Color
Description
Meaning
Normal
status
On: There is power input but the CSPU is faulty.

Off: There is no power input or the CSPU is faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CSPU operates normally.

0.125 s on and 0.125 s off: The CSPU is being
loaded.
1 s on
and 1 s
off
2 s on and 2 s off: The CSPU is under self-test.

Off: Normal.
ALM
Red
Alarm indicator
On (or fast flashing): Alarm status, indicating a fault

in the CSPU operation.
ACT
Green
Active/standby
status
indicator
On: The CSPU is in the active state.

Off: The CSPU is in the standby state.
13-4
Off
On/Off

Boards
Chapter 13 CSPU

z
13-5

Boards
Chapter 14 CLAP
Chapter 14 CLAP
the CDMA link access protocol board (CLAP).
The CLAP processes the MTP-2 layer of 64 kbps SS7 link and supports the A1
interface of the BSC.
The CLAP is configured in the CIPS.

14.1.1 Functions
The CLAP performs the following functions:
1)
The functions specified in the ITU-T Q.703, including:

z
Initial alignment control (IAC)
Congestion control (CC)
Receiving control (RC)
Link status control (LSC)
Delimiting, locating and error-checking of processor out-of-service control
(POC) signal units
2)
3)
Signaling link unit error rate monitoring (SUERM)
Alignment error rate monitoring (AERM)
Measurement, maintenance, and troubleshooting of SS7 signaling link

z
Measurement
In-circuit test
Traffic control
Impact of error codes on links
Reliable link communication
Maintenance, including:
z
Implementing kickoff procedures of the MTP-2 module on the CLAP
Providing external maintenance and alarm interfaces to the MTP-2 module

Figure 14-1 shows the hardware structure of the CLAP.
14-1

Flash
BootROM
SDRAM
Boards
Chapter 14 CLAP
Backplane bus
interface module
Central
processing
module
64Kbit/s
SS7
processing
Backplane
bus
TDM
switching
Clock
module
Power module
Figure 14-1 Hardware structure of CLAP

The central processing module (64 kbps SS7 signaling processing) is equipped with a
high-performance CPU that processes SS7 signaling and control data, and reports
the running status of the CLAP.
The central processing module performs interface protocol processing and data
distribution, operation and maintenance, traffic resource management, and the
processing of sixteen 64 kbps SS7 signaling links.
II. Backplane bus interface module

The CLAP communicates with the CMUX through the backplane bus that serves as
the O&M interface and data/signaling channel between the two boards.
III. Clock module

The clock module provides the clock for the functional modules of the CLAP. It also
drives the clock signals generated by the CLAP and adjusts their phase to meet the
requirements.
IV. Power module

The power module supplies power for the functional modules of the CLAP.

Figure 14-2 shows the side view and the panel silk screen of the CLAP.
Table 14-1 describes the indicators on the CLAP panel.
14-2

Boards
Chapter 14 CLAP
RUN
ALM
ACT
Figure 14-2 Side view and panel silk screen of CLAP

Table 14-1 Meaning of CLAP indicators
Name
Color
Description
Meaning
Normal
status
On: There is power input while the CLAP is faulty.

Off: There is no power input or the CLAP is faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CLAP runs normally.

0.125 s on and 0.125 s off: The CLAP is being
loaded.
1 s on and
1 s off
2 s on and 2 s off: The CLAP is under test.

ALM
Red
Alarm
indicator
Off: Normal.
ACT
Green
Active/standby
status
indicator
On: The CLAP is in the active state.
Off: The CLAP is in the standby state.

z
14-3
Off
On

Boards
Chapter 14 CLAP
14-4

Boards
Chapter 15 CEVC and CEVD

theCDMA Enhanced Vocoder with echo Canceller (CEVC) or CDMA Enhanced
Vocoder with EC Disabled (CEVD).
The CEVC or CEVD performs such functions as voice coding/decoding and circuit
data service rate adaptation. The only difference between the CEVC and the CEVD is
that the CEVC offers the echo cancellation function, whereas the CEVD does not.
The following describes the CEVC and its difference from the CEVD.
The CEVC/CEVD is configured in the CIPS.

15.1.1 Functions
The CEVC performs the following functions:
z
Supporting three coding modes: EVRC, QCELP8K, and QCELP13K.
Implementing ISLP rate adaptation for circuit data services under 64 kbps.
Checking and inputting dual-tone multi-frequency (DTMF) signals.
Providing the echo cancellation function between the mobile station (MS) and
public switched telephone network (PSTN) (the CEVD does not).
Supporting other functions (such as TTY/TDD) if necessary.
Processing the TRAU-transcoder link (TTL) frame protocol.

Figure 15-1 shows the hardware structure of CEVC. The CEVD is not equipped with
the echo cancellation module.
15-1

Boards
Backplane
bus interface
module
Backplane
bus
Echo
cancellation
module
Central
processing
module
Flash
Voice
processing
module
SDRAM
Clock
module
Power module
Figure 15-1 Hardware structure of CEVC
I. Voice processing module

The voice processing module is configured with a special high-performance chip
which is responsible for the conversion between PCM voice codes and other voice
codes. It performs:
z
Voice coding/decoding
DTMF signal check and input
TTL frame protocol processing
Relevant software operation and maintenance
Echo cancellation
II. Central processing module

The central processing module is configured with a high-performance CPU which
processes the high-speed traffic data and control data and reports board status. It
performs interface protocol processing and data distribution, operation and
maintenance, and traffic resource management.
III. Backplane bus module

The CEVC communicates with the CMUX in the CIPS through the backplane bus.
IV. Clock module

The clock module provides clocks for the functional modules of the CEVC. It also
drives the clock signals generated by the CEVC and adjusts their phases to meet the
requirements.
15-2

Boards
V. Echo Cancellation Module

The echo cancellation module is configured with a special echo cancellation chip to
realize echo cancellation for code stream signals.
VI. Power module

The power module supplies power for the functional modules of the CEVC.

Figure 15-2 shows the side view and the panel silk screen of the CEVC.
Table 15-1 describes the indicators on the CEVC panel.
RUN
ALM
ACT
Figure 15-2 Side view and silk screening view of CEVC
15-3

Boards
Table 15-1 Meaning of CEVC indicators

Name
Color
Description
Meaning
Normal
status
On: There is power input while the CEVC is faulty.

Off: There is no power input or the CEVC is faulty.
RUN
Green
Board status
indicator
1 s on and 1 s off: The CEVC runs normally.

0.125 s on and 0.125 s off: The CEVC is being
loaded.
1 s on
and 1 s
off
2 s on and 2 s off: The CEVC is under self-test.

ALM
Red
Alarm indicator
ACT
Green
Active/standby
status
indicator
Off: Normal.
On: The CEVC is in the active state.
Off: The CEVC is in the standby state.

z
15-4
Off
On

Boards
Chapter 16 CIWF
Chapter 16 CIWF
the CDMA interworking function board (CIWF).
The CIWF processes circuit data services such as asynchronous data, facsimile G3,
and analog facsimile. Each CIWF can process 18 integrated IWF services.
When the CIPS needs to support IWF services, two CIWFs are configured in slots 4
and 14 of each CIPS. If the CIPS is not required to support IWF services, there is no
need to configure the CIWF.

16.1.1 Functions
The CIWF facilitates the whole BSC system to complete the following functions:
z
Asynchronous data processing
Facsimile G3 processing
Analog facsimile processing

I. Hardware operating principles
Figure 16-1 shows the hardware structure of CIWF.
Backplane bus
interface module
Central
Backplane
bus
switching
MODEM
processing
module
module
CPU
system
module
Power
module
Figure 16-1 Hardware structure of CIWF

The CPU system module of the CIWF is configured with a powerful communication
controller. The peripherals of the module are configured with:
z
SDRAM DIMM, the memory of the CPU
Flash/BootROM for storing the startup program and applications

16-1

Boards
Chapter 16 CIWF
SDRAM, the buffer space for communication
Watchdog, designed to monitor the CPU system and ensure that the CIWF can
recover itself by means of reset in the case of failure
The backplane bus interface module, offering interfaces between the CIWF and
the backplane including the channels for operating information, operation and
maintenance, and board emergency
The central switching module, switching the signals to different modules for
processing
MODEM processing module, processing MODEM protocol
The hardware of the CIWF implements the following functions:

z
Perform SAR of AAL5 cells.
Process the MODEM protocol.
Provide one 10M/100Mbit/s Ethernet interface and one RS-232 serial port for
debugging.
Provide one operation and maintenance serial port as emergency channel.
II. Software operating principles

The software modules of CIWF are shown in Figure 16-2.
Signaling
Service
O&M
Operating system
Bottom layer drive
Figure 16-2 Software structure of CIWF

z
The bottom layer drive covers various drive software at the bottom layer of the
CIWF.
The operating system is a high-performance built-in operating system. It adopts

the TCP/IP protocol stack of Huawei.
The operation and maintenance module provides operation and maintenance

software for the CIWF.
The signaling module supplies the interface signaling control software for the
CIWF.
The service module includes various service software for processing facsimile
service, Modem control, asynchronous data service, and AT commands.
16-2

Boards
Chapter 16 CIWF

Figure 16-3shows the side view and the panel silk screen of the CIWF.
Table 16-1 describes all the indicators on the CIWF panel.
Table 16-2 describes the interfaces on the CIWF.
RUN
ALM
E1-3 E1-2 E1-1E1-0
ETH
RESET
Figure 16-3 Side view and panel silk screen of CIWF

Table 16-1 Meaning of CIWF indicators
Name
Color
Descriptio
n
Meaning
Normal
status
On: There is power input while the CIWF is faulty.
RUN
Green
Board
status
indicator
Off: There is no power input or the CIWF is faulty.

1 s on and 1 s off: The CIWF runs normally.
0.125 s on and 0.125 s off: The CIWF is being
loaded.
1 s on and
1 s off
2 s on and 2 s off: The CIWF is under the test.

ALM
Red
Alarm
indicator
Off: No fault.
On (including fast flashing): Fault occurs.
16-3
Off

Boards
Chapter 16 CIWF
Table 16-2 Description of CIWF interfaces

Interface
Description
Usage
ETH
Ethernet interface
Used as a network interface for debugging
E1-0
E1 interface for cable 0
Connected with E1 cable 0(Reserved for function expansion)
E1-1
E1-2
E1-3

z
16-4

Boards
Chapter 17 CAIE
Chapter 17 CAIE
the CDMA A-interface equipment (CAIE).
Each CAIE provides 32 E1/T1 trunks, 960 A-interface circuits, and the A1/A2 interface
between the BSC and the MSC.
The CAIE is configured in the CIPS and the CTCS.

17.1.1 Functions
The CAIE implements the following functions:
z
Provision of E1/T1 interfaces
TDM switching and rate conversion
Clock extraction

Figure 17-1 shows the hardware structure of CAIE.
Clock output
Clock output
32XE1/T1
Backplane Clock
Clock module
Level
conversion
Clock input
E1/T1 line
interface module
Backplane
bus
TCH
Switching
array
module
System bus
Central
processing
module
Backplate bus
interface module
O&M
channel
Power module
Figure 17-1 Hardware structure of CAIE
The CAIE consists of the following functional modules:
z
Central processing module
17-1

Boards
Chapter 17 CAIE
Backplane bus interface module
Switching array module
E1/T1 line interface module
Clock module
Power module

The central processing module initializes and controls the chips on the CAIE and
handles other services.
II. Backplane bus interface module

The backplane bus interface module provides bus interface to the backplane,
implements bus conversion and provides maintenance channels.
III. E1/T1 line interface module

The E1/T1 line interface module implements the link transmission function. It provides
75 non-equilibrium and 120 equilibrium transmissions, and supports 32 E1s/T1s
at most. Meanwhile, the module also extracts the E1/T1 line clock.
IV. Switching array module

The switching array module performs timeslot switching and rate conversion of TDM
code streams.
V. Clock module
The clock module provides all the clocks required by the CAIE.
VI. Power module

The power module supplies power for the functional modules of the CAIE.

Figure 17-2 shows the side view and the panel silk screen of the CAIE.
Table 17-1 describes the indicators on the CAIE panel and Table 17-2 lists the
interfaces on the panel and their connections.
17-2

Boards
Chapter 17 CAIE
S3
S2
S16
S18
S15
S12
S10
S17
S13
RUN
ALM
ACT
S11
S7
S6
E1/T1
E1/T1
E1/T1
E1/T1
CLK1
S5
S4
S9
S8
CLK2
J18
Figure 17-2 Side view and panel silk screen of CAIE

Table 17-1 Meaning of CAIE indicators
Name
Color
Description
Normal
status
Meaning
On: There is power input while the CAIE is faulty.
RUN
Green
Board
status
indicator
Off: There is no power input or the CAIE is faulty.

1 s on and 1 s off: The CAIE runs normally.
0.125 s on and 0.125 s off: The CAIE is being
loaded.
1 s on and 1
s off
2 s on and 2 s off: The CAIE is under self-test.

ALM
Red
Alarm
indicator
Off: Normal.
ACT
Green
Active/stand
by status
indicator
On: The CAIE is in the active state.
Off: The CAIE is in the standby state.
17-3
Off
On

Boards
Chapter 17 CAIE
Table 17-2 Description of CAIE interfaces

Interface
Usage
Connection
E1/T1
E1/T1
interface
used to connect
E1/T1 cables.
Connected with the external E1/T1 cables 0 31. The lowest

E1/T1 interface corresponds to the E1/T1 cables 0 7, in an
ascending order.
CLK1
Output interface 1
for 2 MHz clock
reference source
Sharing the same source with CLK2. If the CAIE acts as the active
clock reference source, CLK1 shall be connected to IN0 on the
GPS/GLONASS& ClocK Processing Board (GCKP). If the CAIE
acts as the standby clock reference source, CLK1 shall be
connected to IN1 on the GCKP.
CLK2
Output interface 2
for 2 MHz clock
reference source
Sharing the same source with CLK1. If the CAIE acts as the active
clock reference source, CLK2 shall be connected to IN0 on the
GCKP. If the CAIE acts as the standby clock reference source,
CLK2 shall be connected to IN1 on the GCKP.
17.3 DIP Switches

Table 17-3 describes the DIP switches on the CAIE.
Table 17-3 Description of CAIE DIP switches
DIP
switch
S2
S3
S15
S18
S4
S5
S6
Status
Meaning
Description
On
Off
Impedance matching selection indication

of E1/T1 cables 0 7. Its status must be
consistent with that of S4 and S5.
On
Off
On
Off
On
Off
On
Off
On
The 75 : coaxial cable is selected
Off
On
Off
17-4

of E1/T1 cables 8 15. Its status must
be consistent with that of S6 and S7.
Impedance matching selection of E1/T1
cables 0 3
cables 4 7
cables 8 11

DIP
switch
Status
Meaning
Description
On
Off

cables 12 15
On
Off
On
Off
On
Off
On
Off
On
Connected to the protection ground

(PGND)
Off
Disconnected
On
Connected to PGND
Off
Disconnected
On
Connected to PGND
Off
Disconnected
On
Connected to PGND
Off
Disconnected
S7
S11
S12
S16
S17
S8
S9
S10
S13
Boards
Chapter 17 CAIE

cables 16 19
cables 20 23
cables 24 27
cables 28 31
TX PGND switch of E1/T1 cables 0 7
Note:
In Table 17-3, both S2 and S4/S5 indicate the impedance matching of E1/T1 cables 0 7. However,
there is a difference between S2 and S4/S5. The S2 is the logical matching indication, informing the
software of the current transmission mode. Whereas the S4/S5 physically indicates selecting the
corresponding transmission mode by turning on or off the switch. The meanings for impedance matching
selection of E1/T1 cables 8 31 are the same.
S8, S9, S10 and S13 indicate the grounding status of E1/T1 cables 0 31. If 75 coaxial cable is used,
the relevant TX PGND switch must be set to On, that is, the transmitting end of the cable must be
connected to the PGND. If the E1/T1 twisted pair is used, the relevant TX PGND switch must be set
to Off, that is, the transmitting end of the cable must not be connected to the PGND.
17-5

Boards
Chapter 17 CAIE

z
Providing 32 E1s/T1s.
Extracting the E1/T1 line clock and outputting active/standby reference clock
sources.
Supporting 75 coaxial cable and E1/T1 twisted pair transmission.
Complying with the ITU-T G.703 recommendations in physical features and with
the ITU-T G.704 recommendations in transmission frame structure.

z
Board dimensions: 366.7 mm % 340 mm
17-6

Boards
Chapter 18 CSTU
Chapter 18 CSTU
the CDMA synchronous transport unit (CSTU).
The CSTU is a kind of standard STM-1 transmission equipment of the SDH optical
transmission system. It multiplexes multiple pulse code modulation (PCM) voice
channels on the SDH STM-1 optical fibers (capable of carrying a maximum of 63 E1s)
for transmission.
The CSTU is configured in the CIPS and CTCS.

18.1.1 Functions
The functions of CSTU include
z
Converting narrowband time slot signals to SDH signals.
Extracting clock signals.

Figure 18-1 shows the hardware structure of CSTU.
Debugging network port
155M optical interface
2MHz clock
2M HDLC
Aggregate
module
Lower order
cross-connect
module
Tributary
module
Clock module
Power module
Figure 18-1 Hardware structure of CSTU
18-1
Switching
module
Backplane bus
155M electrical interface
Main control unit

Boards
Chapter 18 CSTU
In terms of functions, the CSTU covers such modules as main control module, lower
order cross-connect module, aggregate module, tributary module, clock module,
switching module and power module.
I. Main control module

This module
z
Initiates this CSTU system.
Monitors the CSTU status.
Performs the switching and establishes connection in real time.
Communicates with the main control board in real time.
II. Aggregate module

The dual STM-1 aggregate module performs the following functions:
z
Light-electric conversion
Clock recovery
Regenerator Section Terminal (RST)
Multiplex Section Terminal (MST)
Multiplex Section Adaptation (MSA)
Higher-order Path Terminal (HPT)
Higher-order Path Adaptation (HPA)
Tributary Load Processing (TPP)
Other auxiliary functions
III. Lower order cross-connect module

This module performs the cross-connect function for the lower-order path VC-12.
IV. Tributary module

This module is responsible for
z
Convergence
Framing/de-framing
Mapping from VC-12 to VC-4 (i.e. converging the 2 Mbps code stream to 155
Mbps code stream after the mapping, locating and multiplexing)
Demapping
V. Clock module
This module performs the phase locking function for the clock. It provides working
clock for such modules as aggregate module, lower order cross-connect module,
tributary module and switching module.
VI. Switching Module

This module
18-2

Boards
Chapter 18 CSTU
Extracts/inserts link timeslots from/into E1 cables.
Aligns the timeslots assigned to the voice channel.
Multiplexes the High level Data Link Control (HDLC) signals used for the
maintenance of this CSTU to the 16MTDM bus.
VII. Power module

This module supplies power for the functional modules of the CSTU.

Figure 18-2 shows the side view and panel silk screen of CSTU. Table 18-1 describes
the meanings of the indicators on the CSTU panel and Table 18-2 explains the
meanings of panel interfaces and their connection relationship.
RUN
ALM
ACT
RESET
CLK
TX
RX
RX
TX
Figure 18-2 Side view and panel silk screen of CSTU

Table 18-1 Meaning of CSTU indicators
Name
Color
Description
RUN
Green
Board
indicator
status
ALM
Red
Alarm indicator
ACT
Green
Active/standby
status indicator
Meaning
On: There is power input but the CSTU is faulty.
Off: There is no power input or the CSTU is faulty.
Flashing at 0.5 Hz: The CSTU operates normally.
Flashing at 4 Hz: The CSTU is being loaded.
On: In alarm status.
Off: In normal operation.
Off: Not in use.
18-3
Normal status
Flashing at 0.5
Hz
Off
Off

Boards
Chapter 18 CSTU
Table 18-2 Description of CSTU interfaces

Interface
Usage
Connection relationship
RESET
Reset the CMUX.
CLK
2 MHz clock reference

source output
TX
RX
RX
TX
Transmit port of
electrical interface
Receive port of
electrical interface
Receive port of
optical interface
Transmit port of
optical interface
STM-1
STM-1
STM-1
STM-1
Press it to reset the board.

If defined as the active clock reference source, this CSTU shall be
connected to IN0 on the GCKP. If defined as the standby clock
reference source, it shall be connected to IN1 on the GCKP.
Transmit data via the STM-1 electrical interface.
Receive data via the STM-1 electrical interface.
Receive data via the STM-1 optical interface.
Transmit data via the STM-1 optical interface.

I. Interface Indices
1)
Indices of single-mode optical interface
Transmitting optical power: -8 dBm -14 dBm

Receiving sensitivity: < -34 dBm
Wavelength: 1310 nm
Interface type: SC/PC interface
Optical fiber link rate on the optical interface: 155.52 Mbit/s
Transmission distance: [ 30 km
2)
The performance indices comply with such standards as ITU-T Rec. G. 707,
ITU-T Rec. G. 708, ITU-T Rec. G. 709, ITU-T Rec. G. 782, ITU-T Rec. G. 783,
ITU-T Rec. G. 725, and ITU-T Rec. G. 823.

Input voltage: -36 V DC -72 V DC
18-4

Boards
Chapter 19 GCKP
Chapter 19 GCKP
This chapter introduces the functions, operating principles, and technical indices of the
GPS/GLONASS and clock processing board (GCKP)
The GCKP in the clock processing module (CLKM) receives and processes the satellite
synchronization clock signals, provides the GPS time information for network time
synchronization, and provides synchronization clock signals for transmission
synchronization.
The GCKP can receive and process the GPS signals or GPS/GLONASS signals,
depending on the satellite signal receiver configured (GPS receiver or GPS/GLONASS
receiver).

19.1.1 Functions
The GCKP implements the following functions:
z
Receive timing information of the GPS/GLONASS satellite synchronization

system.
Process GPS/GLONASS timing information received to get the PP16S signal and
GPS time information, and then send them to the CMUX in the CRPS for time
synchronization.
Feeding power to the GPS/GLONASS satellite antenna system, and output

PP16S signals and GPS time information in case of timing information interruption
of the satellite antenna system.
Conduct phase locking over the external synchronization clock reference source
or the GPS clock to provide 8 kHz clock for the CMUX in the CRPS as
phase-locking reference source, so that the clock of the CMUX can be
synchronized with the upper-level clock.
19.1.2 Operating principles

Figure 19-1 shows the hardware structure of GCKP.
19-1

Boards
Chapter 19 GCKP
Network interface
Control module
Satellite antenna
Satellite access
module
PP16S
1PPS
Time holdover
module
Clock input 1
Clock input 2
8kHz clock
Test clock
Clock extraction/
lead-in module
CPC system
Absolute time
information
Clock
phase-locking
module
Power module
Figure 19-1 Hardware structure of GCKP

1)
CPU System
The CPU system is responsible for FPGA loading, board maintenance and
management, data storage, protocol processing and conversion, and software
phase-locking algorithm.
2)
Satellite access module

The satellite access module comprises a GPS card or a GPS/GLONASS card.
After receiving the GPS/GLONASS satellite signal through antenna, the satellite
signal receiver processes the signal and outputs the 1PPS pulse signal. In
addition, the CPU system on the GCKP communicates with the receiver through
the serial port, sending commands to the receiver, detecting its status and
analyzing the information from it.
3)
Time holdover module

The time holdover module enables the time holdover function of the GCKP, so that
the GCKP can output PPS and time information upon the loss of GPS clock
source.
4)
Clock phase-locking module

Under the control and cooperation of the CPU system, the clock phase-locking
module selects an external reference clock as the phase-locking reference source.
After certain processing, the module conducts digital phase discrimination
between the selected reference clock and the local reference clock to get some
phase data. It then outputs the phase data to the CPU system for processing. The
CPU system adjusts and outputs the frequency and phase of the clock. A complete
phase-locked loop is thus established.
19-2

5)
Boards
Chapter 19 GCKP
Clock extraction/lead-in module

The clock extraction/lead-in module extracts the 2 MHz clock from the line and
leads it in as the external synchronization clock source.
6)
Control module
The control module fulfills the following functions:
7)
Active-standby switchover
Serial port release protection
Reset and watchdog function
Satellite signal receiver identification
Power module
This module provides the GCKP with various types of power supplies to ensure
the normal power supply of all modules.

Figure 19-2 shows the panel of the GCKP.
Table 19-1 describes the meanings of the indicators on the GCKP panel, and Table
19-2 describes the interfaces.
RUN ALM
COM
ACT
IN0
IN1
OUT
ANT
Figure 19-2 Panel silk screen of GCKP

Table 19-1 Meaning of the GCKP indicators
Name
Color
RUN
Green
Description
Operation
indicator
Meaning
On or off: The GCKP is faulty.
0.5 s on and 0.5 s off: The GCKP is
normal.
Normal status
0.5 s on and 0.5 s
off
Off: Normal.
ALM
Red
Alarm indicator
On (or fast flashing): Alarm status,

indicating a fault in the GCKP operation.
ACT
Green
Clock
status
indicator
On: The GCKP is in the active state.

Off: The GCKP is in the standby state.
19-3
Off
On/off

Boards
Chapter 19 GCKP
Table 19-2 Meaning of GCKP interfaces

Interface
Usage
Remarks
IN0
Input interface 0 for BITS clock or

line clock e.g., 2 MHz clock, 2
Mbps clock and 8 kHz clock
Connected to the BITS clock source or to the

CLK1/CLK2 on the CAIE (when the CAIE is used for
line clock extraction and output).
IN1
Input interface 1 for BITS clock or

line clock e.g., 2 MHz clock and 2
Mbps clock
Connected to the BITS clock source or to the

CLK1/CLK2 on the CAIE (when the CAIE is used for
line clock extraction and output).
COM
Maintenance serial port/output

interface for 1PPS/satellite time
information
Reserved
OUT
Output interface for 2 MHz test

clock
Used to test clock output indices
ANT
Interface for GPS/GLONASS

satellite antenna
Connected to the antenna and used to receive

timing/positioning
information
from
the
GPS/GLONASS satellite system.

I. Performance indices
1)
Clock synchronization performance indices
Free-run frequency accuracy: 4.6 % 10-6 (1 year)
Pull-in range: ! 4.6 % 10-6
2)
Time synchronization performance indices
When the 1PPS is lost, the PP16S should be kept in holdover status for output. In the
holdover status, the MRTIE shall be less than 9 s (within eight hours in holdover
status).

z
19-4

Boards
Chapter 20 GCKB
Chapter 20 GCKB
This chapter introduces the functions, operating principles, and technical indices of the
GPS/GLONASS and clock subrack backplane (GCKB).
The GCKB in the CLKM is used to connect the two GCKPs to realize active-standby
switchover and clock-interlocking for the two boards. It also provides operation and
maintenance channel for the two boards, and provides the system clock output
interface for the CLKM.

Figure 20-1 shows the panel silk screen of the GCKB, and Table 20-1 describes the
meanings of the interfaces.
CLK_B
COM_B
ETH_B
CLK_A
C OM_A
ETH_A
Figure 20-1 Panel silk screen of the GCKB

Table 20-1 Description of interfaces on GCKB
Interface
identification
Usage
Remarks
CLK_B
Output interface for PP16S/8 kHz

Clock signal
Connected to 1PPS on the CMUX in slot 8
COM_B
Output interface for satellite time

information/CLKM
maintenance
serial port
Connected to COM1/COM2 on the CMUX

in slot 8
ETH_B
Network port for loading the standby

GCKP
Connected to BAM through the network

port of the LAN switch. This port can be left
unconnected after the board is normally
loaded.
CLK_A
Output interface for PP16S/8 kHz

Clock signal
Connected to 1PPS on the CMUX in slot 7
COM_A
Output interface for satellite time

information/CLKM
maintenance
serial port
Connected to COM1/COM2 on the CMUX

in slot 7
ETH_A
Network port for loading the active

GCKP
Connected to BAM through the network

port of the LAN switch. This port can be left
unconnected after the board is normally
loaded.
20-1

Boards
Chapter 21 Boards in Power Distribution Box

This chapter introduces the functions, operating principles, and system design of the
boards in the power distribution box. Then, this chapter describes the features of the
following boards:
z
Power and environment supervision unit (XPSU)
Supervision plug board (XSPB)
Lightning protection board (XLPB)
21.1 Overview
The power distribution box is installed in the upper part of the cabinet. It introduces two
48 V DC power supplies, and outputs four 48 V DC power supplies to the functional
subracks in the cabinet.
Designed with internal lightning protection and over-current protection, the power
distribution box ensures the reliability of the power supply. In addition, being able to
detect the input voltage and the statuses of the power supplies output, the power
distribution box can generate alarms when fault occurs.
21.1.1 Appearance
Figure 21-1 shows the appearance of the power distribution box.
(1) Indicator
(2) Power supply output switch
Figure 21-1 Appearance of power distribution box
21-1
(3) Mute switch

Boards
21.1.2 Functions and Operating Principles

In terms of function, the power distribution box consists of power distribution unit,
lightning protection unit, and monitoring unit, as shown in Figure 21-2. Figure 21-3
shows the structure layout of the power distribution box.
The boards installed in the power distribution box include:
z
XPSU
XSPB
XLPB
D1
-48V1
-48V
XLPB 1
BGND
EMC
D2
-48V2
Filter
XLPB 2
BGND
BGND
PGND
PGND
Input terminal bar
XLPB fault
detection
External sensor
Fault
detection
K1
-48V BGND
K2
K3
K4
J5 J6
XPSU
J1
J2
J3
J4
Fault detection
48V1 48V2 48V3 48V4

Serial
communication port
RUN
ALM
Indicator Indicator
MUTE
switch
Output terminal bar
Figure 21-2 Hardware structure of the power distribution box
21-2

Boards
Figure 21-3 Structural layout of the power distribution box
21.1.3 System Design

I. Power distribution
z
Wiring terminals
The 48V1, 48V2, two BGNDs and two PGNDs use a 6-pin connecting terminal
bar.
The BGND and PGND led into the cabinet can be short-circuited directly on the
connecting terminal bar.
The rated current of the input terminal is higher than 80 A.
The output terminals are divided into four groups, each of which can connect with
three loaded circuits. The rated current of each terminal is higher than 30 A.
Filter
A filter is built in the distribution box to filter the input power and diminish the
adverse effect of the communication system on the power supply.
K1 K4 switches
As mis-operation protective switches, the K1 K4 can prevent power shutdown
caused by unintentional press of the switch.
In addition, all the switches feature an over-current protection function. When the
current that goes through the switches reaches 30 A, the switches will be
disconnected automatically.
The K1 K4 switches control respectively the four 48 V power supplies on the
output connecting terminal. That is, they can distribute power to the subracks of
21-3

Boards
the cabinet independently. Hence, any power failure in a subrack will not affect the
power supply of the entire system.
Figure 21-1 describes the K1 K4 switches.
Isolation of input and output
The input and output parts are separated to reduce the EMC interference.
Heat dissipation
The distribution box dissipates heat by means of natural cooling. In addition, air
vents are reserved to form a cooling duct.
Table 21-1 Description of K1 K4 switches
Switch
No.
Rated
current
Power distribution in the

CCTR
Power distribution in the CBUR
K1
70 A
Controls the power supplies to

the subracks and fan boxes in
the lower part of the cabinet.
Controls the power supplies to the subracks

and fan boxes in the lower part of the cabinet.
K2
30 A
Controls the power supply to

the ckocj processing module
(CLKM).

and fan boxes in the middle of the cabinet.
K3
30 A
Controls the power supplies to

the subracks and fan boxes in
the upper part of the cabinet.

and fan boxes in the upper part of the cabinet.
K4
Reserved
Reserved
II. Lightning protection

z
XLPB
The power distribution box is equipped with two XLPBs to protect the cabinet
against the impact caused by the lightning surge current. Since there are two 48V
DC inputs, two independent XLPBs are equipped.
Lightning protection level

The circuit between 48V1/48V2 and BGND can bear 3 kA differential mode
current surge current without damage. The circuits between 48V1/48V2 and
BGND and those between 48V1/48V2 and PGND can bear 5 kA common mode
surge current without damage (but there may be a few error codes).
III. Monitoring system

1)
Power supply monitoring

z
The XPSU detects the input voltages of the two 48V power supplies and
reports the voltage values to the BAM. If the voltage is too low or too high, an
alarm will be generated.
21-4

z
Boards
The XPSU also detects the four independent power outputs. If the branch
switch is disconnected, an alarm will be generated.
If a device on the XLPB is damaged by the lightning surge, the XLPB will
output an optoelectronic isolated signal. The XPSU detects the fault signal on
a realtime basis.
2)
Environment monitoring
The power distribution box provides:
z
Cabinet door control detection
Eight Boolean value interfaces, and independent water sensor
Board temperature detection
Board humidity detection
Two analog interfaces
Three control port outputs for giving alarm indicator control signals for the
cabinet and enabling the cascading of the alarm indicators of the cabinets
interconnected
One RS232/RS485 serial port for the communication with the intelligent
network equipment in the room
3)
Serial port communication

Operating in the universal master/slave node protocol mode 3, the XPSU
communicates with the CMUX through the active and the standby serial ports, and
reports the power monitoring value and environment monitoring value as well as
alarm signals to the BAM.
4)
Alarm
All the alarm signals are shown by LED indicators, including the XPSU running
indicator and fault alarm indicator. Audible alarms can also be generated by the
buzzer (the buzzer can be enabled or disabled by setting the mute switch).
21.1.4 Technical Specifications

z
Power lead-in interface: 48V1, 48V2, BGND and PGND, led in by connecting
terminal bar.
Power lead-out interface: Four groups of independent 48V/BGND power

supplies, output through the connecting terminal bar.
Serial ports: Two RS232/RS485 serial ports (for communication with the superior
monitoring system or serving as reserved serial ports).
External interfaces: Eight on/off variable interfaces, two analog interfaces and
three control interfaces.
21-5

Boards
21.2 XPSU
The XPSU in the DC distribution box is designed to check parameters related to power
supply and environment, and report the information detected to the CMUX through
serial port.

I. Functions
The XPSU implements the following functions:
z
Detect the voltage of the two 48 V input power supplies.
Detect the Boolean value of the four 48 V output power supplies.
Detect the two Boolean values indicating the operating status of the lightning
protection devices on the XLPB.
Detect the input signals from the eight Boolean value interfaces.
Detect the two channels of analog input signals.
Detect board temperature signals.
Detect board humidity signals.
Report the above signals detected to the CMUX through the serial port.
Reset board and generating alarms according to the information received from the
CMUX.
II. Operating principles

1)
Hardware
An XPSU consists of CPU monitoring module, A/D conversion module, Boolean
value detect module, serial port communication module, digital logic module, and
output control module. Figure 21-4 shows the functional blocks of the hardware.
Output power supply

8 Boolean value inputs
Lightning-protection isolation input
Power voltage
Humidity sensor
2 analog value inputs reserved
Extended serial port
Boolean value
detect module
Data line
D0~D8
Temperature sensor
A/D
conversion
module
Communication serial port
CPU
monitoring
module
UART
communication
module
Digital logic
module
Output
control
module
Watchdog
Power module
Figure 21-4 Hardware structure of XPSU
21-6
Audible/visible
control output

Boards
The functions of various hardware modules are described as follows:

z
The power supply module provides normal voltages for the analog circuit part and
the digital circuit part of the XPSU.
The Watchdog module provides reset level for the CPU monitoring module and
monitors the operation of the CPU programs.
The A/D conversion module converts the power supply voltage, two channels of
reserved analog quantity (through the DIP switch compatible voltage and
current-type sensor), and the input of the humidity sensor. The input signals enter
the board through the channels of the A/D conversion module and are converted
before they gain access to CPU through the data line.
The Boolean value detect module detects the two channels of isolated inputs from
the XLPB and the eight channels of Boolean values input, such as door control,
smoke, and water.
The serial port communication module is in charge of information exchange with

the CMUX. This module consists of serial-to-parallel conversion chip,
TTL-to-RS232 level conversion chip, and the receiving and transmitting chips for
TTL-to- RS485 level conversion.
The output control module indicates the operating status of the XPSU, generates
buzzer alarm, and displays the operating status of the overall cabinet and
generates related alarms.
The digital logic module processes various digital logics of the input and put
signals.
The CPU monitoring module consists of clock circuits, processing unit, static
random access memory (SRAM), and Flash.
2)
Software
Figure 21-5 shows the software structure of the XPSU.
Digital temperature
sensor communication
module
Analogand
quantity
Analog
Boolean
values
detectvalue
and alarm
and Boolean
module
check alarm module
CMUX communication
protocol processing
module
Audible/visible and
system alarm indicator
driving module
Self-check module
Main program
Figure 21-5 Software structure of XPSU

The functions of various software modules are described as follows:
z
The CMUX communication protocol processing module is responsible for the

communication between the active/standby serial port and the CMUX, involving
21-7

Boards
reporting the monitor alarm information, issuing and interpreting control

information.
z
The self-check module implements self-check of the XPSU hardware when the
software starts up.
The digital temperature sensor communication module is in charge of the

communication between the temperature sensor and the CPU.
The Analog quantity and Boolean value detect alarm module collects the analog
quantity value and Boolean value and sets the alarm status according to the
thresholds preset.
The audible/visible and system alarm indicator drive module is responsible for
driving the alarm indicator and buzzer on the XPSU to generate the audible and
visible alarms. If also drives the alarm indicators on top of the cabinet according to
the control command issued by the BAM.
21.2.2 Panel Descriptions

Figure 21-6 shows the silk screen of XPSU panel.
RUN
ALM
Figure 21-6 Panel silk screen of XPSU

Table 21-2 describes the indicators on the panel of the XPSU.
Table 21-2 Meaning of XPSU indicators
Name
Color
Description
RUN
Green
Board
status
indicator
ALM
Red
Alarm
indicator
Meaning
0.5 s on and 0.5 s off: The XPSU has not created
normal communication with the CMUX.
1 s on and 1 s off: The XPSU runs normally and
communicates with the CMUX normally.
Off: No alarm.
On: Alarm, indicating fault occurs.
21-8
Normal
status
1 s on and 1
s off
Off

Boards
21.2.3 DIP Switches

Figure 21-7 illustrates the DIP switches on the XPSU.
12345678
S2
12
S302
SW1
S3
S1
D9
12345678
D10
Figure 21-7 DIP switches on XPSU
I. Setting of S1
The DIP switch S1 has 8 bits. The five least significant bits stand for the address bit,
while the three most significant bits for the alarm shielding bit. From the left to right, the
bits are coded 1 to 8. The ON stands for 0, as shown in Figure 21-7.
1)
Setting the alarm shielding bit

Table 21-3 shows the setting of the alarm shielding bit of S1.
Table 21-3 Setting of the alarm shielding bit of S1

Parameter
Description
000*****
The system uses the 1st switch to output alarms. The alarms from the 2nd, 3rd and 4th
switches are shielded.
001*****
The system uses the 1st and 2nd switches to output alarms. The alarms from the 3rd
and 4th switches are shielded.
010*****
The system uses the 1st, 2nd and 3rd switches to output alarms. The alarms from the
4th switch are shielded.
011*****
The system uses the 1st, 2nd, 3rd and 4th switches to output alarms.
100*****
The system uses the 1st and 3rd switches to output alarms. The alarms from the 2nd
101*****
The system uses the 2nd and 3rd switches to output alarms. The alarms from the 1st
110*****
The system uses the 2nd and 4th switches to output alarms. The alarms from the 1st
and 3rd switches are shielded.
111*****
All the alarm signals of the power distribution box will be shielded, including those
through the 1st to 4th switches and the two from the XLPB.
Note:
The five least significant bits defined in above fields stand for the address of the slave node.
21-9

2)
Boards
Setting the address bit

Since the monitoring information of both the XPSU and the fan monitoring board
are reported through the CMUX, the XPSU and the fan monitoring board served
by the same CMUX should have different addresses. There are three types of
addresses, namely 0, 1 and 2. The address of the CSWS fan monitoring
board is set to "2" permanently, and the other fan monitoring board is set to "1"
permanently. The XPSU address can be "0" or "2".
Table 21-4 shows the setting of the board address bit of S1.
Table 21-4 Setting of the board address bit of S1

Parameter
***00000
Description
The board address bit of S1 must be set to 0 if there is a CMUX in the same cabinet
housing the power distribution box.
This value is recommended for on-site configuration.
***00010
The board address bit of S1 must be set to 2 if there is no CMUX in the cabinet where
the power distribution box is installed. In such case, the power distribution box should
be connected to adjacent cabinet (equipped with CMUX) through a cascading cable,
through which the information of the XPSU is reported to the adjacent CMUX (that is,
the CMUX in the subrack where the CRMU is inserted).
This configuration is not recommended.
II. Setting of S2
The DIP switch S2 has 8 bits. Only bits 3, 4, 5, 6, 7, and 8 are used. If the XPSU is at the
bus terminal, it should be set to ON for terminal matching. Otherwise, it shall be
"OFF".
III. Setting of S3
The DIP switch S3 (2-bit) is set to On if the external sensor is of a current type; it is set
to Off if the external sensor is of a voltage type. If 1 (see Figure 21-7) is set to On,
the first channel is for circuit analog detection. If 2 is set to On, the second channel is
for circuit analog detection. Otherwise, it is for voltage analog detection.
21.3 XSPB
The XSPB provides power supply interface, communication serial port, and analog and
digital interfaces for the XPSU.
21.3.1 Panel Descriptions

Figure 21-8 shows the rear panel of the XSPB.
21-10

Boards
J105
J104
J103
J109
J101
J108
J110
J107
J106
J102
J112
COM4
J111
J113
COM1
COM2
COM3
J114
Figure 21-8 XSPB rear panel

Table 21-5 shows the interfaces on the XSPB rear panel.
Table 21-5 Interfaces on XSPB rear panel
Name
Description
Remarks
COM1
Active serial port
For communication with the CMUX.
COM2
Standby serial port
COM3
Reserved
None.
COM4
Active/standby serial port for DB15

connector
J114
Inlet for cabinet alarm cascading.
None.
J113
Outlet for cabinet alarm cascading.
None.
J112
Cabinet alarm row indicators
None.
J111
Cabinet alarm column indicators
None.
J109
Sensor analog value input port 1
Compatible with sensors of both voltage and current

types
J110
Sensor analog value input port 2
Compatible with sensors of both voltage and current

types
J101~J
107
Sensor Boolean value input ports
Seven terminals in total
J108
Water sensor Boolean value input
For water sensor only.
Figure 21-9 shows the front panel of the XSPB.
21-11

Boards
J6
J7
J5
J3
J1
J4
J2
Figure 21-9 XSPB front panel

Table 21-6 shows the interfaces on the XSPB front panel.
Table 21-6 Interfaces on XSPB front panel
Name
Description
J1
For detection of the two 48V input power supplies
J2
For detection of the first lightning protection device.
J3
For detection of the second lightning protection device.
J4
For alarm tone control
J5
For 2 MM connector
J6
For SXPB power supply input
J7
For detection of the four output power supplies
21.3.2 Technical Indices

I. Indices of asynchronous communication serial port
Rate: 9.6 kbps
Connectors: COM1, COM2, COM3, and COM4.
The interface meets the standards of EIA/TIA RS-232-D and EIA/TIA RS-485-A.
II. Power supply and board dimensions

Power supply: 8 W
Dimensions: 390 mm % 72 mm
21-12

Boards
21.4 XLPB
Located in the power distribution box in the upper part of the cabinet, the XLPB
suppresses the over-voltage and over-current surge caused by lightning at the DC
power input end.

I. Functions
The XLPB implements the following functions:
z
Suppress differential mode surge.
Suppress common mode surge.
Monitor lightning protection circuit.
II. Operating principles

The XLPB consists of differential mode frontline protection circuit, differential mode
backline protection circuit, decoupling circuit, failure monitoring circuit and common
mode protection circuit.
Figure 21-10 shows the hardware structure of the XLPB.
-48 V
Decoupling circuit
Invalidity
monitoring
Invalidity
monitoring
Differential mode
frontline
protection circuit
Differential mode
backline
protection circuit
Input
Output
BGND
Common mode
protection circuit
Alarm information
collection
Monitoring and
alarm board
PGND
Figure 21-10 Hardware structure of XLPB

The differential mode protection circuit of the XLPB includes two levels, involving two
basic links: discharge and clamp.
As a discharge link, the differential mode frontline protection circuit helps the by-pass
discharge much of the transient current. As a clamping link, the differential mode
backline protection circuit limits the transient over-voltage to the level tolerable by the
equipment.
21-13

Boards
The differential mode frontline protection circuit features a high through-flow. The
differential mode backline protection circuit requires that the selected protection parts
should respond quickly, and feature good non-linear volt-ampere and that the residual
voltage level after clamping should be low. The action of the frontline and backline
protection circuits is coordinated by the decoupling circuit.
The common mode protection circuit features high through-flow and relatively slow
response. The action of the protection circuit is equal to short-circuiting BGND and
PGND so as to achieve the effect of potential equalization.
21.4.2 Technical Indices

I. Protection indices
Table 21-7 shows the protection indices of the XLPB.
Table 21-7 Protection indices of XLPB
Test port
DC power
port
Surge current
wave
Surge current
amplitude
Test method
48 V
BGND
8/20 3s
5 kA
Five times in both positive and

reverse directions
BGND
PGND
8/20 3s
5 kA
Five times in both positive and

reverse directions
II. Input DC power supply

z
Input current: 50 A
21-14
HUAWEI

Controller
Cables

Cables
Table of Contents
Table of Contents
Chapter 1 Network Cable.............................................................................................................. 1-1
1.1 Overview of Network Cable ............................................................................................... 1-1
1.2 Structure ............................................................................................................................ 1-1
Chapter 2 Optical Fiber................................................................................................................. 2-1
2.1 Overview of Optical Fiber .................................................................................................. 2-1
2.2 Structure ............................................................................................................................ 2-1
Chapter 3 Trunk Cable .................................................................................................................. 3-1
3.1 75-Ohm Coaxial Cables..................................................................................................... 3-1
3.2 E1/T1 Twisted Pairs........................................................................................................... 3-3
Chapter 4 Alarm Box Signal Cable .............................................................................................. 4-1
4.1 Overview of Alarm Box Signal Cable................................................................................. 4-1
4.2 Structure ............................................................................................................................ 4-1
Chapter 5 Satellite Input Signal Cable of CLKM......................................................................... 5-1
5.1 Overview of CLKM Satellite Input Signal Cable ................................................................ 5-1
5.2 Structure ............................................................................................................................ 5-1
Chapter 6 Clock Output Signal Cable of CLKM.......................................................................... 6-1
6.1 Overview of CLKM Clock Output Signal Cable ................................................................. 6-1
6.2 Structure ............................................................................................................................ 6-1
Chapter 7 Reference Clock Input Signal Cable of CLKM .......................................................... 7-1
7.1 Overview of CLKM Reference Clock Input Signal Cable................................................... 7-1
7.2 Structure ............................................................................................................................ 7-1
Chapter 8 Power-Distribution-Box/Fan-Box Monitoring Signal Cable..................................... 8-1
8.1 Overview of PDB/Fan-Box Monitoring Signal Cable ......................................................... 8-1
8.2 Structure ............................................................................................................................ 8-1
Chapter 9 Fan-Box Monitoring Signal Cable .............................................................................. 9-1
9.1 Overview of Fan-Box Monitoring Signal Cable.................................................................. 9-1
9.2 Structure ............................................................................................................................ 9-1
Chapter 10 Cascading Signal Cable of Power Distribution Subrack ..................................... 10-1
10.1 Overview of Cascading Signal Cable of Power Distribution Subrack............................ 10-1
10.2 Structure ........................................................................................................................ 10-1
Chapter 11 Subrack Internal Signal Cable................................................................................ 11-1
11.1 Overview of Subrack Internal Signal Cable ................................................................... 11-1
11.2 Structure ........................................................................................................................ 11-1

Cables
Chapter 1 Network Cable

This chapter describes the uses and structures of network cables.
1.1 Overview of Network Cable

The BSC system needs network cables between:
z
CMPU and LAN switch
GCKB and LAN switch
BAM server and LAN switch
Emergency workstation, maintenance terminal, M2000 server, and external LAN

switch
Router and internal LAN switch (the network cable is connected to the PDSN
through the router)
1.2 Structure
Figure 1-1 shows the structure of the network cable.
Figure 1-1 Network cable

Figure 1-2 shows the arrangement of wire sequence.
Figure 1-2 Arrangement of wire sequence

X1 and X2 in Figure 1-1 represent the connectors of the network cable.
1-1

Cables
Table 1-1 lists the correspondence between X1 and X2 for straight through network
cables.
Table 1-1 Correspondence between wire sequences of straight through network cable
From
Color
To
Color
X1.1
White-orange
X2.1
White-orange
X1.2
Orange
X2.2
Orange
X1.3
White-green
X2.3
White-green
X1.4
Blue
X2.4
Blue
X1.5
White-blue
X2.5
White-blue
X1.6
Green
X2.6
Green
X1.7
White-brown
X2.7
White-brown
X1.8
Brown
X2.8
Brown
Table 1-2 lists the correspondence between X1 and X2 for crossover network cables.
Table 1-2 Correspondence between wire sequences of crossover network cable
From
Color
To
Color
X1.1
White-orange
X2.3
White-orange
X1.2
White-green
X2.6
White-green
X1.3
Orange
X2.1
Orange
X1.4
Blue
X2.4
Blue
X1.5
White-blue
X2.5
White-blue
X1.6
Green
X2.2
Green
X1.7
White-brown
X2.7
White-brown
X1.8
Brown
X2.8
Brown
1-2

Cables
Chapter 2 Optical Fiber

This chapter introduces the functions and interfaces of optical fibers of different types. It
also presents optical connectors of different types and their uses in the BSC system.
2.1 Overview of Optical Fiber

Optical fibers employed by the BSC system include:
z
MTRJ-2SC/PC multi-mode optical fiber
MTRJ-2FC/PC single-mode/multi-mode optical fiber
2SC/PC single-mode optical fiber
Table 2-1 lists the functions and interfaces of the optical fibers.
Table 2-1 Functions and interfaces of optical fibers
Optical fiber
Function
Interface description
MTRJ-2SC/PC
multi-mode
optical
fiber
Connecting CLPC and CMUX.
MTRJ interface is used at the CLPC

side, and SC/PC interface at the
CMUX side.
MTRJ-2FC/PC single
mode optical fiber
Connecting BSC and the external

transmission
equipment
to
implement the A3/A7 or A8/A9
interface function.

side, and FC/PC interface at the
transmission equipment side.
MTRJ-2FC/PC
multi-mode
optical
fiber
Connecting BSC and the external

transmission equipment.

side, and FC/PC interface at the
transmission equipment side.
2SC/PC single-mode
optical fiber
Connecting CHAC and external

equipment of optical sub-board.
(Each CHAC needs 2PCS).
SC/PC interface is used at both

sides.
2.2 Structure
The optical connector includes the following types, SC/PC, FC/PC, and MTRJ. Figure
2-1, Figure 2-2, and Figure 2-3 respectively show the three types of connectors.
Figure 2-1 SC/PC connector
2-1

Cables
Figure 2-2 FC/PC connector
Figure 2-3 MTRJ connector

Figure 2-4, Figure 2-5, and Figure 2-6 respectively exhibit the optical fibers employed
by the BSC system.
Figure 2-4 MTRJ-2SC/PC multi-mode optical fiber
Figure 2-5 MTRJ-2FC/PC single-mode/multi-mode optical fiber
Figure 2-6 2SC/PC single-mode optical fiber
2-2

Cables
Chapter 3 Trunk Cable

This chapter introduces two types of trunk cable: 75-ohm coaxial cables and 120-ohm
twisted pairs.
Trunk cables are used to transmit trunk E1/T1 signals for the connection between
communication devices.
3.1 75-Ohm Coaxial Cables

The 75 coaxial cable is used to transmit E1 trunk signals. The applications of the
cable in the BSC system are detailed as follows:
z
The external cable led out of the BSC system from CBIE in CIPS, and connected
to BTS through transmission equipment.
The external cable led out of the BSC system from CAIE in CIPS, and connected
to MSC through transmission equipment.
The 75 coaxial cable used by the BSC system has 2 % 8 cores. Each cable contains
eight micro coaxial cables, comprising four E1 transmit/receive systems.
Figure 3-1 shows the structure of a 75 coaxial cable.
3-1

Cables
Figure 3-1 Structure of 75 coaxial cable

Table 3-1 lists the connections between the micro coaxial cables and the connectors.
Table 3-1 Connection between coaxial cable and connector
X0
Signal
Tip
Ring
Tip
Ring
Tip
Ring
11
Tip
12
Ring
14
Tip
Code of
micro
coaxial
cable
W2.8
Conne
ctor
E1
system
X1
CHAN 7
W2.7
X2
W2.6
X3
CHAN 6
W2.5
X4
W2.4
X5
CHAN 5
3-2
X0
Signal
27
Tip
28
Ring
30
Tip
31
Ring
33
Tip
34
Ring
36
Tip
37
Ring
39
Tip
Code of
micro
coaxial
cable
W1.8
Conn
ector
E1
system
X9
CHAN 3
W1.7
X10
W1.6
X11
CHAN 2
W1.5
X12
W1.4
X13
CHAN 1

X0
Signal
15
Ring
17
Tip
18
Ring
20
Tip
21
Ring
23
Tip
24
Ring
Code of
micro
coaxial
cable
Conne
ctor
W2.3
X6
W2.2
X7
Cables
E1
system
CHAN 4
W2.1
X8
X0
Signal
40
Ring
42
Tip
43
Ring
45
Tip
46
Ring
48
Tip
49
Ring
Code of
micro
coaxial
cable
Conn
ector
W1.3
X14
W1.2
X15
E1
system
CHAN 0
W1.1
X16
Table 3-2 describes the signals listed in Table 3-1.

Table 3-2 Signals of micro coaxial cable
Signal ID
Description
Ring
The shielding layer of the coaxial cable
Tip
The core of the coaxial cable
3.2 E1/T1 Twisted Pairs

The E1/T1 twisted pair transmits the E1/T1 trunk signals. The applications of the cable
in the BSC system are detailed as follows:
z
The external cable led out of the BSC system from CBIE in CIPS, and connected
to BTS through transmission equipment.
The external cable led out of the BSC system from CAIE in CIPS, and connected
to MSC through transmission equipment.
Figure 3-2 shows the structure of an E1/T1 twisted pair.
3-3
Cables
X1
X2
X3
X4
X5
X6
X7
X8

Figure 3-2 E1/T1 twisted pair

The connections between the E1/T1 twisted pairs and the connectors are described in
Table 3-3.
Table 3-3 Connection between E1/T1 twisted pair and connector
X0
Signal
TxTip7
TxRing7
Cable
No.
Color
Connector
Channel
No.
X0
Signal
Cable
No.
Color
Red
27
TxTip7
Green
28
TxRing7
PGND
Drain
29
PGND
Drain
RxTip7
Red
30
RxTip7
Red
RxRing7
Orang
e
31
RxRing7
PGND
Drain
32
PGND
Drain
TxTip6
Red
33
TxTip6
Red
TxRing6
Blue
34
TxRing6
10
PGND
Drain
35
PGND
X1
X2
CHAN 7
CHAN 6
3-4
Connector
Channel
No.
X5
CHAN 3
X6
CHAN 2
Red
8
Green
Orange
Blue
Drain

Cable
No.
X0
Signal
11
RxTip6
12
RxRing6
13
Color
Connector
Channel
No.
Cables
X0
Signal
Cable
No.
Color
White
36
RxTip6
Gray
37
RxRing6
PGND
Drain
38
PGND
Drain
14
TxTip5
White
39
TxTip5
White
15
TxRing5
Brown
40
TxRing5
16
PGND
Drain
41
PGND
Drain
17
RxTip5
White
42
RxTip5
White
18
RxRing5
Green
43
RxRing5
19
PGND
Drain
44
PGND
Drain
20
TxTip4
White
45
TxTip4
White
21
TxRing4
Orang
e
46
TxRing4
22
PGND
Drain
47
PGND
Drain
23
RxTip4
White
48
RxTip4
White
24
RxRing4
Blue
49
RxRing4
25
PGND
Drain
50
PGND
X3
X4
CHAN 5
CHAN 4
X7
CHAN 1
X8
CHAN 0
Gray
Brown
Green
Orange
Blue
Drain
Table 3-4 Signals of E1/T/ twisted pair

Description
Ring
One core of a twisted pair
Tip
Another core of the twisted pair
3-5
Channel
No.
White
Table 3-4 describes the signals listed in Table 3-3.
Signal ID
Connector

Cables
Chapter 4 Alarm Box Signal Cable
Chapter 4 Alarm Box Signal Cable

This chapter describes the uses, types, and structures of alarm box signal cables.
4.1 Overview of Alarm Box Signal Cable

A serial cable is used as the alarm box signal cable for transmitting signals between the
BSC and the alarm box.
The alarm box signal cable is equipped with a DB9 connector and configured according
to the survey report. There is also an optional alarm box signal cable, which is equipped
with a DB25 connector. This kind of cable will not be used unless specified.
4.2 Structure
Figure 4-1 shows the structure of the alarm box signal cable.
7531
8642
Figure 4-1 Alarm box signal cable
Table 4-1 lists the connections between the alarm box signal cables and the
connectors.
Table 4-1 Connection between alarm box signal cable and connector
X1
X2
4-1

Cables
Chapter 5 Satellite Input Signal Cable of CLKM
Chapter 5 Satellite Input Signal Cable of CLKM

This chapter describes the uses, types, and structures of CLKM satellite input signal
cables.
5.1 Overview of CLKM Satellite Input Signal Cable

The satellite input signal cable transmits the GPS/GLONASS satellite clock signal to
the CLKM, which will then process and send the clock signals to the system.
This cable is a coaxial cable.
5.2 Structure
Figure 5-1 shows the structure of a CLKM satellite input signal cable.
Figure 5-1 Satellite input signal cable

In Figure 5-1, X1 is an SMA connector, while X2 is an N connector. X1 is connected to
the ANT port on the GCKP panel, and X2 is connected to the lightning arrestor on the
cabinet top.
5-1

Cables
Chapter 6 Clock Output Signal Cable of CLKM
Chapter 6 Clock Output Signal Cable of CLKM

This chapter describes the uses, types, and structures of CLKM clock output signal
cables.
6.1 Overview of CLKM Clock Output Signal Cable

The CLKM sends clock signals to the CMUX through clock output signal cable and
exchanges operation and maintenance information with CMUX.
The cable is a kind of shielded straight through network cable. Each CLKM is
configured with two such cables to transmit clock signals and the operation and
maintenance information respectively.
6.2 Structure
Figure 6-1 shows the structure of a clock output signal cable of CLKM.
Figure 6-1 Clock output signal cable

Table 6-1 lists the connections between the cable and the connectors.
Table 6-1 Connection of communication cable
X1
X2
6-1
Remarks
A twisted pair
A twisted pair
A twisted pair
A twisted pair

Cables
Airbridge cBSC6600 CDMA Base Station Controller Chapter 7 Reference Clock Input Signal Cable of CLKM
Chapter 7 Reference Clock Input Signal Cable of

CLKM
This chapter describes the uses, types, and structures of CLKM reference clock input
signal cables.
7.1 Overview of CLKM Reference Clock Input Signal Cable

The reference clock input signal cable of CLKM transmits the BITS clock signal or the
upper-level clock signal extracted from CAIE to the CLKM.
This cable is a coaxial cable.
7.2 Structure
Figure 7-1 shows the structure of a reference clock input signal cable of CLKM.
Figure 7-1 Reference clock input signal cable of CLKM

Both ends of the reference clock input signal cable are SMB connectors. One end is
connected to the IN0/IN1 port on the GCKP panel, and the other end to CLK1/CLK2
port on CAIE, or to the BITS clock source.
Note:
IN0 is the input port of the 2 MHz and 2 Mbps clock signals and IN1 is the input port of 8 kHz clock signal
in addition to the 2 MHz and 2 Mbps clock signals.
7-1

Cables
Chapter 8 Power-Distribution-Box/Fan-Box Monitoring
Signal Cable
Chapter 8 Power-Distribution-Box/Fan-Box
Monitoring Signal Cable
This
chapter
describes
the
uses
and
structures
of
power-distribution-box
(PDB)/fan-box monitoring signal cables.
8.1 Overview of PDB/Fan-Box Monitoring Signal Cable

The PDB/fan-box monitoring signal cable transmits the monitoring signals of the power
distribution box and the fan box to the CMUX in the subrack.
8.2 Structure
Figure 8-1 shows the structure of the PDB/fan-box monitoring signal cable.
Figure 8-1 PDB/fan-box monitoring signal cable

Table 8-1 lists the connections between the cables and the connectors.
Table 8-1 Connection between cable and connector
Cable
code
W1
From
To
Meaning
X1.3
X2.3
Tx+
X1.2
X2.2
Tx-
X1.7
X2.7
Rx+
X1.6
X2.6
Rx-
X1.11
X2.11
Tx+
8-1
Remarks
These two cables are twisted


Cable
code
W1
W2
From
Cables
Chapter 8 Power-Distribution-Box/Fan-Box Monitoring
Signal Cable
To
Meaning
X1.10
X2.10
Tx-
X1.14
X2.14
Rx+
X1.13
X2.13
Rx-
X3.1
X2.3
Tx+
X3.2
X2.2
Tx-
X3.4
X2.7
Rx+
X3.5
X2.6
Rx-
Remarks
The signal cable is a RS485 serial cable. Table 8-2 lists the signals.
Table 8-2 Signals of the signal cable
Signal ID
Description
Tx+
Differential signal, positive signal of the transmitting end
Tx-
Differential signal, negative signal of the transmitting end
Rx+
Differential signal, positive signal of the receiving end
Rx-
Differential signal, negative signal of the receiving end
8-2

Cables
Chapter 9 Fan-Box Monitoring Signal Cable

This chapter describes the uses and structures of fan-box monitoring signal cables.
9.1 Overview of Fan-Box Monitoring Signal Cable

The fan-box monitoring signal cable is connects the CIPS/CRPS and the adjacent fan
box. The signal cable is an access to check the fan box status. The running status of
the fan box is reported and the control signal is issued through the signal cable to
control the fan speed.
9.2 Structure
Figure 9-1 shows the structure of the fan-box monitoring signal cable.
Figure 9-1 Fan-box monitoring signal cable

The fan-box monitoring signal cable is made of the eight-core category 5 UTP. Table
9-1 lists the connections between the cables and the connectors.
Cable code
From
To
Meaning
X1.3
X2.3
TD0+
X1.2
X2.2
TD0-
X1.7
X2.7
RD0+
X1.6
X2.6
RD0-
X1.11
X2.11
TD1+
X1.10
X2.10
TD1-
X1.14
X2.14
RD1+
X1.13
X2.13
RD1-
9-1
Remarks

Cables
The signal cable is a RS422 serial cable. Table 9-2 lists the signals transferred by the
cable.
Signal ID
Description
Tx+
Tx-
Rx+
Rx-
9-2

Cables
Chapter 10 Cascading Signal Cable of Power
Distribution Subrack
Chapter 10 Cascading Signal Cable of Power

This chapter describes the uses and structures of cascading signal cables of power
distribution subrack.
10.1 Overview of Cascading Signal Cable of Power

When there is no CMUX in the cabinet, the cascading signal cable must be used to
connect the adjacent CCTR and to transfer the monitoring signal from the power
distribution subrack of CCTR.
10.2 Structure
Figure 10-1 Cascading signal cable of power distribution subrack

Both ends of the cascading signal cable are DB15 connectors.
Table 10-1 lists the connections between the cables and the connectors.
Cable
From
To
X2.2
X1.2
X2.3
X1.3
X2.6
X1.6
X2.7
X1.7
10-1
Relation

Cables
Chapter 11 Subrack Internal Signal Cable

This chapter describes the uses and structures of subrack internal signal cables.
11.1 Overview of Subrack Internal Signal Cable

The subrack internal signal cable connects the backplane and the metal shielding
board to transfer the monitoring signals from the parts such as fan box to the
backplane.
11.2 Structure
Figure 11-1 shows the structure of the subrack internal signal cable.
Figure 11-1 Subrack internal signal cable

The subrack internal signal cable is made of 14-core ribbon cables. Table 11-1 lists the
connections between the cable and the connectors.
Cable code
From
Meaning
To
Meaning
X1.13
Tx+
X2.7
Rx+
X1.11
Tx-
X2.6
Rx-
X1.9
Rx+
X2.3
Tx+
X1.7
Rx-
X2.2
Tx-
The signal cable is an RS422 serial cable. Table 11-2 lists the signals transferred by the
cable.
Signal ID
Tx+
Description
11-1

Signal ID
Cables
Description
Tx-
Rx+
Rx-
11-2
HUAWEI

Controller
Appendix

Appendix
Table of Contents
Table of Contents
Appendix A Abbreviations and Acronyms .................................................................................A-1

Appendix
Appendix A Abbreviations and Acronyms

A
AAL1
ATM Adaptation Layer Type 1
AAL2
ATM Adaptation Layer 2
AAL5
ATM Adaptation Layer 5
ABR
Available Bit Rate
ARP
Address Resolution Protocol
ATM
Asynchronous Transfer Mode
B
BAM
Back Administration Module
BITS
Building Integrated Timing Supply system
BLOB
Block of Bits
BSC
Base Station Controller
C
CAIE
CDMA A Interface Equipment
CBIE
CDMA BaseStation Interface Equipment
CBPU
CDMA Buffer Processing Unit
CBR
Constant Bit Rate
CBUR
CDMA Business Rack
CC
Congestion Control
CCTR
CDMA Control Rack
CDMA
Code Division Multiple Access
CEVC
CDMA Enhanced Vocoder with echo Canceller
CEVD
CDMA Enhanced Vocoder with EC Disabled
CFMR
CDMA radio frame processing (FP MAC RLC) board
CHAC
CDMA High-speed Access Controller
CIPS
CDMA Integrated Processing Subrack
CIWF
CDMA InterWorking Function board
CLAP
CDMA Link Access Protocol board
A-1

Appendix
CLKM
CLocK processing Module
CLPC
CDMA Line Processing unit with two 622M engines
CLPU
CDMA Line Processing Unit
CMPU
CDMA Main Processing Unit
CMUX
CDMA system MUltipleXer unit
CNET
CDMA NETwork transfer and switching unit
CPCU
CDMA PCF Control Unit
CPMS
CDMA Packet Module Subrack
CPPU
CDMA Packet Processing Unit
CPU
Center Processing Unit
CRC
Cyclic Redundancy Check
CRMU
CDMA Resource Management Unit
CRPS
CDMA Resource and Packet Subrack
CSPU
CDMA Signal Processing Unit
CSTU
CDMA Synchronous Transport Unit
CSWS
CDMA Switching Subrack
D
DTMF
Dual-Tone Multifrequency
E
EIA
Electronics Industry Association
EMC
Electro Magnetic Compatibility
F
FCH
Fundamental Channel
FPGA
Field Programmable Gate Array
G
GCKB
GPS/GLONASS and ClocK Subrack Backplane
GCKP
GPS/GLONASS and ClocK Processing board
GLONASS
GLObal NAvigation Satellite System
GND
Ground
GPS
Global Position System
A-2

GRE
Appendix
Generic Routing Encapsulation
H
HDLC
High level Data Link Control
HPA
Higher Order Path Adaptation
HPT
Higher Order Path Termination
HW
Highway
I
IAC
Initial Alignment Control
IEEE
Institute of Electrical and Electronics Engineers
IMA
Inverse Multiplexing on ATM
IP
Internet Protocol
ITU-T
International Telecommunication Union - Telecommunication Standardization

Sector
IWF
InterWorking Function
L
LAC
Link Access Control
LAN
Local Area Network
LCD
Liquid Crystal Display
LED
Light Emitting Diode
M
MAC
Medium Access Control
MODEM
MOdulator-DEModulator
MRTIE
Maximum Relative Time Interval Error
MSA
Multiplex Section Adaptation
MSC
CDMA Mobile Switching Center
MST
Multiplex Section Termination
MuxPDU
Multiplex Sublayer Protocol Data Unit
N
NIC
Network Interface Card
nrt-VBR
non-real time Variable Bit Rate
A-3

Appendix
P
PC
Personal Computer
PCF
Packet Control Function
PCI
Peripheral Component Interconnect
PCM
Pulse-Code Modulation
PDH
Plesiochronous Digital Hierarchy
PDSN
Packet Data Service Node
PDU
Packet Data Unit
PGND
Protection Ground
POC
Processor Out-of-service Control
Q
QoS
Quality of Service
R
RC
Receiving Control
RFN
Reduced TDMA Frame Number
RLP
Radio Link Protocol
RST
Regenerator Section Termination
rt-VBR
real time Variable Bit Rate
RX
Reception
S
SAR
Segmentation And Reassembly
SCH
Supplemental Channel
SCSI
Small Computer Systems Interface
SDB
Short Data Burst
SDH
Synchronous Digital Hierarchy
SDRAM
Synchronous Dynamic Random Access Memory
SMF
Single-Mode Fiber
SONET
Synchronous Optical Network
SRAM
Static Random Access Memory
STM-1
Synchronous Transfer Mode 1
A-4

Appendix
T
TCP
Transfer Control Protocol
TDM
Time Devision Multiplex
TRAU
Transcoder & Rate Adaptation Unit
TTL
TRAU-Transcoder Link
U
UBR
Unspecified Bit Rate
UNI
User Network Interface
USB
Universal Serial Bus
UTCP
UTC (Coordinated Universal Time) Provider Board
V
VBR
Variable Bit Rate
VLAN
Virtual LAN
VOS
Virtual Operating System
X
XLPB
Lightning Protection Board
XPSU
Power and Environment Supervision Unit
XSPB
Supervision PlugBoard
A-5

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Cabinets

Table of Contents .........................................................................................

3.2.2 1xEV-DO Service Processing Entity .........................................

5.1.2 Operating Principles .................................................................

12.1 Functions and Operating Principles ................................................

18.3 Technical Indices ............................................................................

5.1 Overview of CLKM Satellite Input Signal Cable ................................

Airbridge cBSC6600 CDMA Base Station Controller

Airbridge cBSC6600 CDMA Base Station Controller

Huawei Technologies Co., Ltd.

Copyright 2004 Huawei Technologies Co., Ltd.

All Rights Reserved

, HUAWEI, C&C08, EAST8000, HONET,

, ViewPoint, INtess, ETS, DMC,

TELLIN, InfoLink, Netkey, Quidway, SYNLOCK, Radium,

About This Manual

Airbridge cBSC6600 CDMA Base

Describes regulatory compliance statement and regulatory

Airbridge cBSC6600 CDMA Base

Introduces the development of the CDMA network, and the

Airbridge cBSC6600 CDMA Base

Describes the general architecture of the cBSC6600, the

Airbridge cBSC6600 CDMA Base

Details the external interfaces, related protocols and

Airbridge cBSC6600 CDMA Base

Introduces the networking capacity, radio channel

Airbridge cBSC6600 CDMA Base

Details the structures and working principles of the cables,

Airbridge cBSC6600 CDMA Base

Covers the hardware installation of the cBSC6600.

Airbridge cBSC6600 CDMA Base

Describes the software installation of the cBSC6600.

Airbridge cBSC6600 CDMA Base

Covers the data configuration of the cBSC6600.

Airbridge cBSC6600 CDMA Base

Describes contents and methods of routine maintenance over

Details the troubleshooting for the cBSC6600.

Airbridge cBSC6600 CDMA Base

Presents procedures and methods of replacing boards and

Module 1 Cabinets describes the composition and structure of the cabinet.

Module 2 Subracks describes the basic structure and configuration of each

of the major boards in the BSC system.

Module 4 Cables describes basic structure of the major cables.

Module 5 Appendix describes the abbreviations and acronyms used in the

Installation engineers and technicians

Operation and maintenance personnel

Normal paragraphs are in Arial.

Warnings, Cautions, Notes and Tips are in Arial Narrow.

Headings are in Boldface.

Terminal Display is in Courier New.

II. Command conventions

The keywords of a command line are in Boldface.

Command arguments are in italic.

Items (keywords or arguments) in square brackets [ ] are optional.

Alternative items are grouped in braces and separated by vertical bars.

Optional alternative items are grouped in square brackets and separated

Alternative items are grouped in braces and separated by vertical bars. A

Optional alternative items are grouped in square brackets and separated

III. GUI conventions

Multi-level menus are separated by forward slashes. For example,

IV. Keyboard operation

Press the left button twice continuously and quickly.

Caution: means reader be extremely careful during the operation.

Hardware Description Manual