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bUCK SLIDE MODE PDF
bUCK SLIDE MODE PDF
ISA Transactions
journal homepage: www.elsevier.com/locate/isatrans
a r t i c l e i n f o
abstract
Article history:
Received 2 January 2012
Received in revised form
22 June 2012
Accepted 17 July 2012
Available online 9 August 2012
This paper was recommended for publication by Jeff Pieper
This paper presents an adaptive terminal sliding mode control (ATSMC) strategy for DCDC buck
converters. The idea behind this strategy is to use the terminal sliding mode control (TSMC) approach to
assure nite time convergence of the output voltage error to the equilibrium point and integrate an
adaptive law to the TSMC strategy so as to achieve a dynamic sliding line during the load variations. In
addition, the inuence of the controller parameters on the performance of closed-loop system is
investigated. It is observed that the start up response of the output voltage becomes faster with
increasing value of the fractional power used in the sliding function. On the other hand, the transient
response of the output voltage, caused by the step change in the load, becomes faster with decreasing
the value of the fractional power. Therefore, the value of fractional power is to be chosen to make a
compromise between start up and transient responses of the converter. Performance of the proposed
ATSMC strategy has been tested through computer simulations and experiments. The simulation
results of the proposed ATSMC strategy are compared with the conventional SMC and TSMC strategies.
It is shown that the ATSMC exhibits a considerable improvement in terms of a faster output voltage
response during load changes.
& 2012 ISA. Published by Elsevier Ltd. All rights reserved.
Keywords:
Sliding-mode control
Terminal sliding-mode control
Finite time convergence
DCDC buck converter
1. Introduction
DCDC converters are power electronics devices which are
widely used in many applications including DC motor drives,
communication equipments, and power supplies for personal
computers [1]. The buck type DCDC converters are used in
applications where the required output voltage is smaller than
the input voltage. Since buck converters are inherently nonlinear
and time-varying systems due to their switching operation, the
design of high performance control strategy is usually a challenging issue. The main objective of the control strategy is to ensure
system stability in arbitrary operating condition with good
dynamic response in terms of rejection of input voltage changes,
load variations and parameter uncertainties. Nonlinear control
strategies are deemed to be better candidates in DCDC converter
applications than other linear feedback controllers. Various nonlinear control strategies for the buck converters have been
proposed to achieve these objectives [215]. Among these control
strategies, the sliding mode control (SMC) has received much
attention due to its major advantages such as guaranteed stability, robustness against parameter variations, fast dynamic
response and simplicity in implementation [24,68,10,11,14].
The design of an SMC consists of two steps: design of a sliding
0019-0578/$ - see front matter & 2012 ISA. Published by Elsevier Ltd. All rights reserved.
http://dx.doi.org/10.1016/j.isatra.2012.07.005
674
dvo
1
vo
iL
C
dt
R
Combining (1), (2), (3) and (4) gives
diL
1
uV in vo
L
dt
dvo
1
vo
iL
C
dt
R
where u is the control input which takes 1 for the ON state of the
switch and 0 for the OFF state. Let us dene the output voltage
error x1 and its derivative (rate of change of the output voltage
error) as
x1 vo V ref
x2 x_ 1 v_ o V_ ref v_ o
9
x2
o2o x1 o2o uV in V ref
RC
10
l 40
11
S lx1 x_ 1 0
Fig. 1 shows a DCDC buck converter. It consists of a DC input
voltage source (Vin), a controlled switch (Sw), a diode (D), a lter
inductor (L), lter capacitor (C), and a load resistor (R). Equations
describing the operation of the converter can be written for the
switching conditions ON and OFF, respectively, as
12
diL
1
V in vo
L
dt
13
dvo
1
vo
iL
C
dt
R
and
diL
vo
dt
L
SW
iL
iC
+
Vin
+
vo
iR
R
x1 t x1 0elt
14
675
15
17
18
1
x2 o2o V ref x1 o0
l2 l
RC
20
o2o
Fig. 2. Regions of existence of the sliding mode for: (a) l 4 1/RC and (b) l o1/RC.
1
RC
22
21
l1=RC
Sn lx1 x_ 1
23
where l 40, and 0 o(g q/p)o1 where p and q are positive odd
integers satisfying p 4q. When the system is in the terminal
sliding mode (Sn 0), its dynamics can be determined by the
following nonlinear differential equation:
g
x_ 1 lx1
24
dx1
lxg1
25
676
ts
l x1 0 xg1
l1g
26
Eq. (26) means that when the system enters to the terminal
sliding mode at t tr with initial condition x1(0) a0, the system
state x1 converges to x1(ts) 0 in nite time and stay there for
t Zts. In other words, when the state trajectory hits the sliding
surface at time tr, the system state cannot leave the sliding line
meaning that the state trajectory will belong to the sliding line for
t Ztr. However, it is obvious from (26) that the convergence time,
ts, still depends on the parameters g and l. Therefore, these
parameters must be carefully selected to ensure the desired
response.
4.1. Selection of g
When x1 is near the equilibrium point (9x19o1), the fractional
g
power g q/p leads to 9x1 9 4 9x1 9. In such a case, the system state
g
with the nonlinear term x1 converges toward equilibrium point
more faster than the linear term x1. Especially, when g is too small
near the equilibrium point, the state trajectory moves toward the
equilibrium point as if it follows the bottom of a bowl rather than
following a straight line which results in a distorted inductor
current during load variations. In order to show the inuence of
parameter g on the dynamic performance of the TSMC, a sample
simulation study has been performed by using the parameters
Vin 10 V, Vref 5 V, L1 mH, C 1000 mF, R10 O, and
l 1/RC 100.
Fig. 3 shows the start-up responses of the output voltage, the
inductor current and the state trajectories of the converter with
different g values. It is clear from Fig. 3(a) and (b) that the output
voltage and the inductor current responses become faster with
increasing the value of g. The main reason of this comes from the
fact that the slope of the sliding line with g4 0.8182 is greater
than all other sliding line slopes as shown in Fig. 3(c) resulting in
a faster response as pointed out in (14). All the state trajectories
start from the point Vref 5 V on the x1 axis (as vo(0) 0 V),
which agrees well with the intersection point of l2 shown in Fig. 2.
When the trajectory reaches the sliding line, it starts to slide
along it by making a zigzag movement. However, when it
approaches the equilibrium point (9x19 o1) it changes its direction and makes a movement similar to the bottom of a bowl. This
direction change is inversely proportional with the g value. This
means that any change in the direction becomes smaller when g
values get larger. This fact is clearly visible in Fig. 3(c).
Fig. 4 shows the responses of the output voltage and the
inductor current for a step change in R from 10 O to 2 O which
are obtained by the SMC method with g 1 and the TSMC method
with different g values. Unlike the start up case, it is interesting to
note that the output voltage and the inductor current responses
become faster with decreasing the value of g. Therefore, g value is
to be chosen to make a compromise between start up and transient
responses of the converter. It is well known that the current
dynamics is faster than the voltage dynamics. Since the transient
responses of the inductor current for different g values are superimposed, then only two responses are presented in Fig. 4(b).
4.2. Selection of l
It has been discussed before that l is usually set to 1/RC for a
good performance of the system. However, the TSMC with
constant l cannot exhibit the same transient performance when
the converter is subjected to a load change. The main reason of
this performance degrade is due to the static sliding line
Fig. 3. Simulated start up responses of the output voltage, the inductor current,
and the state trajectories obtained by the TSMC method with different g values:
(a) vo, (b) iL, and (c) state trajectories.
27
677
29
30
31
x
2V
o in
RC
g1
x2
32
2V
o in
x
RC
g1
x2 KsignSn
Fig. 4. Simulated transient responses of the output voltage and the inductor
current due to a step change in R from 10 O to 2 O obtained by the SMC and the
TSMC methods with different g values: (a) vo and (b) iL.
Fig. 5. Block diagram of the DCDC buck converter with the proposed ATSMC method.
28
33
678
x2
o2o x1 o2o uV in V ref dt
RC
34
and substituting (33) into (34) and the resulting equation into
(31) yields
V_ t Sn S_ n KSn signSn Sn dto 0
35
lgx1g1 x2
x2
o2o V in V ref x1 4 0
RC
lgx1g1 x2
x2
o2o V ref x1 o 0
RC
for S o 0 when u 1
for S 4 0 when u 0
36
37
Eqs. (36) and (37) describe the sliding mode dynamics of the
closed-loop system.
ATSMC
SMC
TSMC
SMC
TSMC
and
ATSMC
1.66ms
ATSMC
TSMC
and
State trajectory due ATSMC
to the start up
State trajectory due
to the step change
Fig. 9. Simulated start up and transient responses (due to a step change in R from 10 O to 2 O) of the output voltage, and the state trajectory obtained by the SMC, the
TSMC and the ATSMC methods with g 0.2: (a) vo, (b) magnied response of vo and iL obtained by ATSMC, (c) state trajectory obtained by the SMC and (d) state trajectory
obtained by the TSMC and the ATSMC.
2h
S_
38
2h
S_
39
T OFF
where S_ n and S_ n are the time derivatives of Sn for ON and OFF
states of the switch Sw, respectively. The time derivative of (23)
can be written as
x2
g1
o2o uV in V ref x1
S_ n lgx1 x2
RC
40
Assuming that the errors x1 and x2 are negligible in the steadystate, Eqs. (38) and (39) can be written as
T ON
T OFF
2h
o2o V in V ref
2h
o2o V ref
41
679
42
Fig. 10. Experimental responses of the output voltage and the inductor current for
start up and a step change in R from 10 O to 2 O: (a) start up and (b) step change.
Fig. 11. Experimental responses of the inductor current and the control input for
the step change in the load resistance from 10 O to 2 O: (a) responses of iL and u,
(b) magnied responses of iL and u for R 10 O and (c) magnied responses of iL
and u for R 2 O.
680
ATSMC strategies was 0.2 (q 1 and p 5). The load resistor was
set to R10 O during the start up. The transient responses are
due to a step change in R from 10 O to 2 O at t 0.08 s. It is
obvious from Fig. 9(a) that the output voltage tracks its reference
successfully in all cases. The start up response of the output
voltage obtained by the SMC is faster than that of obtained by the
TSMC and ATSMC. Conversely, the transient responses of the
output voltage obtained by the TSMC and ATSMC are faster than
that of obtained by the SMC. The ATSMC offers the fastest
transient response which shows that the controller acts very fast
in correcting the output voltage. Note that the TSMC and ATSMC
exhibit exactly the same response from the start up until the step
change occurs in the load resistance. The main reason of this
comes from the fact that both methods employ the same l value
until the load change takes place. After the load change occurs,
while the TSMC continues to operate with the same l value, the
ATSMC makes use of the adaptively computed l value. The
magnied response of the output voltage, due to the step change
in the load, together with the inductor current obtained by the
ATSMC method is shown in Fig. 9(b). The output voltage takes
approximately 1.66 ms to track its reference. Fig. 9(c) and (d)
shows the state trajectories that correspond to the simulation
case shown in Fig. 9(a). Note that both trajectories start from the
point Vref 5 V on the x1 axis, since vo(0)0 V. In the start up,
the slope of the sliding line in Fig. 9(d) is smaller than that of in
Fig. 9(c). However, after the load is changed, the slope of the
sliding line in Fig. 9(d) becomes greater than that of in
Fig. 9(c) leading to a faster response in the output voltage.
Experimental results were also obtained for testing the dynamic
performance of the proposed ATSMC method under step changes in
the load, in the input voltage and in the reference output voltage.
Fig. 10 shows the experimental responses of the output voltage and
the inductor current for the start up and the step change in the load
resistance from 10 O to 2 O. It can be seen from Fig. 10(a) that the
6. Conclusions
Fig. 12. Experimental responses of the output voltage for step changes in the
reference output voltage and the input voltage: (a) response of vo for a step
change in Vref from 5 V to 7 V and (b) response of vo for a step change in Vin from
10 V to 8 V.
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