Huu C.

Ho
15016 Hyson Crossing Pflugerville, TX 78660
(512) 659-2671 - huuho385@gmail.com
http://huuho.weebly.com

Education & Credentials

Math 4-8 and Math 8-12 TExES PASSED
PPR-TExES Scheduled
ACT San Antonio
80 hours pre-service training, one year classroom observation and volunteer
Master of Electrical Engineering at University of Texas at San Antonio
Bachelor of Electrical Engineering at University of Texas at Austin

Teaching Experiences
Teaching Assistant Volunteer at Bastrop High School

08/2013-05/2014

Assisted students on Algebra to prepare for STAAR test

Mentored students to prepare SAT test on Math subject
Observed one year to see how teachers handle class management, curriculum, classroom
organization, and first day at school

Computer Lab Teaching at Bastrop High School

GPA: 4.0
GPA: 3.24

08/2010-08/2011

Conducted instructional exercises assigned by the teacher; coached with individual

students or small groups.
Helped teacher in prepare instructional materials and classroom displays.
Kept teacher informed of special needs or problems of individual students.
Assisted students using on technology in computer Lab, and classrooms.

21st Century Math Tutor at Bastrop ISD

08/2010-08/2011
Reviewed and explained Algebra 1, Geometry materials for students
Assisted students doing homework online classes
Teaching Assistance for Digital and Engineering Lab at UTSA 01/2003-05/2005

Performed regular duties of attendance, supervisions, discipline, and assessment

Consulted with professors to create plans for helping students working on projects

Other Experiences
Engineering Tech at AMS -Austin

11/2014-Present

Engineering Tech at Flextronics -Austin

06/2011-10/2014

Validation Engineering at SMSC Inc Austin

03/2008-03/2010

Developed automation test program and validated development softwares

Trained and assisted new hiring
Installed, setup, debugged, and verified computer systems

Organized and created Automation software project plans to meet requiring designs
Wrote validation technical report to upper management

Test Engineering at Cisco & Flextronics Austin

10/2005-03/2008

Debugged failure boards and systems of routers and root cause to improve high yield

Intern of Design Engineer at Intel Inc- Austin

05/2005-10/2005

Designed a 72-bit adder, drawn schematic and implemented the design that met area,
timing, and power constraints by using Cadence tools