ESD 502 Analog CMOS VLSI Design

Test 2 (Marks: 40)

September 2, 2015, Wednesday, 3:30 pm 5:00 pm.
Do all the work in the answerbook. Write the final answers (except for Q. 2) in the question paper.
Use of pencils is not permitted.
1. Find the drain voltage (VD) and the drain current (ID) in the circuit of Fig. 1. Vt = 1 V, nCox(W/L) = 20
mA/V2, = 0. (Is the MOSFET in saturation?)
(8)
VD = ________ V

ID = ________ mA

2. Sketch IX versus VX for the circuit of Fig. 2, for VG = 1 V, 2 V and 2.5 V, if Vtn = Vtp = 0.5 V, and VX varies
from 0 to 3 V. Clearly lable all relevant voltages on the x-axis. Assume = 0.
(10)

VD

3V
Figure 1

2.5 V

RD
RS

2 k
1 k

IX
Figure 2
VX

4V
M2
VO
VIN

M1

Figure 3

3. In Fig. 3, the transistors have nCox = 0.4 mA/V2, Vt = 0.9 V, = 0, (W/L)1 = 2.5, and (W/L)2 = 10. (12)
(a) If VIN = 1.1 V, calculate the small-signal voltage gain.
vo/vin = ______
(b) At what input voltage is M1 driven 0.1 V into the triode region (i.e. VO = VIN Vt 0.1)? Find the drain
currents under this condition, in both M1 and M2, from their drain current equations.

VIN = ______ V

ID1 = ______ mA

ID2 = ______ mA

(c) What is the small-signal voltage gain under the conditions of part (b)?
vo/vin = ______

VDD
M2

4. Consider the circuit of Fig. 4. Let = 0, and derive an expression for the
small-signal voltage gain.
(10)
vo/vin =

vO
vIN

M1

Figure 4