EXPERIMENT - 4

AIM: Design and simulate an amplifier using DTMOS technique.

SOFTWARE USED: ORCAD PSPICE 16.6
THEORY: There are many ways a DTMOS can be implemented in Very Large Scale Integrated
(VLSI) circuits. One and foremost of those is by tying substrate of the transistor to its gate. As
the substrate bias increases (VSUB), along with the gate bias (VGS), bulk charge in silicon is
compensated. This reduction in bulk charge lowers VT of the device and consequently leads to a
higher drive current (ION) due to increased available gate overdrive VGT (=VGSVT). DTMOS
threshold voltage drops as gate voltage is raised, resulting in a much higher current drive than
regular MOSFET at low Vdd. On the other hand, Vt is high at V,, = 0, thus the leakage current is
low. However, such an implementation cannot be used for supply voltages above the cut-in
voltages of the S/D junctions. More importantly, the bulk capacitance of transistor adds to total
parasitic capacitance at the input (CIN), which must be charged by the input signal. Thus, this
simple DTMOS implementation achieves higher ION while increasing the CIN, with the overall
result that there is degradation in the circuit speed.

CIRCUIT DIAGRAM:

SIMULATION:
1. DC ANANYSIS

A. PSPICE CODE:
M1 2 1 0 1 NMOS L=0.18u W=26u
VDD 3 0 1Vdc
VIN 1 4 0.7Vdc
Rd 2 3 0.1k TC=0,0
.DC Vin 0 1V 0.1v
. DC Vdd 0 1V 0.1v
.probe
.end

B. TRANSFER CHARACTERISTICS
1.5mA

1.0mA

0.5mA

0A
0V

0.1V

0.2V

0.3V

0.4V

0.5V

ID(M1)
V_VIN

C. OUTPUT CHARACTERISTICS

0.6V

0.7V

0.8V

0.9V

1.0V

2.0mA

1.5mA

1.0mA

0.5mA

0A
0V

0.1V

0.2V

0.3V

0.4V

0.5V

0.6V

0.7V

0.8V

0.9V

1.0V

ID(M1)
V_VDD

2. AC ANANYSIS
A. PSPICE CODE:
M1 2 1 0 1 NMOS L=0.18u W=26u
VDD 3 0 1Vdc
Rd 2 3 0.1k TC=0,0
V1 4 0 AC 1V SIN ( 100KHz 0 0 0)
.AC DEC 10 0. 1Hz 100GHz
.probe
.end

B. AC CHARACTERISTICS
0

(326.038M,-3.0000)
-10

-20

-30

-40
100mHz
1.0Hz
DB(V(M1:d)/ V(M1:g))

10Hz

100Hz

1.0KHz

10KHz

100KHz
Frequency

1.0MHz

10MHz

100MHz

1.0GHz

10GHz

100GHz

C. OUTPUT FILE:
****
OPERATING POINT INFORMATION
TEMPERATURE = 27.000 DEG C
NODE VOLTAGE
NODE VOLTAGE
NODE VOLTAGE
NODE VOLTAGE
(

1)

.6000 (

2)

0.0000 (

3)

.5475

VOLTAGE SOURCE CURRENTS

NAME
CURRENT
VDD
-1.344E-04
VIN
1.344E-04
TOTAL POWER DISSIPATION 8.06E-05 WATTS
**** 11/11/14 11:13:39 ********* PSpice 9.1 (Mar 1999) ******** ID# 0 ********
*rise time = 6.58*10-11

fal time = 1.04*10-11

JOB CONCLUDED
TOTAL JOB TIME

.02

CALCULATIONS:

RESULT: Designed and simulated an amplifier using DTMOS technique.