ANEXOS

int T,Vref;
/*PC.0 Channel 10 ADC1
PC.1 Channel 11 ADC2
PC.2 Channel 12 ADC3
*/
#include"stm32f4xx.h"
void clock(void)
{
RCC->CFGR = 0;
RCC->CR
= 0;
RCC->CFGR |= 0x00009400;
RCC->CR
|= RCC_CR_HSEON;
while (!(RCC->CR & 0x00020000));
RCC->PLLCFGR = 0x07405408;
RCC->CR |= RCC_CR_PLLON;
while(!(RCC->CR & 0x02000000))
FLASH->ACR = 0x00000605;
RCC->CFGR |= 0x00000002;
while ((RCC->CFGR & 0x0000000F) != 0x0000000A);
}
void GPIO(void)
{
// Set Speed GPIOD is 100Mhz
GPIOD->OSPEEDR = 0xFFFF;
// Open clock to GPIOD
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN|RCC_AHB1ENR_GPIODEN;
// Set GPIO D.15,D.14,D.13,D.12,D5 is Output
GPIOD->MODER =0x55000400;
GPIOC->MODER |=0x000003FF;
//ch10->ADC1,ch11->ADC2,ch12->ADC3,
GPIOC->PUPDR = 0;
}
void adc1(void)
{
//ADC configuration
RCC->APB2ENR
|= RCC_APB2ENR_ADC1EN|RCC_APB2ENR_ADC2EN;
RCC->APB2ENR
|= RCC_APB2ENR_ADC3EN;
ADC->CCR = ADC_CCR_ADCPRE_1;
ADC1->CR2
SWSTART Trig
ADC2->CR2
SWSTART Trig
ADC3->CR2
SWSTART Trig

ADC_CR2_ADON|ADC_CR2_EXTSEL|ADC_CR2_EXTEN; // Set

ADC_CR2_ADON|ADC_CR2_EXTSEL|ADC_CR2_EXTEN; // Set

ADC_CR2_ADON|ADC_CR2_EXTSEL|ADC_CR2_EXTEN; // Set

}
int main()
{
clock();
GPIO();
adc1();
RCC->APB1ENR|=0X20000000;
DAC->CR|=0X00010001;
GPIOA->MODER|=0X00000F00;
GPIOD->MODER |=0X00555555;
GPIOD->OSPEEDR |=0XAAAAAAAA;
ADC1->SQR3
ADC2->SQR3
while(1)
{

= 10; // ADC1--> CH10 PC.0

= 11; // ADC2--> CH11 PC.1

ADC1->CR2 |=
ADC_CR2_SWSTART; // ADC1 Tgir
ADC2->CR2 |=
ADC_CR2_SWSTART; // ADC2 Tgir
while((ADC1->SR & ADC_SR_EOC )==0); //wait ADC1
while((ADC2->SR & ADC_SR_EOC )==0); //wait ADC2
ADC1->SR
= 0;
ADC2->SR
= 0;
ADC3->SR
= 0;
T=ADC1->DR;
Vref=ADC2->DR;
DAC->DHR12R1=1.5*(Vref-T);
}
}