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FIGURE 7-10, NAND Gate FloURE 7-10 NANO Gate esization ot NOT, AND, and OR A sxt of logic operations is std to be functionally complete if any Boolean function can be expresed i tems of this set of operations The set AND,OR, and NOT is obviously functionally complete because any function can be expressed in sum-of-produets form: and a sum-af-products expression uscs only the AND, OR and NOT operations. Similarly set of logic gates is functionally complet i all ‘Stitching functions can be realized using this set of gates, Recause the st of oper ations AND, OR, and NOT is functionally complete, any set of loge gates which fan realize AND, OR, and NOT i also funetionally complete. AND and NOT are 4 funetionally complete set of gates because OR can also be realized using AND. manor DAD purer pet a single gate forms a functionally complete set by itself, then any switching function can be realized using only pates ofthat type. The NAND gate san exam ple of such agate. Because the NAND gate performs the AND operation followed by an inversion, NOT, AND, and OR can be realized using only NAND gates, a8 shou in Figure -10.Thusany switching function can be realized using only NAND. gates An easy method for converting an AND-OR circuit toa NAND circuit is slscussed in the next section. Similarly, any function can be realized using only NOR gates. o vod a Shown in Figure 7-10.Ths,any switching function canbe realized using only NAND fates An easy method for converting an AND-OR circuit to a NAND circu is Aiscussed in the next section. Silay. any fanetion can be realized using only NOR gates. “TDs D-DD» “TWO Deere pa ‘The following procedure can be used to determine ifs given so of gates i fan tdonally complete. Fst, write out minimum sunt products expression for the function realized by each pate Ifo complement appears in any ofthese expressions, then NOT cannot be realized, and the st is not functionally complete If a comple ‘ment appeats in one ofthe expressions then NOT can generally be realized by an appropriate choice of inputs othe corresponding gate. (We will always assume that (and ate avalabe as gate inputs) Nest, attempt to realize AND or OR, keeping in ‘mind that NOT snow svailale. Once AND or OR bas been realized, the other one can always be realized using DeMorgan's laws if no more diet procedure i appar {ent For example, COR and NOT ate valle, AND can be reslized by ayeor ery 10)

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