INVESTIGAR QUE ES UN FLIP-FLOP

IMPLEMENTAR EN UN FLIP-FLOP TIPO D A PARTIR DE UN LATCHERS

-FULLADDER
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity FULLADDER is
port ( A,B,Ci : in std_logic;
C0,S : out std_logic);
end entity;
architecture rtl of FULLADDER is
signal R,T,L: std_logic;
begin
R<= (A xor B);
T<= (A and B);
S<= ( R xor Ci);
L<= (R and Ci);
C0<= (L or T);
end architecture;
---------------------FULLADDER_4BITS
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity FULLADDER_4BITS is
port ( A,B,Ci,A1,B1,A2,B2,A3,B3 : in std_logic;
C0,S,C1,S1,C2,S2,C3,S3: buffer std_logic);
end entity;
architecture FULLADDER of FULLADDER_4BITS is
signal R,T,L,R1,T1,L1,R2,T2,L2,R3,T3,L3: std_logic;
begin
R<= (A xor B);
T<= (A and B);
S<= ( R xor Ci);
L<= (R and Ci);
C0<= (L or T);
R1<=
T1<=
S1<=
L1<=

(A1 xor B1);

(A1 and B1);
( R1 xor C0);
(R1 and C0);

C1<= (L1 or T1);

R2<=
T2<=
S2<=
L2<=
C2<=

(A2
(A2
(R2
(R2
(L2

xor B2);
and B2);
xor C1);
and C1);
or T2);

R3<= (A3 xor B3);

T3<= (A3 and B3);
S3<= (R3 xor C2);
L3<= (R3 and C2);
C3<= (L3 or T3);
end architecture;
---------------------LACTH_SR
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity LACTH_SR is
port ( S , R : in std_logic;
Q , B : inout std_logic);
end entity;
architecture SR of LACTH_SR is
begin
process (S,R,Q,B)
begin
Q<= ( B NOR R);
B<= ( Q NOR S);
end process;
end architecture;
-------------------------LACTH_SR_4BITS
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity LACTH_SR_4BITS is
port ( S,R : in std_logic;
Q,B,Q1,B1,Q2,B2,Q3,B3 : inout std_logic);
end entity;
architecture SR of LACTH_SR_4BITS is
begin
process (S,R,Q,B,Q1,B1,Q2,B2,Q3,B3)

begin
Q<= ( B NOR R);
B<= ( Q NOR S);
Q1<= ( B1 NOR Q);
B1<= ( Q1 NOR B);
Q2<= ( B2 NOR Q1);
B2<= ( Q2 NOR B1);
Q3<= ( B3 NOR Q2);
B3<= ( Q3 NOR B2);
end process;
end architecture;