PIC C18 - Hitech C PDF

1
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LI NI U
Ti liu ny cng vi cng chng trnh l ti liu hng dn chnh thc cho hc vin tham
gia kha hc PIC C18 Full do Nhm o To BigLab ph trch.
Ti liu c gi tr lu hnh ni b, c cung cp min ph cho hc vin tham gia kha hc.
Mi thc mc v ti liu xin lin h trc tip vi ging vin ng lp.
Ti liu c bin son ln u chc chn cn nhiu thiu st, rt mong s gp ca qu hc
vin, c gi. Mi kin ng gp xin lin h email: vxquoc@gmail.com
Nhm bin son

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MC LC
B CHNG TRNH TI BIGLAB ........................................................................... 8
CNG CHNG TRNH PIC TOTAL ............................................................ 11
Bi 1 : NHNG KHI NIM BAN U ................................................................... 17
1.1 VI IU KHIN L G ...................................................................................... 17
1.2 TNG TH KIN TRC PHN CNG VI IU KHIN ................................ 19
1.3 LA CHN DNG VI IU KHIN ................................................................ 22
1.4 CC NGN NG LP TRNH CHO VI IU KHIN ..................................... 22
Bi 2 : K THUT LP TRNH C ............................................................................. 24
2.1 KHI QUT NGN NG C .............................................................................. 24
2.2 NHNG VN LIN QUAN KHI S DNG C CHO LP TRNH PIC ....... 31
Bi 3 : B NH, B DAO NG V THANH GHI H THNG .......................... 33
3.1 B NH ............................................................................................................. 33
3.2 B DAO NG .................................................................................................. 36
3.3 TIN X L V THANH GHI H THNG ...................................................... 38
3.4 BI TP .............................................................................................................. 39
Bi 4 : IO PORT OUTPUT ....................................................................................... 40
4.1 GII THIU PHN CNG ................................................................................ 40
4.2 BI TP - CC NG DNG CA IO PORT-PHN OUTPUT ........................ 42
4.3 BI TP V NH: ............................................................................................. 44
4.4 PH LC CHUN LOGIC NG RA CA IO PORT ..................................... 45
Bi 5 : NGT (INTERRUPTS) .................................................................................... 46
5.1 NH NGHA NGT .......................................................................................... 46
5.2 PHN LOI NGT ............................................................................................ 46
5.3 HOT NG CA NGT ................................................................................. 47
5.4 TNG TC VI NGT ................................................................................... 49
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5.5 BI TP .............................................................................................................. 51
Bi 6 : IO PORT - INPUT ............................................................................................ 52
6.1 M T PHN CNG ......................................................................................... 52
6.2 BI TP NG DNG IO PORT - INPUT ....................................................... 52
6.3 PH LC ............................................................................................................ 53
Bi 7 : TIMER .............................................................................................................. 55
7.1 NHNG KHI NIM ......................................................................................... 55
7.2 HOT NG CA TIMER ................................................................................ 56
7.3 TNG TC VI TIMER.................................................................................. 59
7.4 BI TP .............................................................................................................. 60
Bi 8 : BI TP GIA KHA.................................................................................... 61
8.1 YU CU............................................................................................................ 61
8.2 M T PHN CNG ......................................................................................... 61
8.3 GII THUT ...................................................................................................... 62
8.4 CHNG TRNH ............................................................................................... 62
Bi 9 : NGN NG LP TRNH C NNG CAO ...................................................... 63
9.1 TI LIU THAM KHO .................................................................................... 63
9.2 CC HM THNG DNG TRONG TH VIN C CHUN:............................ 63
Bi 10 : IO PORT NNG CAO LCD ....................................................................... 66
10.1 TNG QUAN V LCD ....................................................................................... 66
10.2 CU TRC PHN CNG (LCD- HD 44780) ................................................... 67
10.3 TP LNH ........................................................................................................... 67
10.4 TNG TC VK - LCD .................................................................................... 67
Cc hm tng tc c bn: ......................................................................................... 68
Bi 11 : TIMER 1, 2, 3.................................................................................................. 70
11.1 TI LIU THAM KHO .................................................................................... 70
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11.2 CU TRC PHN CNG TIMER 1, 2, 3 (Tham kho bi s 7) ........................ 70

11.3 S DNG TH VIN C18 CHO VIC CI T TIMER ................................ 71
...... 73
Bi 12 : ADC (ANALOG DIGITAL CONVERT) .................................................... 75
12.1 TI LIU THAM KHO .................................................................................... 75
12.2 TNG QUAN V ADC....................................................................................... 75
12.3 B CHUYN I ADC TRONG VK .............................................................. 76
Bi 13 : USART ............................................................................................................ 81
13.1 TI LIU THAM KHO .................................................................................... 81
13.2 KHI QUT V CC CHUN GIAO TIP ...................................................... 81
13.3 USART TRONG PIC ........................................................................................... 82
Bi 14 : PWM / CAPTURE / COMPARE ................................................................... 86
14.1 TI LIU THAM KHO .................................................................................... 86
14.2 TNG QUAN V PWM/CAPTURE/COMPARE ............................................... 86
14.3 QUY TRNH S DNG MODULE PWM TRONG PIC ..................................... 89
14.4 PHN M RNG - ENCODER .......................................................................... 89
Bi 15 : SPI I2C ......................................................................................................... 92
15.1 TI LIU THAM KHO .................................................................................... 92
15.2 TNG QUAN V SPI ......................................................................................... 92
15.3 HOT NG CA SPI ...................................................................................... 92
15.4 SPI TRONG PIC .................................................................................................. 93
15.5 TH VIN SPI TRONG C18 .............................................................................. 93
15.6 M RNG I2C ................................................................................................. 94
15.7 CC PHNG PHP LU TR D LIU ...................................................... 96
Bi 16 : BI TP TNG KT .................................................................................... 98
16.1 YU CU............................................................................................................ 98
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16.2 M T PHN CNG ......................................................................................... 99

16.3 GII THUT ...................................................................................................... 99
16.4 CHNG TRNH ............................................................................................... 99
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DANH SCH HNH V

Hnh 1.1 - S khi kin trc tng th mt h my tnh ................................................... 19
Hnh 1.2 - CPU .................................................................................................................. 20
Hnh 1.3 - Cc dng vi iu khin PIC hin nay ................................................................. 22
Hnh 3.2 - Stack memory ................................................................................................... 35
Hnh 5.1 - S logic ca ngt trong PIC 18F4550............................................................ 46
Hnh 6.1 - S mch lp trnh qut phm n .................................................................. 52
Hnh 7.1 - Timer 3 bit. ....................................................................................................... 55
Hnh 8.1 - S phn cng mch th nghim ..................................................................... 61
Hnh 16.1 - S phn cng ca mch th nghim............................................................. 98
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DANH SCH BNG BIU

Bng 1.1
Mt vi ng dng ca vi iu khin trong thc t ............................................ 18
Bng 2.1
Cc kiu d liu trong C ................................................................................. 25
Bng 2.2
Cc cu trc lnh trong C ................................................................................ 27
Bng 2.3
Ton t trong C............................................................................................... 27
Bng 2.4
Bng so snh mc u tin ca cc ton t: ................................................. 28
Bng 4.1
Cc thanh ghi PORTA .................................................................................... 41
Bng 4.2
Bng m dnh cho LED 7 on Anode chung ................................................. 43
Bng 4.3
Bng m dnh cho LED 7 on Cathode chung:.............................................. 44
Bng 9.1
Cc kiu d liu nng cao trong C................................................................... 63
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B CHNG TRNH TI BIGLAB

B chng trnh ti Nhm o To K Thut BigLab c thit k nhm cung cp nhng kin
thc b tr cn thit nht cho cc bn hc vin quan tm ti lnh vc lin ngnh C kh in t Lp trnh, hay cn gi l C in t.
B CHNG TRNH O TO TI BIGLAB
C kh
in t
SolidWorks
cn bn
AutoCAD
cn bn
Thit k vi
SolidWorks
Thit k vi
AutoCAD
OrCAD
cn bn
in t
thc hnh
Lp trnh vi iu khin
PIC C bn
in t
KTS
PIC Full
PIC Full
CCSC
ARM
Total
PIC Full
C18
PIC ng dng
in t ng dng
PIC - iu
khin ng
c
PIC Giao
tip khng
dy
PIC C#
MC TIU: THIT K H THNG T NG

Vi mc tiu trn, ton b chng trnh c chia lm 3 mng ln: C kh, in t, Lp trnh.
C kh:
mng c kh, chng trnh s dng 2 phn mm thit k: SolidWorks v AutoCAD. y l
cc phn mm thng dng vi u im trc quan, tm ng dng ln, d s dng, rt thch hp cho
cc yu cu thit k c kh.
Cc lp v SolidWorks v AutoCAD c chia lm 2 cp : C bn v ng dng vo thit k
c kh.
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Lp c bn s cung cp nhng kin thc c bn v cc phn mm, cc phng php dng

hnh c bn. i tng ca lp c bn l cc bn sinh vin nm 2, 3 ln u tin tip xc
vi phn mm
Lp thit k: Cc bn s c hc v phng php thit k, trnh t thit k trong c kh,

thit k theo trnh t gia cng... Sau s ng dng cc kin thc v phn mm vo vic
thit k c kh. i tng chnh ca lp thit k l nhng ai bit v AutoCAD v
SolidWorks c bn, mong mun s dng n thit k cc chi tit c kh.
in t:
-
Lp in t thc hnh: lp ny cc bn s c hc v cc linh kin in t c bn da

trn s phn tch vai tr ca chng trong cc mch in t nh mch ngun tuyn tnh,
mch khuch i, mch ngun xung... Trong chng trnh cn tch hp vic s dng cc
phn mm thng dng trong in t nh: phn mm thit k mch OrCAD, phn mm m
phng mch Tina,...
Lp in t k thut s vi iu khin: l phn sau ca lp in t thc hnh. Trong lp

ny cc bn s c hc t cc nguyn l c bn ca h thng xung, s n vic thit k
hon chnh mt mch k thut s. c bit lp cung cp cho cc bn nhng kin thc thit
k mch giao lin quan ti vi iu khin (PIC, ARM...) nh mch hin th LED, mch giao
tip my tnh, mch phm nhn.... Chng trnh c s dng cc phn mm in t nh:
OrCAD, Circuit Maker, Proteus,...
Lp in t ng dng: y l lp nng cao trong mng in t, cung cp cho cc bn nhng

kin thc phi hp c th thit k mt mch in t.
Lp trnh nhng:
Cc lp lp trnh nhng l mt mng ln c quan tm nht ca b chng trnh ti BigLab.
Hin ti BigLab c cc chng trnh lp trnh cho vi iu khin: PIC, ARM trong b chng
trnh cho vi iu khin PIC c thit k cng phu v c th nghim qua nhiu kha hc.
Chng trnh PIC c thit k theo 2 hng chnh:
-
Hng y trong 1 kha:
l cc lp PIC Full. y l cc lp dy y v vi iu khin PIC. Cc bn s c hc

t h thng ti cc module ngoi vi v s dng thnh tho ngn ng C lp trnh cho cc module
ny. Trong hng ny chng trnh c chia ra lm 2 hng nh da trn vic s dng 2 trnh
bin dch khc nhau: CCSC v C18.
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+ CCSC: y l trnh bin dch d s dng, khng cn kin thc chuyn su v h thng. Lp
ny thch hp cho nhng bn i lm v mong mun c kin thc v lp trnh vi iu khin s
dng trong cng vic c th.
+ C18: l trnh bin dch chuyn su ca Microchip vit ring cho dng PIC18. s dng
trnh bin dch ny i hi cc bn phi c kin thc su v phn cng vi iu khin. Chnh v th
s thng qua vic lp trnh cc bn s hiu r v hot ng ca vi iu khin hn, t d dng
tm hiu nhng dng vi iu khin khc (nh ARM,...).
-
Hng PIC C bn ng dng:
y l b chng trnh lp trnh vi iu khin PIC c thit k c bit dnh cho cc bn sinh
vin, nhng ngi c thi gian, lng am m cng nh s kin nhn theo ui v nm vng
dng vi iu khin PIC. Lp u tin trong b ny l lp PIC C bn: lp ny s cung cp nhng
kin thc c bn v lp trnh C, vi iu khin PIC, cc nguyn l hot ng ca vi iu khin, v
cc module h thng. Cc lp tip theo ca chng trnh l cc lp ng dng vi iu khin vo
vic gii quyt cc bi ton thc t nh iu khin ng c, giao tip my tnh, giao tip khng
dy... cc lp ny cc bn s c hc cc module ngoi vi tng ng, sau s ng dng cc
module ny vo thc t cng vic.
Ton b chng trnh ny c thit k s dng trnh bin dch C18, l mt trnh bin dch
chuyn su do Microchip pht trin chuyn dng cho dng vi iu khin PIC18F.
Lp hc NG HNH, bui ni chuyn chuyn :
Ngoi nhng chng trnh c nh trn Nhm cn thung xuyn m cc lp hc NG HNH
(min ph) v ch nht hng tun. y l ni cc bn c c hi hc tp min ph, gp g giao lu
v c c hi tm hiu thm v lnh vc mnh ang theo ui.
Bn cnh cc bui hc NG HNH l cc bui ni chuyn chuyn chia s kinh nghim
hc tp, cp nht kin thc cng ngh... cng c t chc thng xuyn.
y l cc chng trnh c cc Ging vin trng i Hc Bch Khoa TPHCM thc hin
nhm to mt khng kh gp g giao lu, kt ni vi ton th cc bn sinh vin k thut cng
to dng mt cng ng vng mnh hn trong lnh vc k thut iu khin t ng.
Mi thc mc xin lin h website chnh thc ca nhm: www.biglab.edu.vn hoc thng qua
din n: www.dieukhienvietnam.com
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CNG CHNG TRNH PIC TOTAL

I.
MC TIU V I TNG
1. i tng kha hc
i tng chnh ca kha hc dnh cho nhng ai mun lm quen v i n nm vng vi
iu khin PIC, ng dng PIC cho cc cng vic iu khin, giao tip.
2. Mc tiu kha hc:
Hon thnh kha hc hc vin s:
Nm c tng quan cc chc nng trong cc dng vi iu khin ca hng Microchip v
cch la chn dng vi iu khin ph hp.
- Hiu r vi iu khin PIC
- Nm c cch s dng cc modul ca dng vi iu khin PIC18F, c v hiu datasheet
sau ny c th d dng tip cn nhng dng vi iu khin khc.
- Lp trnh s dng tt c cc module ca vi iu khin bng ngn ng C.
- M phng chng trnh v hin thc trn kit th nghim.
- c s t vn, h tr trc tip t cc thc s, k s c kinh nghim trong v sau kha hc.
II.
NI DUNG CHNG TRNH
Chng trnh xy dng da trn dng vi iu khin PIC18 ca hng Microchip. Ngn ng lp
trnh s dng: C18. Dng vi iu khin s dng th nghim l PIC18F4620.
Chng trnh s cung cp cho hc vin nhng kin thc v vi iu khin PIC t c bn ti nng
cao. Gip hc vin thc hnh thnh tho vic s dng cc module chc nng trong vi iu khin,
tin ti ng dng vi iu khin PIC gii quyt cc vn thc t. Chng trnh cng c nhiu
bi tp thc hnh thc t lin quan.
cng chi tit (18 bui)
-
Bui 1: Nhng khi nim c bn v vi iu khin

o Vi iu khin l g? Nhng dng vi iu khin c trn th trng
o Cu trc phn cng vi cc dng vi iu khin c bn
o Gii thiu phn mm s dng, kit th nghim, b th nghim PIC
o B tc k thut lp trnh C cho vi iu khin
Cc h s m
Bin v hng
Bui 2: B tc k thut lp trnh C cho vi iu khin (tt)
o Con tr, mng
o Cu trc lnh
Cu trc iu kin
Cu trc lp
Cu trc la chn
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o Hm
o Ton t
o Cu trc v cch thc thi chng trnh C
o Nhng kin thc cn bn v t ch b nh PIC
Bui 3: T chc phn cng ca PIC
o Thanh ghi h thng
o Cc vn lin quan ti b dao ng, tin x l
o Gii thiu cc module ca vi iu khin
o Bi tp: Vit code ci t phn cng cho vi iu khin PIC
o Gii thiu cc phn mm v ngn ng s dng
Trnh bin dch C complier
C complier v MPLAB
Proteus v m phng bng Proteus
Bui 4: Cc module cn bn ca vi iu khin PIC
o L thuyt:
T chc phn cng
Cc thanh ghi iu khin PORT
o Bi tp:
Lp trnh xut led n
Bui 5: Cc module cn bn ca vi iu khin PIC (tt)
o Bi c:
Lp trnh hin th led 7 on
o L thuyt:
T chc phn cng ca interrupt
Cc thanh ghi iu khin interrupt trong PIC
o Bi tp v nh:
Lp trnh s dng c phm n bng ngt ngoi
o Bi c:
Lp trnh c s ln nhn phm hin th ra led 7 on
o L thuyt:
Cc thanh ghi iu khin input
o Bi tp:
Lp trnh c 4 phm n (s dng phng php qut)
o Bi tp v nh:
Lp trnh c 4 phm n bng phng php ngt RB
o Bi c:
Lp trnh qut phm ma trn
o L thuyt:
T chc phn cng timer
Cc thanh ghi iu khin timer trong PIC
Watch Dog Timer (WDT)
o Bi tp:
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Lp trnh s dng timer to hm delay

o Bi c:
Lp trnh dng hm delay iu khin I/O Port
o Bi tp gia kho: Hc vin chn 1 trong 2 bi tp sau lm ti lp, cc bi cn
li lm nh
Bi tp 1: Lp trnh hin thc ng h s
Bi tp 2: Lp trnh hin thc my tnh b ti n gin
Bui 9: Hon thnh bi tp gia kho
Bui 10: Lp trnh C nng cao
o n tp cc lnh C c bn
o Cc kiu d liu m rng
o Tng tc vi cc hm trong th vin C
o Hm chuyn i kiu d liu
o Hm x l chui
Bui 11: I/O Port nng cao
o Nhc li kin thc v PORT
o LCD
Kin trc phn cng LCD
Cc thanh ghi, cc ch lm vic ca LCD
Tp lnh LCD
o Bi tp:
Hin th d liu va nhp ra LCD
o Bi tp v nh:
Nhp d liu s t nt nhn, hin th d liu va nhp ra LCD (c th kt
hp vi Basic KIT)
Bui 12: Timer 1, 2, 3
o Counter
Thanh ghi quy nh chc nng counter
Ngt counter (nhc li c bn phn ngt)
o Realtime timer
T chc phn cng ca mch thi gian thc dng thch anh 32k
o Bi tp:
Lp trnh m xung encoder dng counter
o Bi tp v nh:
Thit k ng h thi gian thc dng thch anh thi gian thc v timer 1/3
Bui 13: ADC
o C bn v nguyn l b chuyn i Analog Digital
o Nhng thng s c trng ca b chuyn i
o Cu trc b ADC trong PIC
o Cc thanh ghi quy nh cho b ADC
o Ngt ADC
o Bi tp:
c gi tr bin tr VR
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Hin th gi tr in tr hin thi ca VR ra LCD

o Bi tp v nh: Thit k h thng gim st nhit phng
c ADC t cm bin nhit
Dng Timer ci t thi gian ly mu
Hin th gi tr nhit ra LCD
Bui 14: UART giao tip ni tip bt ng b
o Chun giao tip ni tip
Chun giao tip ni tip l g, cc ng dng
Cc thng s c trng ca chun giao tip ni tip RS232
o UART trong PIC
T chc phn cng
Ngt UART
Chng trnh truyn nhn trn PIC
Gii thiu v giao tip my tnh qua RS232
o Bi tp:
Giao tip PIC My tnh: gim st nhit phng bng th trn my tnh
Bui 15: PWM/Capture/Compare
o PWM/Capture/Compare
Nguyn l, ng dng?
Cc thng s c trng
o PWM/Capture/Compare trong PIC
T chc phn cng
Chng trnh thao tc
Thc hnh iu ch xung PWM, cc chc nng Capture, Compare trn kit
th nghim
o Bi tp:
iu khin vn tc ng c DC dng PWM c gim st vn tc bng my
tnh
o Bi tp v nh:
iu khin vn tc ng c c hi tip dng encoder
Bui 16: Bi tp tng kt:
o Thit k h thng gim st tc qut lm mt, t ng iu chnh tc theo
nhit .
iu khin ng c bng PWM c hi tip encoder
c ADC t cm bin nhit cp nht gi tr vn tc
Hin th nhit , tc ra LCD dng trn, dng di l thi gian ng c
hot ng (tnh bng gi, pht, giy)
Mi 1 pht lu gi tr vo EEPROM (optional)
Bui 17: SPI giao tip ni tip ng b; Cc phng php lu tr d liu
o Chun giao tip SPI
Chun giao tip SPI l g, cc ng dng?
Cc thng s c trng ca chun giao tip SPI
o SPI trong PIC
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T chc phn cng

Tp lnh tng tc vi EEPROM
Khi nim v chun giao tip I2C v cc phng php lu tr d liu.
o Bi tp:
Lu v c d liu t EEPROM ngoi qua SPI
o Bi tp v nh:
Lp trnh m phng giao tip gia 2 VK PIC dng SPI
- Bui 18: Hon thnh bi tp, tng kt
o n tp, kim tra cui kha
o Tng kt
o Gii thiu ng dng
III.
CC CHUYN NG DNG KM THEO SAU KHA HC
1. Chuyn 1: iu khin ng c: Step, DC motor
2. Chuyn 2: Giao tip khng dy 2 phn
3. Chuyn 3: PIC C# - Giao tip my tnh
4. Chuyn 4: iu khin 2 ng c DC phi hp bn my 2D
5. Chuyn 5: chuyn phi hp: Robot 2 bnh, Robot d line.
6. Chuyn 6: chuyn phi hp: Con lc ngc
7. Chuyn 7: chuyn phi hp: Xe 2 bnh t cn bng
8. Chuyn 8: iu khin ng c khng chi than iu khin lc nng qut
9. Chuyn 9: iu khin 2 ng c khng chi than cn bng 2 cnh qut
10. Chuyn 10: chuyn phi hp: Quad Rotor
IV.
TI LIU V THIT B HC TP
1. Ti liu hc tp
- Ti liu hc tp chnh do trung tm cung cp
- Cc ti liu tham kho s c gii thiu trong tng bui hc
2. Thit b hc tp
- My tnh Laptop do hc vin t trang b
- Kit th nghim do trung tm cung cp
- Mch np, ngun v nhng linh kin khc do trung tm cung cp
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PHN BI GING
PIC C18
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Bi 1 : NHNG KHI NIM BAN U

Bi 1 gii thiu tng quan v khi nim v lch s ra i, pht trin vi iu khin. S khc nhau
v ging nhau gia vi iu khin v vi x l, kin trc in hnh ca mt vi iu khin. Bi 1 cng
gii thiu v lch s, kin trc ca dng vi iu khin PIC. Tc gi cng i su phn tch cc tiu
ch la chn dng vi iu khin cho cc ng dng c th. T a ra l do v sao vi iu khin
PIC l mt s la chn hp l trong hon cnh hin nay.
1.1 VI IU KHIN L G
1.1.1 Vi nt v lch s
Nhng thp k cui ca th k XX, vi s pht trin ca cng ngh bn dn, k thut in t c
nhng bc pht trin vt bc. Ngy cng c nhiu linh kin c tch hp trong mt th tch
nh hn. Nhng thit b ny gi l cc vi mch tch hp.
Nm 1971 Intel cho ra i b vi x l u tin, chip 4004, cha 2300 transistor. S kin ny
c xem nh l mt bc t ph v cng ngh. Vi s pht trin khng ngng, ngy nay s
transitor tch hp trong vi x l ln con s hng chc triu (b vi x l Penltum 4 cha 55 triu
transistor).
Nh vy vi x l m mt mch tch hp cha hng ngn thm ch hng triu transitor kt ni
vi nhau. Cc transistor cng nhau lm vic tnh ton, x l, lu tr Chc nng c th ca
vi x l c xc nh bng phn mm.
1.1.2 T vi x l ti vi iu khin
Vi x l ch c tc dng tnh ton, thc hin mt chc nng no c th (v d iu khin
ng c) vi x l phi c kt ni vi cc thit b, c th l cc mch in bn ngoi. H thng
d ln hay nh, nu dng vi x l th cng i hi cc khi mch in giao tip phc tp nh
nhau. Cc khi ny bao gm b nh cha d liu v chng trnh thc hin, cc mch in giao
tip ngoi vi xut nhp v iu khin tr li, cc khi ny cng lin kt vi vi x l th mi thc
hin c cng vic. kt ni cc khi ny i hi ngi thit k phi hiu bit tinh tng v
cc thnh phn vi x l, b nh, cc thit b ngoi vi. H thng c to ra kh phc tp, chim
nhiu khng gian, mch in phc tp. V thc hin vic nay yu cu trnh ngi thit k phi
cao. Kt qu l gi thnh sn phm cui cng rt cao, khng ph hp p dng cho cc h thng
nh.
Chnh v yu cu vi iu khin ra i. Vi iu khin l s tch hp mt t b nh v mt s
mch giao tip ngoi vi cng vi vi x l vo mt IC duy nht. Vi iu khin c kh nng tng t
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nh kh nng ca vi x l, nhng cu trc phn cng dnh cho ngi dng n gin hn nhiu. Vi
iu khin ra i mang li s tin li i vi ngi dng, h khng cn nm vng mt khi lng
kin thc qu ln nh ngi dng vi x l. Thm vo , kt cu mch in dnh cho ngi dng
cng tr nn n gin hn nhiu, v c kh nng giao tip trc tip vi cc thit b bn ngoi. V
d nhin v th gi thnh ca vi iu khin cng r hn nhiu so vi vi x l. Nhng thay cho
nhng li im ny l kh nng x l b gii hn (tc x l chm hn v kh nng tnh ton t
hn, dung lng chng trnh b nh hn).
Vi nhng u im , ngy nay, vi iu khin ring l c s dng rng ri vo nhiu ng
dng c chc nng n gin, khng i hi tnh ton phc tp. Vi s tch hp nhiu chun giao
tip khc nhau, cc vi iu khin c kh nng kt ni vi nhau to thnh mt h thng ln khi
yu cu phc tp v h thng tng ln. Do vi iu khin l thnh phn khng th thiu trong
cc h thng s d ln hay nh m c kh nng lp trnh.
1.1.3 ng dng ca vi iu khin
Nh ni trn, vi iu khin c ng dng nhiu trong cc h thng va phi. Nhng h
thng ny c th k n nh: cc thit b gia nh, cc thit b vn phng, cc ng dng cng
nghip nh, chiMt vi ng dng vi iu khin c cho bng sau:
Bng 1.1
Mt vi ng dng ca vi iu khin trong thc t
Thit b gia nh
Thit b vn phng
Thit b cng nghip
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in trong nh
Tivi
Tr chi in t
L vi sng
VCR
Nhc c in t
Ca t ng
Camera
iu ha nhit
Dng c th thao
iu khin t xa
chi tr em
in thoi
My photocopy
H thng an ninh
My Fax
My tnh c nhn
My in
iu khin ng c
H thng o lng
Thit b ABS
iu khin chiu sang
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1.2 TNG TH KIN TRC PHN CNG VI IU KHIN

1.2.1 Kin trc tng th ca mt vi iu khin
Interrupt
Control
Timer/
Counter
CPU
Address, Data, Control BUS
B dao
ng
B nh
I/O
PORT
Ngoi vi
Hnh 1.1 - S khi kin trc tng th mt h my tnh

Mt h my tnh c bn bao gm: b x l trung tm (CPU), thit b tao dao ng (b dao
ng), b nh, cc iu khin, cng xut nhp v cc thit b ngoi vi (Hnh 1.1). Ton b cc
thnh phn ny c kt ni vi nhau thng qua cc BUS. Trong mt h my tnh, ty theo chc
nng s dng m BUS c chia lm 3 loi: BUS a ch (Address BUS), BUS d liu (Data
BUS) v BUS iu khin (Control BUS). Chi tit hn v cc thnh phn c trnh by sau y.
1.2.2 Kin trc cc thnh phn
1.2.2.1 B x l trung tm (CPU)
CPU l u no tnh ton ca ton b h thng, qun l tt c cc hot ng ca h v thc hin
tt c cc thao tc trn d liu. Hu ht cc CPU ch bao gm mt tp cc mch logic thc hin
lin tc 2 thao tc: tm np lnh v thc thi lnh. Thc t vic tnh ton trong CPU n thun ch l
cc php ton s hc trn h c s 2 c thc hin trong b tnh ton s hc ALU. Control Unit
trong CPU c nhim v tm lnh t cc thanh ghi v np lnh cho b tnh ton ALU x l (Hnh
1.2)
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Hnh 1.2 - CPU

1.2.2.2 B nh
y l mt tp hp cc nh, mi c mt s bit nht nh v cha mt thng tin c m ha
thnh s nh phn m khng quan tm ti kiu ca thng tin. Cc thng tin ny c th l lnh hay
d liu. Mi nh u c mt a ch. Thi gian truy cp vo mi nh l nh nhau, v vy b
nh ny cn c tn l b nh truy cp ngu nhin (RAM). Mi nh thng l 8bit, bt k di
ca t nh trong thit b l bao nhiu.
Tuy nhin b nh RAM ch c s dng khi chng trnh thc thi. Trong trng hp chng
trnh dng thc thi v mt l do g (h thng shutdown, mt in) th b nh ny s t ng
gii phng. Chnh v th, lu tr cc thng tin cn thit nh chng trnh, d liu quan trng
cn thm mt b nh ch c ROM.
Trong vi iu khin c 2 loi b nh: B nh d liu v b nh chng trnh tng ng vi b
nh RAM, ROM trong cu trc trn.
B nh d liu(RAM, hay data memory): L khng gian nh dng lu tr d liu ca chng
trnh khi chng trnh thc thi.
B nh chng trnh (program memory): y l mt dng ROM, tuy nhin trong vi iu khin
ROM l b nh c cho php truy xut, thay i v vy c gi l EEPROM (Electrically Erasable
Programmable Read-Only Memory).
1.2.2.3 B to dao ng
B to dao ng l phn khng th thiu ca mt h thng s. y l ngun cp xung nhp
ng b cho ton b hot ng ca h thng. Hu ht cc vi iu khin hin nay u c trang b
b dao ng ni, ngha l b to dao ng c ng gi bn trong chip. Tuy nhin b do ng
bn trong vi iu khin thng c xung nhp thp. V th xu hng hin nay trong thit k mch
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cho vi iu khin ngi ta thng dng b dao ng t bn ngoi. Vn ny s c ni r bi

3.
1.2.2.4 B nh thi (timer)
Cc ng dng iu khin thng thng u lin quan ti thi gian. Chnh v th b nh thi l
mt phn khng th thiu trong cc vi iu khin. B nh thi thng thng dng : nh thi
mt khong thi gian, m s kin, to xung
1.2.2.5 B iu khin ngt (Interrupt Control)
Ngt l hnh ng dng mt chng trnh ang thc thi thc hin chng trnh ch nh ngt
khi c mt tn hiu bo ngt. B ngt l mt mch logic mc ch l to ra mt xung kch hot ngt
(tn hiu bo ngt) cho CPU. Ngt l mt phn v cng quan trng trong vi iu khin. N gip
cho ngi lp trnh c nhiu sc mnh hn trong vic thit k mt ng dng. Mt chng trnh
c iu khin bi ngt lm cho ta c cm gic c nhiu ng dng ang chy song song, trn
thc t l chng chy ni tip nhau.
1.2.2.6 Cc thit b ngoi vi
Thit b ngoi vi y c hiu l nhng module chc nng tch hp sn trong vi iu khin.
Cc module ny tng dng vi iu khin l khc nhau ty theo dng vi iu khin c thit
k dnh cho cc ng dng ph thng hay mt vi ng dng c bit no . Cc module bao
gm: ADC, UART, SPI, I2C, PWM, Capture, Compare
1.2.2.7 Cc chn xut nhp
Cc chn xut nhp l cc chn chc nng chnh ca vi iu khin. y c xem l ng ra
chc nng ca vi iu khin c dng trc tip thit k cc ng dng iu khin. Hy tng
tng cc chn xut nhp nh tay, chn ca mt con ngi nu thiu tay chn th con ngi s
khng th c c mt thao tc no c.
1.2.2.8 BUS
BUS l mt tp hp cc dy mang thng tin c cng mt mc ch. CPU s dng 3 BUS
truy xut ti cc thnh phn xung quanh: BUS d liu, BUS iu khin v BUS a ch.
c trng quan trng nht ca BUS l s bit. S bit l s dy mang thng tin ng thi ca
mt BUS. S bit ca BUS a ch quy nh ln ca b nh m CPU c th truy xut c. S
bit ca BUS d liu quy nh ln ca mt d liu trong b nh. S bit ca BUS iu khin
ph thuc vo thit b cn iu khin. V my tnh thng dng ti khong 2/3 thi gian cho vic
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di chuyn cc d liu trn cc BUS nn rng ca BUS (hay s bit) l rt quan trng i vi hiu
sut cng nh tc ca my. Tc ca my tnh s tng khi s bit ca BUS tng ln.
1.3 LA CHN DNG VI IU KHIN

K t khi ra i n nay c rt nhiu dng vi iu khin ca nhiu hng khc nhau ra i. Sau
y l mt vi dng c bn, xp theo trnh t thi gian: 8611 ca Motorola, 8051 ca Intel, Z8 ca
Zilog, AVR ca Atmel, PIC ca Microchip. y l cc dng vi iu khin 8bit c bn. Ngoi ra
cn c cc dng vi iu khin 16 bit, 32 bit (PIC30F, 33F (dng 16 bit), PIC32(dng 32
bit)(hnh 1.3)
Chnh v c rt nhiu dng vi iu khin khc nhau nh vy nn vic la chn vi iu khin s
dng cn phi c xem xt. V c bn c 3 tiu chun chnh la chn s dng dng vi iu
khin no:
p ng yu cu cng vic mt cch hiu qu v kinh t
C sn cc cng c pht trin phn mm, nh cung cp linh kin phn cng
C ngun cung cp ti liu hc v pht trin tin cy.
Hnh 1.3 - Cc dng vi iu khin PIC hin nay

1.4 CC NGN NG LP TRNH CHO VI IU KHIN
lp trnh cho vi iu khin c cc ngn ng c bn sau:
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Hp ng (Assembly): y l mt tp hp cc m gi nh thc hin mt chc nng no

. Hp ng l ngn ng lp trnh gn vi ngn ng my nht v mi dng vi iu khin
u lun c mt tp lnh hp ng nht nh. Nh sn xut cng bt buc phi c mt trnh
bin dch hp ng dnh ring cho dng vi iu khin .
Ngn ng cp cao: Hu ht cc ngn ng cp cao dnh cho cc vi iu khin u dng li

ngn ng C. Tuy nhin mi cp khc nhau ngn ng C cng chia ra nhiu dng khc
nhau. Vi PIC chng ta c th c nhng trnh bin dch ngn ng C dnh ring nh sau:
CCSC
Hi-Tech C
C18, C30, C33
B trnh bin dch C18, C30, C33, l b trnh bin dch c hng Microchip thit k chuyn
dng lp trnh cho vi iu khin PIC v n c a ra khi mt dng vi iu khin PIC no
ra i. Chnh v c im ny cc trnh bin dch ny rt ph hp vi vic lp trnh cho dng vi
iu khin m n h tr. y l mt dng ngn ng thao tc trn phn cng, c th can thip vo
cp thanh ghi ca vi iu khin quy nh chc nng ca tng module cn bn trong vi iu
khin. ng thi ngn ng cng h tr cc hm tnh ton, cch khai bo, cc cu trc lnh ca
ngn ng C cn bn. iu ny gip ngi lp trnh d dng hn rt nhiu so vi vic s dng hp
ng m vn m bo hiu r c cch thc lm vic ca vi iu khin mc thanh ghi.
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Bi 2 : K THUT LP TRNH C
Bi 2 bn v cc vn c bn ca lp trnh C da trn ANSI C.
2.1 KHI QUT NGN NG C

2.1.1 Cc h s m
H nh phn:
H s dng cc k s 0 v 1 biu din s. VD: 1101, 1001
H thp phn:
H s dng cc k s t 0 n 9 biu din s. Cc con s ny c dng cng vi du
. phn cch phn thp phn v phn nguyn. Ngoi ra, phn bit s m v s dng ngi
ta cn thm du - v du + trc k s.
VD: 15; 12.96; -902.6
H thp lc phn:
H s dng cc k s 0 n 9 cng cc k t A n F biu din s.
VD: 9AF; 6BC
Cch chuyn i k s: (GV hng dn ti lp)

2.1.2 Bin, hng, mng
2.1.2.1 Bin
Bin c v nh mch mu trong chng trnh truyn d liu t hm ny sang hm khc. Mt
bin c c trng bi 2 c tnh: kiu bin v tm vc ca bin. Bng di y lit k cc kiu
bin c h tr trong C:
Bin : <kiu d liu> <tn bin> = <gi tr>;
Phn khai bo gi tr c th cn hoc khng.
Tm vc truy xut bin:
Bin ton cc:
o Bin ton cc l bin xut hin khi chng trnh thc thi, tn ti sut trong thi gian
chng trnh thc thi ch c gii phng khi chng trnh kt thc.
o Tt c cc hm trong chng trnh u c th truy xut gi tr ca bin ton cc
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o Bin ton cc c khai bo u chng trnh trong phn khai bo bin
Bin a phng:
o Bin a phng l bin xut hin khi on chng trnh cha bin a phng thc
thi, gii phng khi on chng trnh kt thc.
o Ch chng trnh con, on chng trnh cha bin a phng mi c truy xut
bin
o Bin a phng c khai bo trong on chng trnh, chng trnh con
Kiu bin:
Bng 2.1
Cc kiu d liu trong C
2.1.2.2 Hng
Hng s trong C c ngha theo ng hng s ton hc. C ngha l gi tr ca hng s khng
thay i trong sut qu trnh chng trnh thc thi.Hng s lun c tm vc ton cc.
khai bo hng s thuc mt kiu d liu no ta thm t kha const vo pha trc t
kha quy nh kiu d liu.
Hng: const <kiu d liu> <tn hng> = <gi tr>;
Bt buc phi c phn khai bo gi tr.
VD: const int8 a = 10;
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2.1.2.3 Mng
Khai bo mng hng s:
Mt mng hng s c kch thc ti a ph thuc vo loi vi iu khin s dng.
Vi VDK PIC16F: Kch thc mng hng s ti a l 256 byte
Vi VDK PIC18F tr ln: Kch thc mng hng s ti a khng gii hn
Khai bo:
const<kiu d liu mng><tn mng>[<kch thc mng>] = {<gi tr cc phn t
mng>};
VD: const int8 vidu[2] = {1,2};
Lu :
Nhng phn t no cha c t gi tr s mc nh gi tr l 0
Truy xut gi tr vt qu kch thc mng s lm chng trnh chy v tn
Mng hng s thng dng lm bng tra (v d bng tra cc hm lng gic)
Khai bo bin mng:

Khai bo tng t khai bo mng hng s.Tuy nhin khng c t kha const v khng cn ci
t gi tr cho cc phn t ca mng (mc nh gi tr u s l gi tr mc nh ca kiu d liu

mng).
Mt s lu v kch thc:
Kch thc mng ph thuc vo khai bo con tr v loi VDK
PIC16F thng khng qu 60 byte d l khai bo con tr 16 bit hay 8 bit. Tuy nhin nn
khai bo con tr 16 bit v lc s trnh li xy ra: not enough RAM for all variable
PIC18F Kch thc bin mng khng gii hn. Nu khai bo con tr 8 bit th bin mng
ti a l 256 byte, nu l 16 bit th ton b khng gian b nh RAM
Mt s lu khi s dng bin, mng, hng s:
Trn s: S trn s xy ra khi khai bo kiu d liu nh hn phm vi s s dng. Lc

trnh bin dch s lm trn s theo cch vng tun hon:
VD: int8 a = 260;
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Khi bin dch gi tr a c lm trn nh sau: a = 260-256 = 4
Tnh ton vi s m: Khi tnh ton vi s m bt buc ta phi khai bo kiu d liu l s
c du (mc nh l khng du) nu khng s gp kt qu tng t nh trng hp trn s.
Chuyn kiu v p kiu
unsigned char a =8 , b=200;

Int c;
c= (int16) a * b;
on code trn ta p kiu d liu ca php nhn 2 s 8 bit thnh mt s 16 bit. Vic ny s
trnh li trn s cho php nhn, ng thi tit kim b nh, gim thi gian tnh ton (v nu khng
phi khai bo li cc bin a, b)
2.1.3 Cu trc lnh
Bng 2.2
2.1.4
Cc cu trc lnh trong C
Ton t
2.1.4.1 Ton t
Bng 2.3
Ton t trong C
STT
Loi ton t
Tn ton t
K hiu
Chc nng
Ton t tnh ton

s
Nhn
Nhn 2 s
Chia
Chia 2 s
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Cng
Cng 2 s
Tr
Tr 2 s
Chia ly d
Chia ly d 2 s nguyn
Not bit
o logic tng bit
Dch tri
<<
Dch sang tri mt s bit
Dch phi
>>
Dch sang phi mt s bit
AND
&
V tng bit
10
XOR
XOR tng bit
11
OR
OR tng bit
AND
&&
AND logic 2 gi tr logic
OR
||
OR logic 2 gi tr logic
So snh bng
==
So sng bng 2 s
15
So snh khc
!=
So snh khc 2 s
16
SS b hn
<
SS b hn 2 s
17
SS b hn, bng
<=
SS b hn hoc bng 2 s
18
SS ln hn
>
SS ln hn 2 s
19
SS ln hn, bng
>=
SS ln hn hoc bng 2 s
Ton t bit
12
Ton t logic
13
Ton t quan h
14
2.1.4.2 Mc u tin ca cc ton t

Bng 2.4
Bng so snh mc u tin ca cc ton t:
STT
Tn
M c
Ton t
Nhm
Primary
1(high)
() . []
Left to Right
Unary
! ~ -(type) * & ++ --sizeof
Right to Left
Binary
Arithmetic
Shift
Relational
Equality
Bitwise
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/ *%
Left to Right
+-
Left to Right
>> <<
Left to Right
< <= > >=
Left to Right
== !=
Left to Right
&
Left to Right
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Bitwise
Left to Right
10
Bitwise
10
Left to Right
11
Logical
11
&&
Left to Right
12
Logical
12
||
Left to Right
13
Conditional
13
? :
Right to Left
= += -= /= *= %= <= >= &=
Left to Right
14
Assigment
14 (low)
|= ^=
2.1.5 Hm
2.1.5.1 C php hm
Mt hm C phi bao gm mt kiu tr v (kiu tr v void nu khng c gi tr tr v), mt
tn xc nh, mt danh sch cc tham s trong ngoc n (nu danh sch ny khng c tham s
no th ghi l void bn trong du ngoc), sau l khi cc cu lnh (hay khi m) v/hay cc cu
lnh return. (Nu kiu tr v l void th mnh ny khng bt buc phi c. Ngc li, cng
khng bt buc ch c mt cu lnh return m ty theo k thut, ngi lp trnh c th dn dng
m sao cho mi hng ch nhnh u c tr v ng kiu.)
<kiu_tr_v> tn_hm(<danh sch tham s>)
{
<cc_cu_lnh>
return <bin (hay gi tr) c kiu l kiu_tr_v>;
}
Trong , <danh sch tham s> ca N bin th c khai bo nh l kiu d liu v tch ri
nhau bi du phy ,
Ton b danh sch ny c t trong ngoc n ngay sau tn_hm.
-
Th d:
Vit hm add tnh tng hai s c kiu integer, hm abs tnh tr tuyt i ca s c kiu integer,
v chng trnh (hm main) hin th hai dng 1 + 1 = 2 v absolute value of -2 is
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2.1.5.2 Cc kiu truy xut bin trong hm

Khi thc hin mt li gi hm ta phi cung cp y thng tin ph hp vi hm hm
c th thc hin
VD: void test(int8 n)
{}
test(x);
y n c gi l tham s hnh thc, ch mang tnh hnh thc.x l tham s thc s. Vic gi x
vo cho hm test thay th cho n c gi l truyn tham s. Vi nhng hm khng c tham s th
khng phi truyn. C 3 loi truyn tham s:
Truyn tham tr:

Gi tr ca tham s thc s c gi n cho hm. Khi thc hin truyn tham s theo kiu ny
th hm c gi ch tc ng ln bn sao ca tham s gc, do vy n ch lm thay i gi tr ca
bn sao m khng nh hng n tham s gc.
VD:
void test(int x)
{
x=x+10;
}
void main()
{
int n=5;
test(n);
cout<<"Gia tri n ="<<n<<endl;
}
Kt qu sau khi thc hin chng trnh trn: Gia tri n = 5. y n vn gi nguyn gi tr ban
u mc d trong test c cu lnh nhm lm thay i n.

Truyn tham tr l c cu mc nh trong truyn tham s.
Truyn tham kho (tham chiu)

V bn cht, truyn tham chiu l ta gi a ch ca tham s ti hm c gi. Hm c gi s
tc ng ln vng nh c a ch m n nhn c(chnh l tham s gc). Bi vy mi thay i m
n gy ra u lm nh hng n tham s gc.
V d:
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void test(int &x)

{
x=x+10;
}
void main()
{
int n=5;
test(n);
cout<<"Gia tri n ="<<n<<endl;
}
Kt qu sau khi thc hin chng trnh trn: Gia tri n = 15. y n b thay i.Vic gi a
ch (tham chiu) ca tham s n hm c gi, ngi ta gi l truyn tham chiu. Vi hm c
c ch truyn tham chiu th n khng c vng nh ring cho tham s , khi thc hin li gi
hm, n s gn cho tham s mt b danh (alias) - chnh l tn ca tham s hnh thc v t do tc
ng ln vng nh ca tham s c gi ti.

Truyn con tr
a ch vng nh ca mt bin no l mt s, do ta c th khai bo mt bin khc lu
tr gi tr a ch ny. Con tr l bin nh th.
Cch truyn con tr cng tng t nh cch truyn mt tham chiu, tuy nhin cn phn bit con
tr v tham chiu nhng im c bn sau:
-
C con tr null ch khng c tham chiu null

Con tr c th tr n nhiu i tng, trong khi tham chiu ch c th ch n tham chiu
c to cho n.
Tham kho:http://www.cplusplus.com/doc/tutorial/pointers/
2.2 NHNG VN LIN QUAN KHI S DNG C CHO LP TRNH PIC

2.2.1 C Complier v MPLAB
2.2.2 M phng chng trnh bng Protus
(GV s hng dn trc tip cch s dng cc phn mm trn lp)
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2.2.3 Cu trc v thc thi chng trnh

//Phn cc ch th tin x l
#include < 16F877 .h >
#include < delay.h >
....
//Phn khai bo bin, hng, mng ton cc
Int a, b;
....
// Phn khai bo hm Prototype
Void ADC_Processing() ;
Void timer_INT();
//Chng trnh chnh

Main()
{. . . }
//Chng trnh con
Void ADC_Processing()
{...}
//Chng trnh x l ngt
#Interrupts
Void timer_INT()
{. . . }
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Bi 3 : B NH, B DAO NG V THANH GHI H THNG

Bi 3 s gii thiu nhng vn ct li trong phn cng ca h thng lin quan trc tip ti lp
trnh, l: t chc b nh, t chc thanh ghi h thng, cu trc v cch ci t cho b dao ng.
3.1 B NH
Ti liu tham kho: Datasheet 18F4620 18F2550
3.1.1.1 T chc phn cng tng qut ca mt b VK PIC:
Sau y, ta phn tch cu trc c bn ca mt b VK PIC. (ta xt b VK 18F4620)
Hnh 3.1 - S khi tng th ca PIC18F4620

Phn b nh (khi A): bao gm b nh chng trnh v b nh d liu.
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Phn to xung (khi B): bao gm b to xung v cc chc nng i km vi n.

Phn tnh ton (cn gi l b ALU khi C): m nhn vic tnh ton ca VK.
Phn I/O (khi D): bao gm cc port input v output.
Phn ngoi vi (khi E): qun l cc chc nng tng tc ngoi vi trong VK.
(con s c ghi trn mi mi tn chnh l s bits d liu trong vic giao tip gia cc khi)
Trong bi ny chng s xem xt hai khi chnh l khi b nh v khi to xung.
3.1.1.2 C bn v t chc b nh ca VK PIC
Ti liu tham kho: chng 5,6,7-datasheet
T chc b nh ca VK PIC c phn thnh ba phn chnh:
Program Memory (hay cn gi l
Flash Memory b nh Flash, b nh lu
tr)
Data Memory (hay cn c tn gi l
Data RAM Memory)
Data EEPROM Memory
Ngoi ra cn c cc thnh phn ph khc
b tr cho qu trnh hot ng ca mt b
VK.
a)
T chc b nh chng trnh
(Program Memory)-18F4620:
Nh chng ta c th thy b nh chng
trnh c chia lm 3 phn chnh:
Program Counter:
Phn ny l mt thanh ghi 21 bits (tn gi
l thanh ghi PC) cha gi tr a ch ca cu lnh hin thi trong Program Memory.
Stack Memory:
y l b nh vi 31 (mi c 21 bits) nhm ghi li a ch vo ra ca cc chng trnh con.
Ta ly v d nh th ny khi ta chy chng trnh chnh ti a ch l 0x0082 v ta gi mt
chng trnh con (chng trnh con ny c bt u ti a ch 0x0346) nh th a ch 0x0082 s
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c lu vo b nh stack, v h thng s nhy n v tr bt u ca chng trnh con, sau khi

thc hin xong chng trnh con ri th h thng s m b nh stack ra v tm li gi tr 0x0082
tr v cho ng v tr trong chng trnh chnh.
Stack Memory c thc hin da trn c ch VO SAU RA TRC
Hnh 3.2 - Stack memory

Memory Space:
y l phn cha ton b ni dung ca chng trnh iu khin (c m ha ra dng m hex).
b) T chc b nh d liu
Data Memory cng c ba loi b nh chnh:
Access Ram: phn b nh ny cn c gi l phn b nh truy xut nhanh, tc nhng d
liu no chng ta thng hay truy xut nn a vo phn RAM ny.
GPR (General Purpose Register): thanh ghi dng chung
SFR (Special Function Register): thanh ghi c bit-vng nh ny dng lu tr nhng
thanh ghi c bit (dng iu khin cc chc nng ca VK) tham kho bng 5.1
Mt a ch Data bao gm hai thnh phn:
Opcode: hay cn gi l s th t ngn (mi ngn 8 bits, 16 bits ty theo dng VK)
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Hnh 3.3 - Data memory

BSR: hay cn gi l s th t t. Mi t cha 256 ngn.
c) Data EEPROM Memory:
Thc cht Data EEPROM Memory khng c h tr v mt phn cng nh hai loi b nh
va k trn. EEPROM Memory c dng cng b nh vt l vi Program Memory (GV s ni r
hn v EEPROM v Flash). Hay ni cch khc hn phn b nh vt l dnh cho Program Memory
c hai chc nng Flash hay EEPROM .
3.2 B DAO NG
Ti liu tham kho: chng 2-datasheet
Vai tr ca b dao ng:
B dao ng (hay cn c tn gi khc l b to xung) l phn to xung nhp hot ng chnh
cho VK.
Ti sao ta li phi cn ti b dao ng ?
B to dao ng nhm to ra cc h xung c chu k c nh nhm ng b ha d liu ca
VK, hay ni cch khc hn, thi gian chu k ca h xung dao ng chnh l n v c bn o
m thi gian hot ng ca cc module trong VK.
Phn loi cc b dao ng thng dng trong VK:
B to xung bng thch anh:
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y l b to xung n gin, d hiu
v d s dng nht.
Tn hiu dao ng vo VK theo ng
OSC1 v ra theo ng OCS2. T C1 v C1
ng vai tr nh b n nh xung nhp.
Gi tr C1 v C2 thay i theo tn s
thch anh (c th tra bng 2.2 datasheet).
B to xung bng RC:

B to xung ny da vo c tnh dao
ng c bn ca b RC. B dao ng loi
ny tng i kh s dng, thch hp vi
nhng ng dng cho php thay i tn s
hot ng ca h thng.
B dao ng ni:
Trong mi VK u tn ti mt b dao
ng ni, tc l chng ta c th s khng
cn dng b dao ng bn ngoi m VK vn hot ng bnh thng.

Khuyt im ca b dao ng ni l tn s hot ng thp hn so vi b dao ng gn ngoi,
nhng b li chnh xc l tin cy cao hn, tiu tn t nng lng hn. y l b dao ng ti u
nng lng cho vi iu khin PIC.
Phn tch s khi ca mt b dao ng (18F4620):
GV ng lp s ging dy trc tip phn ny. (hnh 3.4)
Cc thanh ghi tng tc:
OSCTUNE: thanh ghi chu trch nhim iu chnh vic hot ng ca b dao ng.
OSCCON: thanh ghi chu trch nhim iu chnh gi tr hot ng ca b dao ng.
(GV trc tip ni thm v phn ny)
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Hnh 3.4 - B dao ng PIC18F4620

3.3 TIN X L V THANH GHI H THNG
3.3.1 Nhng tin x l c bn:
#include:
tin x l ny dng thm mt file mi vo chng trnh.
C php: #include <filename>
#include filename
#define:
tin x l ny dng khai bo cc c php (macro)
C php: #define name replacement_text
#pragma: lnh tin x l ny dng cho C18 Compiler (C chun khng h tr)
#pragma bao gm nhiu chng nng ring bit, nhng chng ta ch trnh by mt s chc nng
chnh:
Khai bo vng lp trnh trong program memory, vng d liu trong data memory.
Khai bo vector ngt.
Khai bo thanh ghi h thng.
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Khai bo vng lp trnh cho program memory, vng d liu trong data memory v khai bo cho
vector ngt s c ni r hn trong nhng phn lin quan tip theo. ni dung bi ny ch gii
thiu dng #pragma cho khai bo thanh ghi h thng
3.3.2 Khai bo thanh ghi h thng
C php:
#pragma config <thanh_ghi_h_thng> = <gi_tr>
Cc thanh ghi h thng: (tham kho DATASHEET-chng 23, 25, hoc c th dng
Help/Topic/PIC C18 Config Settings)
y ch trnh by nhng thanh ghi h thng gi chc nng ci t cho b dao ng.
i vi PIC18F4620:
#pragma config OSC = XT // khai bo xung s dng thch anh
i vi PIC18F4550:
#pragma config PLLDIV = 5 // Khai s dng thch anh 20MHz
#pragma config CPUDIV = OSC1_PLL2 #pragma config USBDIV = 1
#pragma config FOSC = XTPLL_XT
// GV s ging thm phn ny lp
Lu :
Bt buc phi khai bo y cc thanh ghi h thng.
Chc nng no ca thanh ghi h thng khng s dng u khai bo l OFF, cc chc nng
cn li c chn con s thp nht.
3.4 BI TP
Vit on chng trnh config cho PIC18f4550 vi cc yu cu sau:
Thch anh s dng 20MHz
S dng ch PLL cp xung 48MHz cho CPU
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Bi 4 : IO PORT OUTPUT
Bi 4 gii thiu v module u tin trong vi iu khin IO PORT. y l phn quan trng bc
nht trong vi iu khin v tt c cc ng dng u cn dng n. Hc vin cn nm r phn cng
v cch tng tc phn cng, t p dng vo cc ng dng c th c hng dn trong bi.
4.1 GII THIU PHN CNG

Ti liu tham kho: Chng I/O Port datasheet 18f4550 /18F4620
4.1.1 M t phn cng

Hnh bn l t chc phn cng c bn ca
mt IO Port, vi cu to chnh l cc D
Flip Flop c chc nng nh mt b cht
d liu (data lacth). (GV s trnh by v
hot ng c bn).
C ba thanh ghi c bn dnh cho vic
tng tc vi cc chc nng IO Port:
Thanh ghi TRIS: thanh ghi quyt nh
hng truyn ca IO port (input hay
output).
Thanh ghi PORT: thanh ghi ny
nhn d liu vo t IO Port.
Thanh ghi LAT: thanh ghi ny dng
xut d liu ra IO Port.
4.1.2 S dng cc PORT trong PIC
4.1.2.1 PORT A
PORTA c s chung chn vi mt s chc nng khc nh ADC v Oscillator. Khi s dng
PORTA ti chn Analog cn thit phi t gi tr cho thanh ghi ADCON1 l bit tng ng ang
ch analog hay digital, vi chn RA7 v RA6 do c ni vi chn Oscillator nn chn ny ch
c s dng khi khng khng t ch oscillator.
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Bng 4.1
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Cc thanh ghi PORTA
4.1.2.2 PORT B
PORTB vi 8 chn giao tip bn ngoi, ngoi chc nng I/O n cn l ni c cc chn ngt
ngoi v ngt thay i trng thi. Ch khi t ch ngt th cc chn I/O phi ch Input.
Mt s chn Port B l c i cng chc nng Analog nn khi s dng phi khai bo chn ny l
analog hay digital trong thanh ghi ADCON1. PORTB c th c ko ln ngun yu bng cch
ci t bit RBPU trong thanh ghi INTCON2. Cc thanh ghi lin quan vi PORTB khi s dng
c cho ti bng 10-4.
4.1.2.3 PORT C
Vi 8 chn giao tip bn ngoi, PORT C l ng ra Digital thun ty.
Cc thanh ghi tc ng ln PORTC c cho trong bng 10-6:
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4.1.2.4 PORT D v PORT E
4.1.2.5 Parallel slaver port

Port D v E c thm chc nng lm cng giao tip song song t. Hot ng ch ny xem
chi tit trong Datasheet.
4.2 BI TP - CC NG DNG CA IO PORT-PHN OUTPUT

Ti liu tham kho: datasheet 7447, datasheet 74595
4.2.1.1 ng dng chp tt LED:
Yu cu: GV hng dn chp tt LED theo ch k nht nh.
S mch: nh km ti liu (file)
4.2.1.2 ng dng xut LED 7 on:
Gii thiu chung:
LED 7 on thc cht l bao gm nhiu LED n c sp xp theo hnh dng cc con s, vi
cc k hiu nh sau:
Cu to ca LED 7 on bao gm 8 LED n c k hiu t a n f v mt chn chung. C
hai dng chn chung cho Led 7 on.
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Chn chung Anode(+)
Chn chung Cathode(-)
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T cu to phn cng ca LED 7 on nn chng ta s c 2 bng gii m khc nhau cho cc tn

hiu u vo:
Bng 4.2
Bng m dnh cho LED 7 on Anode chung
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Bng 4.3
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Bng m dnh cho LED 7 on Cathode chung:
Cc phng php hin th LED 7 on:

C nhiu phng php hin th LED 7 on c dng hin nay nh: ni trc tip, dng
IC7447, dng IC74595. Mi phng php c nhng u im, nhc im ring v ty thuc
vo cc u, nhc im ny m s dng cc phng php . Chng trnh ch gii thiu phng
php c bn nht trong hin th LED 7 on l ni mch trc tip v dng phng php qut.
S mch: (GV s hng dn trc tip trn lp)
Phng php qut:
Phng php qut l phng php tn dng s lu nh trong mt ngi, bng cch s dng cc
hm delays trong hin th. Trong mt ln qut, chng trnh ch hin th mt LED 7 on, nhng
do s dng tn s qut cao (>24Hz) kch/tt chn ngun ca LED 7 on nn mt ngi b lm
tng l cc LED7 on c hin th cng lc.
4.3 BI TP V NH:
Hin th ma trn LED 4x4.
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4.4 PH LC CHUN LOGIC NG RA CA IO PORT

ch output mc in p s c a ra ng ra I/O pin, ng ra s c a ra bng mt
trong hai mc logic 1 hoc logic 0. Gi tr in p ca ng ra c cho trong bng sau:
Dng in ti a cho php ca mt ng ra l 25mA.
Tng dng in ti a cho Port l 200mA.
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Bi 5 : NGT (INTERRUPTS)
5.1 NH NGHA NGT
Ngt (interrupt) l qu trnh tm thi dng chng trnh chnh, thc thi mt chng trnh
khc, chng trnh ny cn c gi l chng trnh thc thi ngt. Hot ng ngt gip h thng
ca chng ta c t tt hn cc c tnh thi gian thc.
5.2 PHN LOI NGT

Ngt thng c chia thnh hai loi chnh sau y:
Ngt cng: L loi ngt c chnh h thng chng ta gi bng m lnh m khng ph
thuc vo cc nhn t bn ngoi.
Ngt mm: L loi ngt c sinh ra do cc nhn t bn ngoi tc ng vo (hu ht tt c
cc loi ngt chng ta hc trong kha hc u l ngt mm).
Cc loi ngt trong h thng:
Hnh 5.1 - S logic ca ngt trong PIC 18F4550
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5.3 HOT NG CA NGT

Ti liu tham kho: chng Interrupt datasheet 18F4620
Qu trnh hot ng ca ngt c tm tt thng qua s sau:
Hnh 5.2 - Quy trnh hot ng ca ngt trong VK

Bng vector ngt:
Bng vector ngt l tp hp cc vector ni bt u cho qu trnh ngt. Thng th trong cc

dng VK PIC th s lng vector ngt l khc nhau. Gi s nh dng 16F chng ta c 1
vector ngt, cn dng 18F chng ta c 2 vector ngt.
V tr ca vector ngt trong h thng:
Vector ngt ca dng 18F c cha trong Program Memory (b nh chng trnh), vi
hai vector ngt:
Vector ngt mc cao (High Priority Interrupt Vector) nm ti a ch 0x08.

Vector ngt mc thp (Low Priority Interrupt Vector) nm ti a ch 0x18.
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Hnh 5.3 - V tr cc vecto ngt trong ROM

Lu :
Nhng iu cn quan tm khi s dng mt loi ngt trong VK:
Khai bo bt tt (enable).
Khai bo u tin (priority)
C ngt (flag).
Cc thanh ghi tng tc cho vector ngt (dng 18F4620):

C 10 thanh ghi c s dng iu khin hot ng ngt chia lm 4 loi sau:
RCON
INTCON, INTCON2, INTCON3
PIR1, PIR2
PIE1, PIE2
IPR1, IPR2
+ Thanh ghi RCON: Cha cc c ngt Reset, c ngt nh thc t ch Idle cho CPU. Thanh
ghi ny cn cha bit PIEN (enable interrupt priority)
+ Thanh ghi INTCON: lot thanh ghi INTCON (3 thanh ghi) cha mt lot khai bo bt tt,
mc u tin, c ngt cho cc loi ngt Timer0, RB, ngt ngoi (INT0, INT1, INT2).
+ Thanh ghi PIR: loi thanh ghi PIR (2 thanh ghi) cha cc c ngt ca nhng loi ngt ngoi
vi (ADC, TIMER1, TIMER2, SSP, PSP, RS232 )
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+ Thanh ghi PIE: lot thanh ghi PIE (2 thanh ghi) cha cc khai bo bt/tt ngt cho ngoi vi.
+ Thanh ghi IPR: lot thanh ghi IPR (2 thanh ghi) cha cc khai bo mc u tin ngt cho
ngoi vi.
3 bits cn phi quan tm trong qu trnh tng tc vi ngt: IPEN, GIE v PEIE:
IPEN (Interupt Priority Enable) RCON<7>: bit ny cho php chng ta c s dng n
tnh nng mc u tin ngt hay khng.
GIE (Global Interrupt Enable) - INTCON<7>: bit ny cho php ton b cc ngt c s
dng hay khng,
PEIE (Peripheral Interrupt Enable) INTCON<6>: bit ny cho php cc ngt phn ngoi
vi c c s dng hay khng.
(GV hng dn thm phn s dng kt hp gia 3 bits ny vi nhau)
5.4 TNG TC VI NGT

Trong khun kh bi hc chng ta s c dp tng tc vi 2 loi ngt:
Ngt ngoi: Loi ngt ny c kch thch khi c s thay i trng thi ca cc chn INTx.
Ngt RB (ngt PortB): Loi ngt ny c kch hot khi c s thay i trng thi bt k ca
mt trong cc chn R4 R7.
C 2 loi ngt ny c xp vo loi ngt External, thi gian t khi xut hin ngt n khi
chng trnh ngt hot ng c th t 3 ti 4 chu k lnh.
5.4.1 Quy trnh khai bo ngt:
tng tc vi ngt ta phi quan tm ti 3 vn sau :

Trong chng trnh chnh
-
Khai bo s dng ngt (loi ngt c chn)
Khai bo kch hot ngt ton cc
Khai bo vector ngt

-
Khai bo s dng vecto ngt
Khai bo s dng chng trnh ngt tng ng
Trong chng trnh ngt

-
X l ngt
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Reset c ngt
Chng ta xt ti v d di y:
#include <p18cxxx.h>
// phn khai bo vec t ngt
void ISR_function(void); // khai bo prototype cho chng trnh ngt
#pragma code interrupt_vector = 0x08 // bt u khai bo vector ngt
void int_function (void)
{
_asm GOTO
ISR_function _endasm
}
// kt thc khai bo vector ngt
#pragma code
void main(void)
// chng trnh chnh
{
// bt u phn khai bo ngt
INTCONbits.GIE = 1;
INTCONbits.INT0IE = 1;
// bt bits ngt ton cc

// khi ng ngt ngoi 0
// kt thc phn khai bo ngt

// phn chng trnh
}
#pragma interrupt ISR_function
void ISR_function (void)
{
//chng trnh ngt
// nh xa c ngt trc khi kt thc chng trnh ngt
}
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5.5 BI TP
S dng PIC 18F4620 c s ln nhn phm hin th ra LED 7 on(s dng ngt ngoi)
Ti liu tham kho
Trch t datasheet PIC18F4550
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Bi 6 : IO PORT - INPUT
6.1 M T PHN CNG
Kin trc phn cng xem bi 4.
6.2 BI TP NG DNG IO PORT - INPUT

6.2.1 Bi tp 1 - Lp trnh qut phm n
6.2.1.1 M t phn cng
Hnh 6.1 - S mch lp trnh qut phm n

S nguyn l ca phm n nh hnh, khi khng nhn phm th in p ng ra a vo c
in tr ko ln ngun nn mc s l mc 1, khi nhn nt th ng ra ca nt nhn c ko thng
xung t nn in p ng ra l mc 0.
6.2.1.2 Yu cu
Cc phm c kt ni ln lc vo cc chn RB0 RB3. 4 LED hin th tng ng c ni
vo cc chn RD0 RD3. Lp trnh mi ln nhn 1 phm, mt led tng ng s sng.
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6.2.1.3 Gii thut (GV s ging trn lp)

6.2.2 Bi tp 2 - Lp trnh qut phm ma trn
6.2.2.1 M t phn cng
S kt ni vt l ca cc phm ma trn c cho hnh di.
Hnh 6.2 - S kt ni bn phm ma trn 4x4

6.2.2.2 Yu cu
Cc ROW ln lt c ni vo RB0 RB3, cc COL ln lt c ni vo RA0 RA3, 4
LED hin th ln lt c ni vo RD0 RD3.
Lp trnh sao cho khi mi phm c nhn 4 LED s hin th gi tr nh phn ch a ch (1 16)
ca phm trn bn phm
6.2.2.3 Gii thut (GV s ging trn lp)
6.3 PH LC
Cc mc in p s dng ch input
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ch ny s c mc in p chn I/O pin, v truyn d liu c c trong thng qua

Data bus. Mc in p y ch c mt hoc hai gi tr l l 1 hoc 0, mc in p nhn ra cc
mc nh sau:
Mc logic 0: in p t Vss n 0,15Vdd khi in p cung cp cho chip l <4,5V, v Vss

n 0,8 V nu in p t 4,5 n 5,5V.
Mc logic 1: 0,25VDD + 0,8 n VDD khi in p cp b hn 4,5V, v t 2.0 n VDD

nu in p cung cp cho chip t 4,5 n 5,5V.
i vi nhng I/O c ng vo l Trigger Schmitt th in p vo tng ng l:

Logic 0: l Vss n 0,2VDD, logic 1: 0,8VDD n VDD.
Ch : khi in p cung cp l mc nm gia mc logic 0 v 1 trn th hon ton khng

c c, gy ra sai. Do khi thit k phi ch mc logic phi nm trong hai khong
in p ny.
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Bi 7 : TIMER
7.1 NHNG KHI NIM
7.1.1 Timer l g?
Timer trong PIC l mt chui flip-flop chia cho 2 nhn ngun vo l xung clock t b to dao
ng. u ra ca flip-flop th nht l u vo ca flip-flop th hai v c nh th tip tc cho cc
cp tip theo (s tng t nh mch m ln). Mi flip flop nh vy tng ng vi mt ng ra
ca timer (1 bit timer). Timer 16 bit l mt chui 16 flip flop, 8 bit l mt chui 8 flip flop Ng
ra ca flip flop cui cng c gi l c (timer flag). Khi timer trn th bit ny s c kch hot.
S kch hot ny c a vo b interrupt to ra mt ngt timer (s c bn trong phn ngt),
ng thi tn hiu ny cng c a ra mt b reset reset ton b ng ra ca flip-flop li t
u. Mch ci t timer s ci t cc gi tr cho cc flip-flop ny ng theo m nh phn ca gi
tr ci t. V vy timer bao gi cng l m ln nu ng ra l tch cc mc cao (Q), v ngc li
s l m xung nu ng ra l tch cc mc thp (Q b).
Hnh 7.1 - Timer 3 bit.

Timer c dng rt nhiu trong cc ng dng iu khin. PIC cng khng phi l ngoi l.
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7.1.2 Watch dog Timer

Watch dog timer l b nh thi chuyn dng ci t thi gian time out cho h thng. Khi
mt lnh ca h thng thc thi WDT s c reset, nu h thng treo trong thi gian vt qu thi
gian ci t, WDT t ng reset li h thng.
7.1.3 Prescaler
Prescaler l tham s cho b chia ca timer. Tham s ny c ci t bi ngi dng theo cc
option nh trc. Tng ng vi tham s prescaler c chn, mi ln tng ca timer s c
quy nh nh sau:
Xung vo timer = Xung ngun / Prescaler
7.2 HOT NG CA TIMER

Timer0 c th hot ng ch 8 bit hoc 16 bit, v/hoc timer hoc counter.
7.2.1 TIMER0 ch 8 bit
Nguyn l hot ng: timer0 ch 8 bt tc l c gi tr b m l 8 bit. Khi c mt xung

timer clock th b m TMR0L tng ln mt gi tr, v d hin ti TMR0L = 122 sau khi c thm 1
timer clock th gi tr ca n l 123. n kh gi tr ca TMR0L = 255, sau khi nhn thm mt
clock na n s tr v 0 ng thi c TMR0IF c set, c ny c xa bi ngi dng hay
chng trnh. Gi tr ca thanh ghi TMR0L c th c c v ghi.
Timer clock c th c chn cc ch sau:
Khi timer clock c chn t ngun xung nhp dao ng chnh ca Fosc/4 vi Fosc l tn
s dao ng ca ngun.
Hoc c th c chn t ngun xung nhp bn ngoi ch counter.
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Ngun clock c th l clock ca dao ng ni hoc ca ngun ngoi c th c chn thng

qua bit T0CS. Ngun clock sau khi chn c th c a trc tip ti b ng b hoc c a
vo b chia thng qua bit iu khin PSA, nu c a qua b chia th clock s c chia cho 2,
4, 8, 16,32, 64, 128 v 256 thng qua 3 bit iu khin T0PS. Sau khi qua b ng b th clock
c a vo b m m thanh ghi TMR0L.
7.2.2 TIMER0 ch 16 bit
V cu to hon ton ging ch 8 bit tuy nhin c mt im khc l thanh ghi b m lc

ny l 16 bit, tc l b n s m n 65535 ri khi chuyn v 0 s to set c TMR0IF.
7.2.3 Thanh ghi iu khin TIMER0
T0CON
Bit 7 TMR0ON: l bt cho php hot ng hoc khng hot ng timer0.
TMR0ON = 1 cho php timer 0 hot ng
TRM0ON = 0 khng cho php timer 0 hot ng
Bit 6 T08BIT: l bit ci t timer 0 hot ng ch 8 bit hay 16 bit
T08BIT = 1 Timer0 hot ng ch 8 bit
T08BIT = 0 Timer0 hot ng ch 16 bit
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Bit 5 T0CS: bit chn ngun clock cho timer 0
T0CS = 1 Clock s dng l ngun clock ngoi (ch counter)
T0CS = 0 clock s dng l chu k lnh Fosc/4
Bit 4 T0SE: chn cnh clock khi s dng clock ngoi
T0SE = 1 clock cnh xung chn T0CKI
T0SE = 0 clock cnh ln chn T0CKI
Bit 3 PSA: chn ch t l cho ngun clock
PSA = 1 khng s dng ch t l. (ngun clock s dng s tr thnh clock ca timer0)
PSA = 0 s dng ch t l cho ngun clock trc khi vo clock cho timer0, gi tr t
l c quy nh trong bit T0PS
Bit <2 0> T0PS: t gi tr t l cho b t l.
111: 1:256
110: 1:128
101: 1:64
100: 1:32
011: 1:16
010: 1:8
001: 1:4
000: 1:2
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7.2.4 Cc thanh ghi khc
Thanh ghi TMR0L cha gi tr ca timer0 khi ch 8bit hoc cha gi tr byte thp ca
timer0 khi ch 16 bit.
Thanh ghi TMR0H cha gi tr byte cao ca timer0 khi ch 16 bit. Ch l khi s
dng ch 8 bit th thanh ny khng c ngha.
Thanh ghi INTCON: l thanh ghi iu khin ngt
+ GIE/GIEH: bit iu khin cho php ngt ton b.
+ PEIE/GIEL: cho php ngt ngoi vi
+ TMR0IE: cho php ngt timer0-
+ TMR0IF: c bo ngt timer0
Thanh ghi TRISA: set TRISA4 = 1 khi s dng ch counter (clock ngoi).
7.3 TNG TC VI TIMER

7.3.1 Quy trnh khai bo timer nh sau:
Ci t
Ci t ch hot ng cho timer (8 bit/16 bit)
Ci t ngun xung cho timer (timer/counter)
Ci t Prescaler cho timer
Tnh ton v ci t thi gian (nu ch timer) cho timer
Hot ng
Kch hot timer
Ch timer trn
Khi timer trn x l reset c
Np li timer
7.3.2 Cch tnh thng s ci t cho timer
= 2 (
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7.4 BI TP
7.4.1 Yu cu: Dng timer0 vit hm delay cho h thng.
to hm Delay ta c th s dng mt lnh lp no chng hn vng lp for xc nh

thi gian delay cn thit, tuy nhin khi thc hin bng phng php ny kh xc nh c chnh
xc thi gian. xc nh chnh xc thi gian cn thit phi s dng mt b nh thi lm vic
ny.
7.4.2 Gii thut (GV s ging trn lp)
7.4.3 Thc hnh: KIT th nghim s dng thch anh c tn s dao ng 25MHz.
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Bi 8 : BI TP GIA KHA
8.1 YU CU
Hnh 8.1 - S phn cng mch th nghim

8.1.2 Bi tp 1: ng h s:
Vi phn cng trn chng ta c th thit k mt ng h s dng timer. Thit b hin th l 6 led
7 on (2 led cho giy, 2 led cho pht, 2 led cho gi). Khi cn thay i hay ci t li gi tr gi ta
dng cc phm n lm phm iu khin. C ch nhn tc ng ca cc phm n l c ch ngt.
Gi tr gi, pht, giy c nhp vo trong ch ci t bng bn phm ma trn. Led n dng
lm led bo tn hiu ci t tng ng.
8.1.3 Bi tp 2: My tnh b ti:
Vi phn cng trn ta cng c th thit k mt my tnh b ti n gin vi cc php tnh cng,
tr, nhn, chia. 4 phm quy nh php tnh l 4 phm n nhn vo bng c ch ngt. Cc gi tr
hng t c nhp bng bn phm ma trn. Li c hin th bng cc led n (2 led cho 4 m
li), 2 led n cn li hin th cho 4 php tnh. Cc gi tr trong qu trnh nhp cng nh kt qu
c hin th qua 6 led 7 on.

Mi nhm hc vin chn 1 trong 2 bi lm ti lp, bi cn li dnh cho v nh
8.2 M T PHN CNG

Vi iu khin: PIC18F4620, s dng thch anh 24MHz.
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Kt ni PORT s c hng dn ti lp
8.3 GII THUT

(GV hng dn trc tip trn lp)
8.4 CHNG TRNH

Chng trnh c gii ti lp
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Bi 9 : NGN NG LP TRNH C NNG CAO

9.1 TI LIU THAM KHO
C Program Language.
n tp kin thc c:
Cc kiu d liu c bn.
Cc cu trc lnh
Cc dng hm v cch truy xut hm.
Cc ton t v cch truy xut.
Bng 9.1
Cc kiu d liu nng cao trong C
char
az; AZ; 09
Kiu k t
1B d liu
float
-1.175e-38 3.402e38
Kiu s thc
4Bs d liu
signed long
-2147483648 2147483647
Kiu s nguyn c du m 4Bs d liu

rng
unsigned long
0 4294967295
Kiu s nguyn khng du 4Bs d liu

m rng
9.2 CC HM THNG DNG TRONG TH VIN C CHUN:

9.2.1 Cc hm chuyn i kiu d liu:
Yu cu bt buc:
#include <stdlib.h>
atoi(data):
Chc nng: chuyn i d liu (data) sang kiu s nguyn int.
Tham s truyn vo: a vo phi bt u bng k t, nu khng chng trnh s b li v

khng thc hin c
D liu tr v: d liu tr v kiu int.
atol(data):
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Chc nng: chuyn i d liu (data) sang kiu long

khng thc hin c
D liu tr v: tr v d liu kiu long
atof(data):
Chc nng: chuyn i kiu d liu (data) t dng chui sang dng s thc float.

khng thc hin c.
9.2.2
D liu tr v: d liu tr v thuc kiu float

Cc hm x l chui:
Yu cu bt buc:
#include <string.h>
strlen(str):
Chc nng: o di chui str
Tham s truyn vo: str thuc kiu chui
D liu tr v: gi tr tr v chnh l s k t trong chui str, kiu unsigned int
strcat(str1,str2):
Chc nng: ni 2 chui str1 v str2
Tham s truyn vo: str1 v str2 thuc kiu chui
D liu tr v: d liu tr v thuc kiu chui
strcpy(str1, str2):
Chc nng: sao chp t chui str1 sang chui str2
Tham s truyn vo: str1 v str2 thuc kiu chui
D liu tr v: khng c kiu d liu tr v
9.2.3 Cc hm ton hc:

Yu cu bt buc:
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#include <math.h>
abs(data):
Chc nng: ly gi tr tuyt i mt s
Tham s truyn vo: data truyn vo thuc kiu s (char, int, long, float)
D liu tr v: d liu tr v l dng unsigned ca d liu truyn vo
acos(data), asin(data), atan(data):
Chc nng: dng ly cc gi tr arcsin, arccos, arctan ca d liu
Tham s truyn vo: d liu a vo bt buc phi l kiu s (char, int, long, float)
D liu tr v: kiu d liu tr v thuc kiu float
cos(data), sin(data), tan(data):
Chc nng: dng ly cc gi tr sin, cos, tan ca d liu
Tham s truyn vo: d liu a vo bt buc phi l kiu s (char, int, long, float)
D liu tr v: kiu d liu tr v thuc kiu float
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Bi 10 : IO PORT NNG CAO LCD

10.1 TNG QUAN V LCD
10.1.1 LCD l g
10.1.2 Cc loi LCD trn th trng

10.1.2.1 Character LCD:
Character LCD l loi LCD ch th hin c cc k t (A Z, a z, 0 9).
Thng thng trn th trng ch c mt s kch c LCD nh 16 x 2 (16 ct 2 dng), 20 x 4 (20
ct 4 dng).
Hnh 10.1 - Graphic LCD:

10.1.2.2 Graphic LCD
Graphic LCD c hin th bng cc im nh (dot). Chng ta tm chia loi ny thnh 2 loi
chnh: Black/White LCD, Colour LCD.
V mt kch thc loi LCD ny kh a dng, mt s kch thc thng dng trn th trng
nh: 128 x 64, 240 x 128
Ngoi ra LCD cn c th tch hp tnh nng nhn d liu dng TouchScreen (TouchScreen
LCD). Chng trnh ny ch xt ti LCD dng Character LCD c iu khin bi chip HD
44780.
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10.2 CU TRC PHN CNG (LCD- HD 44780)
Hnh 10.2 - Cu trc phn cng LCD HD44780

10.3 TP LNH
// Hng dn trong ti liu tham kho
10.4 TNG TC VK - LCD

10.4.1 S dng tp lnh LCD
// Hng dn trong ti liu tham kho
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10.4.2 S dng th vin ca PIC18:

Chng ta s s dng th vin xlcd.h, c h tr sn trong b cng c PIC18 Compiler.
khai bo s dng th vin ny chng ta phi chn thm cu lnh.
#include <xlcd.h>
Cc hm tng tc c bn:
BusyXLCD():
C bo xem LCD c bn hay khng ?
Thng c dng trc cc lnh ghi d liu, khai bo a ch con tr
OpenXCLD(thuc_tnh_LCD)
Lnh khi to XLCD, c dng khi bt u s dng LCD, vi thng s thuc_tnh_LCD bao
gm:
Loi tng tc:
FOUR_BIT
: tng tc d liu 4 bits.
EIGHT_BIT : tng tc d liu 8 bits.

Kiu k t v cch hin th:
LINE_5X7
LINE_5X10
: hin th trn mt dng, kiu ch 5x7
: hin th trn mt dng , kiu ch 5X10
LINES_5X7 : hin th trn nhiu dng, kiu ch 5X7
putcXLCD(k_t) - WriteDataXLCD(k_t): Xut mt k t ln LCD.

putsXLCD() putrsXLCD(): Xut mt chui k t ln XLCD.
SetDDRamAddr(v_tr):
Di chuyn con tr ca LCD n v tr cn xut d liu (v tr cn phi tun theo quy tc ca
LCD). Lu , trc khi s dng lnh ny cn kim tra xem LCD c bn hay khng.
Ngoi nhng hm c quy nh sn trong b th vin, ta cn c mt s hm cn phi c
khai bo trong chng trnh (do nhng hm ny tuy thuc vo xung clock h thng). l cc
hm sau y:
void DelayFor18TCY(void)
{
Nop(); // lnh ny c lp li 18 ln
}
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void DelayPORXLCD(void)
{
// Delay 15 ms
// phn hm ny s c hng dn k hn lp
}
void DelayXLCD(void)
{
// Delay 5 ms
// phn ny cng s c hng dn k hn lp
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Bi 11 : TIMER 1, 2, 3
11.1 TI LIU THAM KHO
O
Datasheet
heet PIC18F4620 ch
chng 12, 13, 14
MPLAB C18 Libraries
11.2 CU TRC PHN CNG

NG TIMER 1, 2, 3 (Tham kho bi s 7)
Hnh 11.1 - Cu trc phn cng Timer1
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11.3 S DNG TH VIN
N C18 CHO VIC
VI
CI T TIMER
Thng thng, s dng
ng Timer1/2/3 chng ta c th
th dng cch tng
ng tc thanh ghi trc
tr tip
nh hc phn trc lm, nhng
ng cch
vi Timer1/2/3 s tng i mtt thi
th gian. V th cho
nn, trong hc phn
n ny chng ta ss s dng th vin MPLAB C18:
s dng th vin ny, chng ta cn
c khai bo tin x l:
#include <timers.h>
Cc hm c bn trong th
vin:
vi
(k hiu X l con s tng ng
ng cho 1/2/3)
OpenTimer1(config): Khai bo s
s dng Timer1
Timer1 Interrupt:
TIMER_INT_ON
TIMER_INT_OFF :
s dng ngt Timer1

khng s dng ngt Timer1
Khai bo s bits s dng:

ng:
T1_8BIT_RW
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s dng Timer 8 bits
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T1_16BIT_RW
T1_SOURCE_EXT :
s dng ngun xung ngoi (t chn T1CKI)
T1_SOURCE_INT :
s dng ngun xung t thch anh
Prescalers:
T1_PS_1_1
t l 1:1
T1_PS_1_2
t l 1:2
T1_PS_1_4
t l 1:4
T1_PS_1_8
t l 1:8
Khai bo s dng thch anh ngoi:

:
T1_OSC1EN_OFF :
khng s dng thch anh ngoi
T1_SYNC_EXT_ON
s dng b ng b xung
T1_SYNC_EXT_OFF
khng s dng b ng b xung
OpenTimer2(config): Khai bo s dng b Timer2
Timer2 Interrupt:
s dng ngt Timer1
TIMER_INT_ON
TIMER_INT_OFF :
Prescalers
T2_PS_1_1
t l 1:1
T2_PS_1_4
t l 1:4
T2_PS_1_16
t l 1:16
T2_PS_1_1
t l 1:1
T2_PS_1_2
t l 1:2
Postscaler:
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s dng thch anh ngoi
Khai bo s dng b ng b xung:
Hnh 3.1
s dng Timer 16 bits
Ngun xung s dng:
T1_OSC1EN_ON
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......
T2_PS_1_15
t l 1:15
T2_PS_1_16
t l 1:16
OpenTimer3(config): Khai bo s dng Timer3
Timer3 Interrupt:
TIMER_INT_ON
TIMER_INT_OFF :
s dng ngt Timer1

Khai bo s bits s dng:

T3_8BIT_RW
s dng Timer 8 bits
T3_16BIT_RW
s dng Timer 16 bits
Ngun xung s dng:

T3_SOURCE_EXT :
s dng ngun xung ngoi (t chn T1CKI)
T3_SOURCE_INT :
s dng ngun xung t thch anh
Prescaler:
T3_PS_1_1
t l 1:1
T3_PS_1_2
t l 1:2
T3_PS_1_4
t l 1:4
T3_PS_1_8
t l 1:8
Khai bo s dng b ng b xung:

T1_SYNC_EXT_ON
s dng b ng b xung
T1_SYNC_EXT_OFF
khng s dng b ng b xung
CloseTimerX(): Tt khng s dng b Timer1/2/3

ReadTimerX() : c gi tr t b Timer1/2/3
WriteTimerX(): Ghi gi tr v Timer1/2/
Quy trnh khai bo Timer cho ng dng:
OpenTimerX(config); // Khi to Timer

WriteTimerX(...);
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// Khi to gi tr u cho Timer

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.....
Bin = ReadTimerX();// c ly gi tr Timer

....
CloseTimerX();
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// ng TimerX khi khng s dng
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Bi 12 : ADC (ANALOG DIGITAL CONVERT)

Datasheet 18F4620 Chng 19
12.2 TNG QUAN V ADC

12.2.1 ADC l g?
ADC (Analog to Digital Convert) l mt b chuyn i t tn hiu tun t (analog) sang tn hiu
s (digital). C rt nhiu b chuyn i ADC, v d nh cc b chuyn i s dng Op-Amp
(khuch i thut ton), cc card chuyn i s dng IC, hay cc b chuyn i c tch hp
trong VK ... Trong ni dung bi hm nay, chng ta ch xt n cc b chuyn i ADC c tch
hp trong VK. Trc ht, chng ta s tm hiu mt s khi nim c bn ca b ADC.
12.2.2 phn gii (Resolution)
phn gii l s gi tr bit c th c cha ht ton b cc gi tr ca tn hiu. phn gii
c tnh theo n v bits. phn gii cng cao th tn hiu thu c s cng mn tc l gn
ging vi tn hiu tun t hn.
12.2.3 Gi tr tham chiu:

Gi tr tham chiu l cc gi tr cao nht v thp nhp ca b chuyn i ADC. Ta xt n mt
v d sau y:
Gi s bn c mt b ADC 10 bits, gi tr tham chiu c chn l Vref+ = 5V - Vref- = 0V.
Nu bn thu v mt tn hiu tun t 3V, th bn s thu v c gi tr ca ADC l:
2 1
3 0
614
50
Nhng nu chng ta chn Vref+ = 5V v Vref- = 1.5V, khi ta thu v mt tn hiu tun t mc
3V, ta s nhn c gi tr nh sau:
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2 1
3 1.5
438
5 1.5
12.3 B CHUYN I ADC TRONG VK

12.3.1 Cu to phn cng mt b ADC:
Xem hnh trang 228, 229 datasheet 18F4620
12.3.2 Cc thanh ghi tng tc:
C 5 thanh ghi tng tc cho mt b ADC, bao gm cc thanh ghi sau:
ADRESH ADRESL : thanh ghi cha gi tr ADC.
ADCON0 ADCON1 ADCON2 : thanh ghi khai bo cho ADC.
// chi tit cc thanh ghi khai bo xem trang 225-227
12.3.3 Mt s khi nim quan trng:
Thi gian thu nhn d liu (Acquisition Time):
y l thi gian cn thit phn cng ADC p ng cho vic thu nhn d liu. Thi gian ny
c khai bo ti cc thanh ghi ADCON.
// GV hng dn thm ti lp.
Thi gian chuyn i ADC (ADC Time):
Thi gian ny c tnh theo n v TAD (vo khong 0.7 us),vi gi tr TAD s c khai bo
trong thanh ghi ADCON nhng phi tun theo bng sau:
Vi b ADC 10 bits ta s cn 11 TAD chuyn i. Sau y ta v d cho thi gian chuyn i

ca mt b ADC 10 bits:
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// GV ng lp hng dn thm v config bit PBADEN

12.3.4 S dng th vin ADC trong C18
Chng ta s bt u tm hiu cch s dng cc hm trong th vin ADC ca PIC 18F4620.
Trc tin, mun s dng th vin ADC trong MPLAB, chng ta phi khai bo:
#include <adc.h>
Vi cc hm sau:
OpenADC(config1, config2, portconfig): Khi to ADC.
-
Config1:
Khai bo Tad:
ADC_FOSC_2
Tad
2Fosc
ADC_FOSC_4
Tad
4Fosc
ADC_FOSC_8
Tad
8Fosc
ADC_FOSC_16
Tad
16Fosc
ADC_FOSC_32
Tad
32Fosc
ADC_FOSC_64
Tad
64Fosc
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Khai bo kiu kt qu ADC:
ADC_RIGHT_JUST :
bit thp bit cao
ADC_LEFT_JUST :
bit cao bit thp
Khai bo thi gian tnh ton kt qu:
ADC_0_TAD
ADC_2_TAD
Tacq =
2 Tad
ADC_4_TAD
Tacq =
4 Tad
ADC_6_TAD
Tacq =
6 Tad
ADC_8_TAD
Tacq =
8 Tad
ADC_12_TAD
Tacq =
12 Tad
ADC_16_TAD
Tacq =
16 Tad
ADC_20_TAD
Tacq =
20 Tad
Tacq =
0 Tad
Config2:
Chn knh ADC mc nh (knh ADC ban u):
ADC_CH0
Knh 0 (AN0)
ADC_CH1
Knh 1 (AN1)
ADC_CH2
Knh 2 (AN2)
ADC_CH3
Knh 3 (AN3)
ADC_CH4
Knh 4 (AN4)
ADC_CH5
Knh 5 (AN5)
ADC_CH6
Knh 6 (AN6)
ADC_CH7
Knh 7 (AN7)
ADC_CH8
Knh 8 (AN8)
ADC_CH9
Knh 9 (AN9)
ADC_CH10
Knh 10 (AN10)
ADC_CH11
Knh 11 (AN11)
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ADC_CH12
Knh 12 (AN12)
ADC_CH13
Knh 13 (AN13)
ADC_CH14
Knh 14 (AN14)
ADC_CH15
Knh 15 (AN15)
Khai bo c s dng ngt ADC:
ADC_INT_ON
ADC_INT_OFF
S dng ngt
Khng s dng ngt
Khai bo s dng ngun chun:
ADC_VREFPLUS_VDD
S dng ngun dng chun bn ngoi
ADC_VREFMINUS_VDD :
S dng ngun m chun t bn ngoi
Nu khng khai bo phn ny, ta s xem mc nh l s dng ngun chun cp t VK
portconfig: khai bo s dng bao nhiu knh ADC (0 15).
SetChanADC(channel): chn knh ADC (nu s dng nhiu knh ADC).

channel:
ADC_CH0
Knh 0 (AN0)
ADC_CH1
Knh 1 (AN1)
ADC_CH2
Knh 2 (AN2)
ADC_CH3
Knh 3 (AN3)
ADC_CH4
Knh 4 (AN4)
ADC_CH5
Knh 5 (AN5)
ADC_CH6
Knh 6 (AN6)
ADC_CH7
Knh 7 (AN7)
ADC_CH8
Knh 8 (AN8)
ADC_CH9
Knh 9 (AN9)
ADC_CH10
Knh 10 (AN10)
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ADC_CH11
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Knh 11 (AN11)
BusyADC() : Kim tra xem ADC c bn hay khng ???

ConvertADC() : Chuyn i analog digital.
ReadADC(): c gi tr t knh ADC.
CloseADC(): Kt thc vic s dng knh ADC.
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Bi 13 : USART
Serial Port Complete Jan Alexson
Datasheet PIC 18F4620 Chng 18
13.2 KHI QUT V CC CHUN GIAO TIP

USART (Universal Synchronous & Asynchronous serial Receiver and Tranreceiver) c ngh l
Chun truyn nhn ni tip ng b v bt ng b, y l mt thut ng ch mt chun giao
tip. Ngoi ra, chng ta cn phn bit thut ng UART (ngha l chun truyn nhn bt ng b),
thng ch mt thit b phn cng. Khi chng ta s dng chun giao tip USART, chng ta phi
s dng thm mt b phn phn cng nh km, thng th b phn phn cng ny l mt mch
m dng chuyn in p 0V n 5V sang mt mc in p khc cho ph hp vi loi giao
tip. Sau y, chng ta s cng tm hiu nhng khi nim c bn ca USART:
13.2.1 Giao tip ni tip:
Giao tip ni tip l kiu truyn nhn m d liu i trong bus d liu dng tng bit mt, khc
vi chun truyn nhn song song khi m d liu c truyn trong bus dng gi d liu. Hnh
nh sau gip chng ta d hnh dung hn chun giao tip ni tip/ song song:
u im ln nht ca chun giao tip ni tip l bng thng nh, chun phn cng n gin
(ch c 1 hay 2 ng d liu). Bn cnh , chun giao tip ni tip c khuyt im ln nht l,
thi gian truyn chm, nhng nh c s pht trin ca k thut nn dn dn nhng khuyt im
c loi b.
13.2.2 Truyn thng ng b v bt ng b:
Truyn thng ng b l kiu tryn c chun ha v mt thi gian, nn khi d liu c
truyn i chng ta cn phi c tn hiu bo trc. Khi y, chun truyn ng b ny cn t nht hai
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chn (mt chn d liu v mt chn xung nhp). Nhng nh m tin cy trong truyn nhn
cao hn, d liu sai st t hn.
Khc vi chun truyn thng ng b, chun truyn bt ng b l chun truyn m chng ta
khng cn c tn hiu bo trc. Nhng nhn bit d liu truyn nhn chng ta cn tun th cc
nguyn tc chung trong truyn nhn, nn t chng ta c chun truyn nhn cho cc giao tip bt
ng b.
13.2.3 Baud Rate:
Baud Rate l mt chun v thi gian cho vic truyn nhn, hay ni cch khc Baud Rate chnh
l s bit truyn c trong mt giy.
13.2.4 Frame truyn:
Do truyn thng bt ng b rt d xy ra sai lch trong qu trnh truyn nhn, nn ngi ta mi
ra quy nh v frame truyn. Frame truyn l mt gi d liu truyn trong bao gm cc thnh
phn c bn sau:
Start bit : bit bo bt u gi truyn.
Stop bit : bis bo kt thc gi truyn.
Data : d liu cn truyn.
Parity bit: bit kim tra li, thng c 2 loi bit parity (chn v l)
// GV s hng dn thm phn ny
13.3 USART TRONG PIC

Module USART bao gm cc thanh ghi sau y:
TXSTA: Thanh ghi khai bo phn truyn d liu.

RCSTA: Thanh ghi khai bo phn nhn d liu.
TXREG: Thanh ghi cha d liu cn truyn.
RCREG: Thanh ghi cha d liu nhn.
BAUDCON: Thanh ghi khai bo tc truyn.
M hnh phn cng:
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Hnh 13.1 - M hnh phn cng truyn d liu.
Hnh 13.2 - M hnh phn cng nhn d liu.

Khai bo c bn cho mt module USART bao gm cc phn sau y:
Khai bo trng thi nhn
Khai bo trng thi truyn.
Khai bo tc truyn (Baud Rate) vi cng thc sau y:
Tc BaudRate (chc trong thanh ghi SPBRG) = Fosc / (64 * BaudRate) 1
Vi BaudRate phi c chn theo tiu chun.
Quy trnh khai bo cho mt module USART trong PIC:
Khai bo ng b / bt ng b.
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Khai bo s bits truyn nhn.
Khai bo ngt.
Khai bo tc Baud
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Quy trnh truyn d liu:
Gn gi tr cho thanh ghi TXREG.
Ch cho vic truyn thnh cng.
Quy trnh nhn d liu:

Thng chng ta lm theo 2 cch:
Cch 1: S dng ngt RCIE
Cch 2: Kim tra xem c ngt RCIF c bt ln hay khng
13.3.2 Th vin USART trong C18

#include <usart.h>
Cc hm thng dng trong MPLAB bao gm cc hm sau:
- OpenUSART(config, baud_rate): Khai bo giao tip USART:

Config:
Khai bo ngt sau khi truyn d liu:
USART_TX_INT_ON : S dng ngt khi truyn d liu
USART_TX_INT_OFF : Khng s dng ngt khi truyn d liu.
Khai bo ngt sau khi nhn d liu
USART_RX_INT_ON : S dng ngt khi nhn d liu.
USART_RX_INT_OFF : Khng s dng ngt khi nhn d liu.
Ch USART:
USART_ASYNCH_MODE : Truyn nhn bt ng b
USART_SYNCH_MODE : Truyn nhn ng b
Khai bo kch thc gi truyn:
USART_EIGHT_BIT : Gi truyn 8 bits
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USART_NINE_BIT : Gi truyn 9 bits
Khai bo truyn nhn ng b (ch p dng khi chng ta s dng truyn nhn ng b)
USART_SYNC_SLAVE : ng b truyn Slave
USART_SYNC_MASTER : ng b truyn Master
Khai bo ch nhn d liu:5
USART_SINGLE_RX : Khai bo ch nhn d liu n
USART_CONT_RX : Khai bo ch nhn d liu lin tc
Khai bo ch baud rate
USART_BRGH_HIGH : Khai bo baud rate mc cao
USART_BRGH_LOW : Khai bo baud rate mc thp
baud_rate: Khai bo thng s baud rate ca h thng:

Truyn nhn bt ng b, ch baud rate mc cao:
FOSC / (16 * (spbrg + 1))
Truyn nhn bt ng b, ch baud rate mc thp:
FOSC / (64 * (spbrg + 1))
Truyn nhn ng b:
FOSC / (4 * (spbrg + 1))
CloseUSART(): Tt giao tip USART.

BusyUSART(): Kim tra xem d liu gi xong cha ???
putcUSART(data): gi mt byte k t.
putsUSART(data): gi mt chui k t.
DataRdyUSART(): Kim tra xem nhn c d liu cha ???
getcUSART(): nhn mt byte d liu
getsUSART(data,length): nhn mt chui d liu, vi chiu di length.
Cch s dng chng trnh m phng cng COM.
// GV hng dn s dng ti lp.
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Bi 14 : PWM / CAPTURE / COMPARE

Chng 15 Datasheet 18F4620
Nhc li kin thc v Timer 1 2 3:
14.2 TNG QUAN V PWM/CAPTURE/COMPARE

14.2.1 PWM l g?
PWM (Pulse-Width Modulation) cn gi l chc nng iu ch rng xung c ng dng
rt nhiu trong cc lnh vc in t, iu khin ... Chc nng ny thc cht l thay i gi tr trung
bnh ca in p (dng in, ...) bng cch iu chnh rng xung kch mc cao trong mt chu
k. Chc nng ny thng c ng dng trong vic iu chnh in p u ra, iu chnh tc
ca ng c DC ...
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14.2.2 ng dng trong VK:

14.2.2.1 Chc nng Capture:
14.2.2.2 Chc nng Compare
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14.2.2.3 S khi chc nng PWM:
Cng thc tnh ton: (trnh by trong chng trnh)

Khai bo config bit CCP2MX: // GV hng dn ti lp
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14.3 QUY TRNH S DNG MODULE PWM TRONG PIC

14.3.1 Quy trnh s dng PWM
Khai bo s dng chc nng: ci t cho 4 bit ca thanh ghi CCPxCON

Tnh ton v ci t Period vo thanh ghi PR2
Tnh ton v ci t duty cycle vo thanh ghi: CCPxRL v CCPxCON<4,5>
Set TRIS cho ng ra
Ci t timer 2 Prescaler v enable timer2
Enable PWM
14.3.2 Hng dn s dng trong PIC 18F:
Chng ta s s dng th vin PWM ca MPLAB iu khin ng c. Trc khi, s dng th
vin PWM, ta phi khai bo khai bo Timer2.
Tip theo, chng ta phi chn vo tin x l:
#include <pwm.h>
Vi cc hm tng tc sau y:
OpenPWMx(period): Khi to module PWM

SetDCPWMx(duty) : khai bo duty cycle cho ng c.
ClosePWMx(): Tt module PWM.
14.4 PHN M RNG - ENCODER

14.4.1 Encoder l g?
iu khin c mt ng c DC ng vi vn tc hay v tr cn thit, chc chn rng chng

ta phi c c vn tc hay v tr hin ti ca n. T ta c 3 phng php chnh:
Dng tachometer (Tachometer l mt cm bin o gc)
Dng bin tr xoay (thng phng php ny dng xc nh v tr, t khi no dng xc
nh vn tc)
Dng optical enocoder.
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Hnh 14.1 - Encoder l g ???

Encoder l mt loi cm bin bao gm 2 phn chnh:
Mt b thu pht tn hiu quang hc (cm bin quang)
Mt a kim loi c khc vch.
chnh xc ca mt encoder ph thuc rt ln vo s vch khc trn a kim loi, cng nh
thi gian p ng ca b cm bin quang hc.
14.4.2 Phn loi encoder:
C 2 loi encoder:
Encoder tuyt i : thng c ng dng nhiu trong cc h thng o v tr.
Encoder tng i: loi encoder ny dng rt nhiu v kh ph bin. Nn t nay chng ta
thng nht khi ni n encoder, th chnh l encoder tng i.
14.4.3 Tn hiu u ra encoder:
Mt encoder thng c 5 chn, bao gm cc chn sau:
2 chn cho ngun v mass.
1 chn cho pharse A
1 chn cho pharse B
1 chn cho pharse Z
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Tn hiu Pharse A v pharse B thng lch nhau chu k, thng th chng ta dng hai tn
hiu ny nhn bit chiu quay ca encoder.
14.4.4 Cc phng php c tn hiu encoder:
Dng chc nng Capture:
Ta dng chc nng capture o chu k ca encoder, t chng ta c th tnh ton c vn
tc ca ng c DC.
Dng chc nng Timer1:
Ta dng chn T13CKI thu nhn tn hiu t encoder gi v (xem xung t encoder nh mt
ngun xung). Bn cnh ta c th kt hp thm chc nng Timer 0 tnh ton vn tc ca ng
c DC.
Dng chc nng ngt ngoi:
Dng cc knh ngt INTx thu nhn tn hiu t encoder (xem xung t encoder nh mt ngun
kch). Bn cnh , ta c th kt hp thm chc nng Timer0 (o thi gian) tnh ton vn tc
ca ng c DC.
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Bi 15 : SPI I2C
CC PHNG PHP LU TR D LIU
Chng 17 Datasheet 18F4620

Serial Port Complete
15.2 TNG QUAN V SPI

SPI (Serial Peripheral Bus) l mt chun giao tip ng b - ni tip do hng Motorola xut.
SPI l mt chun giao tip theo kiu Master Slave, vi mt chip Master iu khin hot ng
truy xut ca hng lot chip Slave. SPI cng l mt chun giao tip song cng (full duplex), theo
d liu truyn v nhn ng thi. mt s ti liu, ngi ta cn gi chun SPI l chun giao
tip 4 dy, vi 4 ng truyn:
SCK : xung gi nhp cho giao tip SPI, xung clock c pht ra t chip Master v chip
Slave s nhn xung v ng b qu trnh truyn nhn. Nh c chn SCK m qu trnh
truyn nhn din ra t li hn, v nhanh hn.
SDI : chn pht d liu cho Master / Slave.
SDO : chn thu nhn d liu cho Master/Slave.
SS (Select Slave) : i vi Master th y s l chn chn chip Slave no s truyn, cn i
vi chip Slave th y l chn cho php c truyn nhn vi chip Master.
15.3 HOT NG CA SPI

15.3.1 Phn cng ban u bao gm:
Chn Master SDI ni vi chn Slave SDO.
Chn Master SDO ni vi chn Slave SDI.
Chn SCK ca 2 chip ni vi nhau.
Mt chn IO bt k ca Master ni vi chn SS ca Slave.
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15.4 SPI TRONG PIC

// GV s trnh by ti lp
15.5 TH VIN SPI TRONG C18

s dng giao tip SPI trong MPLAB C18, ta khai bo th vin:
#include <spi.h>
Vi cc hm tng tc c bn sau y:
OpenSPI(sync_config, bus_config, smp_config): Khai bo cho module SPI.

sync_config:
Ch Master:
SPI_FOSC_4 SPI
xung gi nhp = Fosc/4
SPI_FOSC_16 SPI
SPI_FOSC_64 SPI
SPI_FOSC_TMR2 SPI
xung gi nhp TMR2 / 2
Ch Slaver:
SLV_SSON
s dng chn SS
SLV_SSOFF
khng s dng chn SS (chn chn khc lm SS)
bus_config:
MODE_00
ch 0, 0
MODE_01
ch 0, 1
MODE_10
ch 1, 0
MODE_11
ch 1, 1
smp_config:
SMPEND
ly mu vo cui xung
SMPMID
ly mu vo gia xung
putcSPI(data) :
gi mt byte d liu.
putsSPI(string)
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gi mt chui d liu.
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(qu trnh gi master phi c khi u v kt thc bng vic kch xung v chn SS)
DataRdySPI() :
xt xem d liu sn sng nhn cha ??? (thng ch p dng cho
vic gi nhn mt byte d liu)
data = getcSPI(): nhn mt byte d liu.

getsSPI(data_string,length)
CloseSPI():
nhn mt string vi chiu di length.
Tt giao tip SPI
15.6 M RNG I2C

15.6.1 Kin thc c bn v giao tip I2C:
I2C (Inter-Intergrade Circuit) l mt chun truyn thng do hng Philip Semiconductor xut.
I2C l chun ng b - ni tip, tuy nhin I2C c mt c im kh hay l giao tip ny l mt
giao tip a ch, tc l mt chip va c th l Slave m cng c th l Master. Trong mt mng
I2C vi cc chip ng chc nng (cng h tr Master Slave) th trong mt thi im mt chip c
th l Master nhung mt thi im khc n c th l Slave. Nhng i vi cc chip nh do thit
k ca cc nh sn xut n ch h tr ch Slave.
15.6.2 Cu hnh phn cng ca giao tip I2C:
Master l chip gi vai tr iu phi thng tin trong mng iu khin, khi cn giao tip vi
Slave no th Master ch vic gi a ch n Slave , v bt u qu trnh giao tip.
Slave: l chip thc thi trong mng giao tip, trong mi chip Slave c chc mt a ch trong
mng giao tip.
SDA : l ng truyn d liu chnh cho c giao tip, tt c d liu phi c truyn trn
ng d liu ny.
SCL: l ng xung nhp ng b ha vic truyn nhn cho giao tip.
15.6.2.1 Cc bit iu khin cho giao tip I2C:
Start : iu kin bt u t trng thi ngh, khi Master mun bt u qu trnh truyn nhn,
th bt buc Master phi ko SDA t cao xung thp trong khi SCK vn mc cao.
Stop: iu kin kt thc, khi Master mun kt thc vic truyn nhn d liu th bt buc
Master phi ko SDA t cao xung thp trong khi SCL vn cn ang mc cao. Quy trnh
Stop xy ra ch khi vic truyn nhn kt thc.
Repeat : Khi vic truyn nhn kt thc thay v Master kt thc qu trnh truyn truyn nhn
bng Stop bit, nhng Master li gi tip Start bit , trong trng hp ny ta gi l Repeat
Start. Trng hp ny xy ra khi Master mun nhn d liu lin tip t Slave.
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ACK: y l bit dng bo hiu xem vic truyn d liu hon thnh cha. Thng bit
ny c gi t Slave, Slave dng n bo cho Master mnh nhn d liu.
15.6.2.2 a ch Slave:
a ch thng c gi i t Master n Slave, a ch cha Slave m n mong mun truyn
ti. a ch cng l gi d liu u tin ca mt ln truyn. Cu trc gi a ch bao gm:
7 bits a ch.
1 bit iu khin hng truyn (Read/Write).
15.6.2.3 Kt cu mt gi truyn:
Mt gi truyn c bn bao gm:
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Thng thng ngi ta phi hp gia gi a ch v gi d liu:
15.6.2.4 Cuc gi chung:

Cuc gi chung l cuc gi m a ch c dng 0000000W (a ch = 0 v bt iu khin hng
l W). Cuc gi chung xy ra khi Master mun truyn d liu cho tt c Slave. Tt nhin, trong
trng hp ny Slave c th nhn hay khng nhn cuc gi chung t Master (ty theo Slave c
c ci t ch cho php nhn cuc gi chung hay khng).
15.7 CC PHNG PHP LU TR D LIU

Vi nhng d liu tn ti lu di theo thi gian ta bt buc phi lu tr. Vic lu tr d liu
trong lin quan ti PIC c th c chia lm 2 loi: c b nh ngoi v khng c b nh ngoi.
Nu khng dng b nh ngoi d liu c lu tr trong EEPROM c h tr ca PIC. Nu
dng b nh ngoi c th dng EEPROM ngoi hoc cc thit b lu tr khc nh th nh, USB,
my tnh ni dung bi ny ch trnh by 2 vn : Data EEPROM Memory v Extenal
EEPROM Memory.
15.7.1 Ti liu tham kho:
Chng 7, 17, 18 Datasheet 18F4620
15.7.2 Data EEPROM Memory
15.7.2.1 Kin trc
Nh chng ta bit EEPROM l b nh c th c, ghi bng cc tn hiu in v hon ton
khng b mt khi ngt ngun nui. Chnh v th b nh ny c dng lu tr cc d liu tn
ti lu di theo thi gian k c khi h thng dng hot ng.
V mt t chc, Data EEPROM c t chc theo dng mng (hon ton tng t mt bank ca
RAM). Chnh v th vic truy xut d liu trong Data EEPROM c th thc hin bng phn mm
trong sut qu trnh hot ng ca PIC. Hot ng truy xut ny c thc hin thng qua vic ci
t cc gi tr ca 5 thanh ghi: EECON1, EECON2, EEDATA, EEADR, EEADRH
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EEADR, EEADRH: y l cp thanh ghi nh a ch ca vng nh cn truy xut trong

EEPROM. Ty theo dung lng ca tng dng m s ng a ch c th khc nhau (ti
a l 16, 65536 bytes). dng PIC18F dung lng Data EEPROM c gii hn 1024
bytes (PIC18F4620), chnh v vy CPU cn 10 ng a ch c th truy xut ht vng
nh ny. EEADR cha 8 bit thp v EEADRH cha 2 bit cao ca a ch.
-
EECON1 v EECON2: l b thanh ghi iu khin hot ng ca Data EEPROM. Trong

thanh ghi EECON2 khng phi l thanh ghi vt l cho nn ngi dng khng th tng tc
c. Mi ci t hot ng ca Data EEPROM u c thc hin trn thanh ghi

EECON1 (chi tit xem trang 84 Datasheet 18F4620 hoc trang 90 Datasheet 18F4550).
-
EEDATA: l thanh ghi cha d liu xut, nhp cho EEPROM. iu ny c ngha l ti mt
thi im ta ch c th truy xut 1 nh ca b nh ny
15.7.2.2 Ci t v hot ng:

a. c d liu
- Ci t hot ng ti thanh ghi EECON1: ch ghi d liu v Data Memory(GV ging
chi tit phn ny trn lp)
- Ghi a ch vo cc thanh ghi: EEADR, EEADRH (a ch c th lu tr l t 0x00 ti
0x3FF)
- Ghi d liu cn ghi vo thanh ghi EEDATA
b. Ghi d liu
- Ci t hot ng ti thanh ghi EECON1: ch c d liu t DataMemory (GV ging
chi tit phn ny trn lp)
- Ghi a ch vo cc thanh ghi: EEADR, EEADRH (a ch c th lu tr l t 0x00 ti
0x3FF)
- c d liu t thanh ghi EEDATA
15.7.3 Extenal EEPROM Memory
Cc IC lu tr (chip nh) ngoi thng c giao tip ng b vi h thng (PIC) thng qua 1
trong 2 chun giao tip: SPI v I2C. Mi hot ng truy xut b nh u c thc hin thng
qua cc chun giao tip ny. Chnh v th vic ci t v hot ng truy xut b nh ngoi l
vic ci t v hot ng cc chun SPI hoc I2C. (xem bi 15).
15.7.4 Bi tp
Lu tr d liu nhit tham kho bi tp tng kt vo DataEEPROM Memory.
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Bi 16 : BI TP TNG KT
16.1 YU CU
Hnh 16.1 - S phn cng ca mch th nghim

Vi s phn cng trn ta c th gii quyt nhiu bi ton ng dng trong thc t, trong
ni dung bi tp ca kho hc yu cu c t ra nh sau:
Yu cu: Thit k h thng t ng gim st nhit c giao tip vi my tnh
u vo:
-
Cm bin nhit (analog sensor)

Bin tr ci t gi tr nhit tham kho
Nt nhn chn ch hot ng
u ra:
-
Hin th gi tr nhit hin ti v gi tr nhit tham kho ra LCD

iu khin vn tc ng c qut (DC motor) iu ho nhit
Kt qu c truyn ln my tnh lu tr, x l
Optional: b nh ngoi EEPROM
Hot ng:
H thng c vai tr gim st v t ng iu chnh nhit ca mi trng.
Nhit tham kho c ci t thng qua bin tr trong ch ci t (c chn bi nt

nhn (c th dng ngt hoc counter).
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Khi nhit cao hn gi tr tham kho, h thng s t ng khi ng qut lm gim

nhit ca thit b cn gim st.
Gi tr nhit tham kho v gi tr nhit hin thi c hin th ln 2 dng ca LCD.
Sau mt thi gian nht nh h thng s t ng gi d liu nhit ln my tnh gim
st, kim tra.
Optional: C th lu tr gi tr d liu vo chp nh ngoi
16.2 M T PHN CNG

-
Vi iu khin PIC18F4620 hoc PIC18F4550

Kt ni cc chn PORT s c hng dn ti lp
16.3 GII THUT

GV hng dn ti lp
16.4 CHNG TRNH

Thi gian hon thnh chng trnh l 4 ting ng h (2 bui hc)
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Nhm o To K Thut BigLab

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11.2 CU TRC PHN CNG TIMER 1, 2, 3 (Tham kho bi s 7) ........................ 70

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16.2 M T PHN CNG ......................................................................................... 99

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DANH SCH HNH V

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DANH SCH BNG BIU

Mt vi ng dng ca vi iu khin trong thc t ............................................ 18

Cc kiu d liu trong C ................................................................................. 25

Cc cu trc lnh trong C ................................................................................ 27

Ton t trong C............................................................................................... 27

Bng so snh mc u tin ca cc ton t: ................................................. 28

Cc thanh ghi PORTA .................................................................................... 41

Bng m dnh cho LED 7 on Anode chung ................................................. 43

Bng m dnh cho LED 7 on Cathode chung:.............................................. 44

Cc kiu d liu nng cao trong C................................................................... 63

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B CHNG TRNH TI BIGLAB

B CHNG TRNH O TO TI BIGLAB

MC TIU: THIT K H THNG T NG

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Lp c bn s cung cp nhng kin thc c bn v cc phn mm, cc phng php dng

Lp thit k: Cc bn s c hc v phng php thit k, trnh t thit k trong c kh,

Lp in t thc hnh: lp ny cc bn s c hc v cc linh kin in t c bn da

Lp in t k thut s vi iu khin: l phn sau ca lp in t thc hnh. Trong lp

Lp in t ng dng: y l lp nng cao trong mng in t, cung cp cho cc bn nhng

Hng y trong 1 kha:

l cc lp PIC Full. y l cc lp dy y v vi iu khin PIC. Cc bn s c hc

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Nhm o To K Thut BigLab

Hng PIC C bn ng dng:

Nhm bin son BigLab

Ch bin ThS. V Xun Quc vxquoc@gmail.com

Nhm o To K Thut BigLab

CNG CHNG TRNH PIC TOTAL

Bui 1: Nhng khi nim c bn v vi iu khin

Nhm bin son BigLab

Ch bin ThS. V Xun Quc vxquoc@gmail.com

Nhm o To K Thut BigLab

Nhm bin son BigLab