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Internal Use Only

North/Latin America
Europe/Africa
Asia/Oceania

http://aic.lgservice.com
http://eic.lgservice.com
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LED TV
SERVICE MANUAL
CHASSIS : LB3AC

MODEL : 32LN549C
32LP360H

32LN549C-TA
32LP360H-TA

CAUTION

BEFORE SERVICING THE CHASSIS,


READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67715805 (1303-REV00)

Printed in Korea

CONTENTS

CONTENTS . ............................................................................................. 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS ................................................................... 4
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 10
TROUBLE SHOOTING GUIDE................................................................ 15
BLOCK DIAGRAM ................................................................................. 20
EXPLODED VIEW .................................................................................. 21
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.

An isolation Transformer should always be used during the


servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.

Do not use a line Isolation Transformer during this check.


Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Before returning the receiver to the customer,


Always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an


electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-3-

LGE Internal Use Only

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug
or other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication
of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor chip components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

2. After removing an electrical assembly equipped with ES


devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.
4. Use only an anti-static type solder removal device. Some solder removal devices not classified as anti-static can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will
be installed.
CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within
the range or 500 F to 600 F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 F to 600 F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 F to 600 F)
b. First, hold the soldering iron tip and solder the strand
against the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.

-4-

LGE Internal Use Only

IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.

3. Solder the connections.


CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. Carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

Fuse and Conventional Resistor


Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-5-

LGE Internal Use Only

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

This specification is applied to the LED TV used LB3AC


chassis.

3. Test method

2. Requirement for Test

1) Performance: LGE TV test method followed


2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC

Each part is tested as below without special appointment.


1) Temperature: 25 C 5 C(77 F 9 F), CST: 40 C 5 C
2) Relative Humidity: 65 % 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. Model General Specification


No.

Item

Specification

Remarks

Market

Asia, Oceania, Africa, Middle East


(PAL/DVB Market)

Only Analog for A-ASIA

2.

Broadcasting system

1) PAL/SECAM-B/G/D/K
2) PAL-I
3) NTSC-M
4) DVB-T

PAL

Channel Storage

ATV - 135 EA, DTV - 1000 EA

Receiving system

Analog : Upper Heterodyne


Digital : COFDM(DVB-T)

DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

Video(Composite) Input

PAL, SECAM, NTSC

4 System : PAL, SECAM, NTSC, PAL60

RGB Input(1EA)

RGB-PC

Analog(D-SUB 15PIN)

Component Input

Y/Cb/Cr, Y/Pb/Pr

Spec out

HDMI Input

HDMI1-DTV/DVI
HDMI2-DTV/DV
HDMI3-DTV/DVI

Common Port in AV & PC input.

Audio Input (1EA)

RGB/DVI Audio
AV

10

SDPIF out

SPDIF out

11

USB

For My Media(Movie/Photo/Music List) and SVC

12

External Speaker

Max 1W @ 8 ohm

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

Stereo SE output

-6-

LGE Internal Use Only

5. External Input Support Format


5.1. Component (Y, PB, PR) Speck out
No.

Resolution

H-freq(kHz)

V-freq(Hz)

Proposed

1.

720480

15.73

60.00

SDTV, DVD 480i

2.

720480

15.63

59.94

SDTV, DVD 480i

3.

720480

31.47

59.94

480p

4.

720480

31.50

60.00

480p

5.

720576

15.625

50.00

SDTV, DVD 625 Line

6.

720576

31.25

50.00

HDTV 576p

7.

1280720

45.00

50.00

HDTV 720p

8.

1280720

44.96

59.94

HDTV 720p

9.

1280720

45.00

60.00

HDTV 720p

10.

19201080

31.25

50.00

HDTV 1080i

11.

19201080

33.75

60.00

HDTV 1080i

12.

19201080

33.72

59.94

HDTV 1080i

13.

19201080

56.250

50

HDTV 1080p

14.

19201080

67.5

60

HDTV 1080p

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-7-

LGE Internal Use Only

5.2. HDMI Input(PC/DTV)


No.

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

Proposed

720*480

31.469 / 31.5

59.94 / 60

27.00/27.03

SDTV 480P

Remark

DTV
1
2

720*576

31.25

50

54

SDTV 576P

1280*720

37.500

50

74.25

HDTV 720P

1280*720

44.96 / 45

59.94 / 60

74.17/74.25

HDTV 720P

1920*1080

33.72 / 33.75

59.94 / 60

74.17/74.25

HDTV 1080I

1920*1080

28.125

50.00

74.25

HDTV 1080I

1920*1080

26.97 / 27

23.97 / 24

74.17/74.25

HDTV 1080P

1920*1080

33.716/33.75

29.976/30.00

74.25

HDTV 1080P

1920*1080

56.250

50

148.5

HDTV 1080P

10

1920*1080

67.43 / 67.5

59.94 / 60

148.35/148.50

HDTV 1080P

640*350 @70Hz

31.468

70.09

25.17

EGA

720*400 @70Hz

31.469

70.08

28.321

DOS

640*480 @60Hz

31.469

59.940

25.175

VESA(VGA)

800*600 @60Hz

37.879

60.31

40.000

VESA(SVGA)

1024*768 @60Hz

48.363

60.00

65.000

VESA(XGA)

1152*864 @60Hz

54.348

60.053

80.002

VESA

1280*1024 @60Hz

63.981

60.020

108

VESA(SXGA)

1360*768 @60Hz

47.712

60.015

85.5

VESA(WXGA)

1920*1080 @60Hz

67.5

60.0

148.5

WUXGA
(Reduced blanking)

PC

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-8-

FHD only(Support
to HDMI-PC)
FHD only(Support
to HDMI-PC)

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range

(4) Click "Connect" tab. If "Can't" is displayed, check connection


between computer, jig, and set.

This specification sheet is applied to all of the LED TV with


LB3AC chassis.

(2)

(3)

2. Designation

(1) T he adjustment is according to the order which is


designated and which must be followed, according to the
plan which can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation : Above 5 Minutes (Heat Run)
Temperature : at 25 C 5 C
Relative humidity : 65 10 %
Input voltage : 220 V, 60 Hz
(6) A djustment equipments: Color Analyzer (CA-210 or
CA-110), DDC Adjustment Jig, Service remote control.
(7) Push the "IN STOP" key - For memory initialization.

Please Check the Speed :


To use speed between
from 200KHz to 400KHz

(5) Click "Auto" tab and set as below.


(6) Click "Run".
(7) After downloading, check "OK" message.

Case1 : Software version up


1. After downloading S/W by USB , TV set will reboot
automatically.
2. Push In-stop key.
3. Push Power on key.
4. Function inspection
5. After function inspection, Push In-stop key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
In-stop key at first.
2. Push Power on key for turning it on.
If you push Power on key, TV set will recover
channel information by itself.
3. After function inspection, Push In-stop key.

(4)
filexxx.bin

(5)

(7)...........OK

(6)

* USB DOWNLOAD

3. Main PCB check process


APC - After Manual-Insert, executing APC

* Boot file Download

(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message.
If "Error" is displayed, check connection between computer,
jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read".

(1) Put the USB Stick to the USB socket.


(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(3) Show the message "Copying files from memory".

(1)

(4) Updating is starting.

filexxx.bin

(5) Updating Completed, The TV will restart automatically.


(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-9-

LGE Internal Use Only

* If downloading version is more high than your TV have, TV


can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didnt have a DTV/
ATV test on production line.

4. Total Assembly line process


4.1. Adjustment Preparation

* After downloading, have to adjust Tool Option again.


(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)

W/B Equipment condition


CA210
: CCFL/EEFL -> CH9, Test signal: Inner pattern(80IRE)
LED -> CH14, Test signal: Inner pattern(80IRE)
Above 5 minutes H/run in the inner pattern. (power on key
of adjust remote control)
Mode
Cool

13,000 K

Medium

9,300 K

X=0.285 (0.002)
Y=0.293 (0.002)

Warm

6,500 K

X=0.310 (0.002)
Y=0.325 (0.002)

ADC RGB

1. Tool Option2
2. Tool Option3

NG
Start

3. Tool Option4

Reset

4. Tool Option5
5. Tool Option6
6. Commercial Tool Option

GP4

7. Country Group
8. Area Option
9. ADC Calibration

<Test Signal>
Inner pattern
(204gray,
80IRE)

Edge LED W/B Table in process of aging time (Only LGD


Edge LED Module except AUO, CMI, IPS Module)
CA210 : CH 14, Test signal : Inner pattern (80IRE)
Normal line

ADC Calibration

EZ ADJUST
0. Tool Option1

Coordinate spec
X=0.270 (0.002)
Y=0.271 (0.002)

3.1. ADC Process

(1) ADC
- Enter Service Mode by pushing "ADJ" key,
- Enter Internal ADC mode by pushing "" key at "8. ADC
Calibration".

Temp

Aging time
(Min)

10. White Balance

Cool

Medium

Warm

271

270

285

293

313

329

0-2

281

287

295

310

320

342

3-5

280

285

294

308

319

340

6-9

278

284

292

307

317

339

10-19

276

281

290

304

315

336

<Caution> U sing "P-ONLY" key of the Adjustment remote


control, power on TV.
If there is no Component Input, disappear ADC Comp message.

20-35

275

277

289

300

314

332

36-49

274

274

288

297

313

329

50-79

273

272

287

295

312

327

80-119

272

271

286

294

311

326

* ADC Calibration Protocol (RS232)

Over 120

271

270

285

293

310

325

11. 10 Point WB
12. Test Pattern
13. EDID D/L
14. Sub B/C
15. Ext. Input Adjust

NO
Item
Enter Adjust Adjust
MODE
Mode In
ADC adjust

ADC Adjust

CMD 1 CMD 2 Data 0


A

When transfer the Mode In,


Carry the command.
Automatically adjustment
(The use of a internal pattern)

Aging chamber
GP4

Adjust Sequence
aa 00 00 [Enter Adjust Mode]
xb 00 40 [Component1 Input (480i)]
ad 00 10 [Adjust 480i Comp1]
xb 00 60 [RGB Input (1024*768)]
ad 00 10 [Adjust 1024*768 RGB]
aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control.

3.2. Function Check

3.2.1. Check display and sound


Check Input and Signal items. (cf. work instructions)
1. TV
2. AV
3. COMPONENT (480i)
4. RGB (PC : 1024 x 768 @ 60hz)
5. HDMI
6. PC Audio In
* Display and Sound check is executed by Remote controller
Caution : Not to push the INSTOP key after completion if the
function inspection.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

* Check the Table Data and the Spec after H/R

- 10 -

Aging time
(Min)

Cool

Medium

Warm

271

270

285

293

313

329

0-5

280

285

294

308

319

340

6-10

276

280

290

303

315

335

11-20

272

275

286

298

311

330

21-30

269

272

283

295

308

327

31-40

267

268

281

291

306

323

41-50

266

265

280

288

305

320

51-80

265

263

279

286

304

318

81-119

264

261

278

284

303

316

Over 120

264

260

278

283

303

315

* Check the Table Data and the Spec after H/R

LGE Internal Use Only

* Connecting picture of the measuring instrument


(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON
Enter the mode of White-Balance, the pattern will come out.

* Manual W/B process using adjust Remote control.

After enter Service Mode by pushing "ADJ" key,


E nter White Balance by pushing "" key at "9. White
Balance".
EZ ADJUST
0. Tool Option1

Whit Balance

1. Tool Option2
2. Tool Option3

Color Temp.

3. Tool Option4

Full White Pattern

R-Gain

4. Tool Option5

CA-210

G-Gain

172

B-Gain

192

7. Country Group

R-Cut

64

8. Area Option

G-Cut

9. ADC Calibration
10. White Balance
11. 10 Point WB
12. Test Pattern
13 EDID D/L

RS-232C Communication

64

B-Cut

64

Test-Pattern

ON

Backlight

100

Reset

172

6. Commercial Tool Option

5. Tool Option6

COLOR
ANALYZER
TYPE : CA-210

Cool

To Set

14. Sub B/C


15. Ext. Input Adjust
16. SPK Lipsync Adjust
17. SPDIF Lipsync Adjust

* Auto-control interface and directions

(1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux).
(2) Adhere closely the Color analyzer(CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color analyzer's prove vertically.(80 ~ 100).
(3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using 'no signal' or 'POWER ONLY' or the others, check
the back light on.

Auto adjustment Map(using RS-232C to USB cable)


RS-232C COMMAND
[CMD ID DATA]
Wb
00 00
White Balance Start
Wb
00 ff
White Balance End

R Gain

RS-232C COMMAND
[CMD ID DATA]
Cool
Mid
Warm
jg
Ja
jd

00

CENTER
(DEFAULT)
MAX
Cool Mid Warm
172
192 192
192

G Gain

jh

Jb

je

00

172

192

192

192

B Gain
R Cut
G Cut
B Cut

ji

Jc

jf

00

192
64
64
64

192
64
64
64

172
64
64
64

192
128
128
128

MIN

<Caution>
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.(When R/G/B Gain are all
C0, it is the FULL Dynamic Range of Module)

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 11 -

For manual adjustment, it is also possible by the following


sequence.
(1) S et TV in Adj. mode using P-ONLY key on remote
controller and then operate heat run longer than 15
minutes.(If not executed this step, the condition for W/B
may be different.)
(2) Push Exit key.
(3) Enter White Balance mode by pushing the ADJ key and
select 9. White Balance When KEY () is pressed, 206
Gray internal pattern will be displayed.
(4) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface
(5) Select each items (Red/Green/Blue Gain) using /(CH
+/-) key on R/C..
(6) Adjust R/ G/ B Gain using /(VOL +/-) key on R/C.
(7) Adjust three modes all (Cool / Medium / Warm)
- For All model w/o LS345
Fix the one of R/G/B gain and change the others
- For G-FIX model (TBD)
Cool Mode
1) Fix the one of R/G/B gain to 192 (default data) and
decrease the others.(If G gain is adjusted over 172
and R and B gain less than 192 , Adjust is O.K.)
2) If G gain is less than 172, Increase G gain by up to
172, and then increase R gain and G gain same
amount of increasing G gain.
3) If R gain or B gain is over 255, readjust G gain less
than 172, Conform to R gain is 255 or B gain is 255
M
 edium / Warm Mode - Fix the one of R/G/B gain to
192 (default data) and decrease the others.
(8) When adjustment is completed, exit adjustment mode
using EXIT key on R/C.

LGE Internal Use Only

* CASE Cool
First adjust the coordinate far away from the target value(x, y).
x, y > target
i) Decrease the R, G.
x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
x > target, y < target
i) First decrease B, so make y a little more than the
target.
ii) Adjust x value by decreasing the R
x < target, y > target
i) F irst decrease B, so make x a little more than the
target.
ii) Adjust x value by decreasing the G
* After You finish all adjustments, Press In-start button and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable.
If it is not same, then correct it same with BOM and unplug
AC cable.
For correct it to the models module from factory JIG model.
* Push The IN STOP KEY after completing the function
inspection.

EDID

EZ ADJUST
0. Tool Option1

HDMI1

NG

1. Tool Option2

HDMI2

NG

2. Tool Option3

HDMI3

NG

3. Tool Option4

RGB

NG

4. Tool Option5
Start

5. Tool Option Commercial

Reset

6. Country Group
7. Area Option

EDID

8. ADC Calibration
9. White Balance
10. 10 Point WB
11. Test Pattern
12. EDID D/L

HDMI1

OK

HDMI2

OK

HDMI3

OK

RGB

13. Sub B/C

OK
Start

Reset

14. Ext. Input Adjust

* EDID data and Model option download (RS232)


NO

Item

Enter download
MODE

Download
Mode In

CMD 1 CMD 2

Data 0

EDID data and


Model option
download

Download

Automatically download
00 10 (The use of a internal
data)

When transfer the Mode


In, Carry the command.

4.4.2. Manual Download

4.2. DDC EDID Write (RGB 128Byte )

Connect D-sub Signal Cable to D-Sub Jack.


Write EDID DATA to EEPROM(24C02) by using DDC2B
protocol.
Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.

<Caution>
(1) Use the proper signal cable for EDID Download
* For HDMI EDID(DVI-D to HDMI or HDMI to HDMI Cable)
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
(2) Never connect HDMI & D-sub Cable at the same time.
(3) Use the proper cables below for EDID Writing.
(4) Download HDMI1, HDMI2 separately because HDMI1 is
different from HDMI2.
For Analog

For HDMI EDID

4.3. DDC EDID Write (HDMI 256Byte)

D-sub to D-sub

DVI-D to HDMI or HDMI to HDMI

4.4. EDID data

No.

Item

1
2
3

Connect HDMI Signal Cable to HDMI Jack.


Write EDID DATA to EEPROM(24C02) by using DDC2B
protocol.
Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.

(1) All Data : HEXA Value


(2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***: Year : Controlled
****: Check sum

Condition

Hex Data

Manufacturer ID

GSM

1E6D

Version

Digital : 1

01

Revision

Digital : 3

03

4.4.1. Auto Download

After enter Service Mode by pushing ADJ key,


Enter EDID D/L mode.
Enter START by pushing OK key.
* Caution : Never connect HDMI & D-sub Cable when EDID
downloaded.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 12 -

LGE Internal Use Only

(1) HD RGB EDID data


00
10
20
30
40
50
60
70

0
0

8
1e
0a
61
50
01
00
20

9
6d
ee
40
a0
1d
1e
20

2 3 4 5 6 7 8
ff ff ff ff ff 0 1e
c
1 3 80 10 9 78 0a
0f 50 54 a1 8 0 81 c0 61
1 1 1 1 1 1 1b 21 50
35 0 a0 5a 0 0 0 1c 1
6e 28 55 0 a0 5a 0 0 0
3e 1f 46 10 0 0a 20 20 20
d
2 3 20 f1 4e 10 1f 84 13
22 15 1 26 15 7 50 9 57
1 1d 80 18 71 1c 16 20 58
0 9e 1 1d 0 80 51 d0 0c
0 0 0 1e 8c 0a d0 8a 20
a0 5a 0 0 0 18 2 3a 80
45 0 a0 5a 0 0 0 1e 1
10 2c 25 80 a0 5a 0 0 0

9
6d
ee
40
a0
1d
1e
20

0f
01
35
6e
3e

1
ff
50
01
00
28
1e

2
ff
01
54
01
40
55
53

3
ff
03
a1
01
84
00
10

4
ff
68
08
01
00
a0
00

5
ff
a0
00
01
00
5a
0a

6
ff
5a
71
1b
00
00
20

7
0
78
40
21
1c
00
20

a3
40
00
72
00
20

54
31
1e
51
00

4c
40
30
d0
fd

a3
40
0
72
0
20

54
31
1e
51
0

14

4c 99 26
40 1 1
30 48 88
d0 1e 20
fd 0 3a
d
1 e
12 20 21

25
40
2d
71
80
0

0
80
10
38
d0
0

a0
35
10
2d
72
0

91
45
51
00
00
20

99
01
48
1e
00

26
01
88
20
3a

4.5. Model name & Serial number D/L

Press "Power on" key of service remote control.


(Baud rate : 115200 bps)
Connect RS232 Signal Cable to RS-232 Jack.
Write Serial number by use RS-232.
Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below)

(2) HD HDMI EDID data


00
10
20
30
40
50
60
70
80
90
A0
B0
C0
D0
E0
F0

0
0

1
ff

5
7
2c
20
e0
18
1d
9e

A
91
45
51
0
0
20

5a
0
3e
40
1c
0

(1) Signal Table


CMD : A0h
LENGTH : 85~94h (1~16 bytes)
CMD

EDID Table

DDC Function

HD/FHD Model

0001

01 00

Analog/Digital

MODEL NAME(HEX)

LG TV

00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)

DATA_1

...

Data_n

CS

DELAY

Adjust mode

CMD(hex)

LENGTH(hex)

Description

EEPROM WRITE

A0h

84h+n

n-bytes Write (n = 1~16)

* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart,
0, Phase
Data write : M odel Name and Serial Number write in
EEPROM,.

b. Serial No: Controlled on production line.


c. Month, Year: Controlled on production line:
ex) Week : '01' -> '01'
Year : '2012' -> '16' fix
d. Model Name(Hex):
cf) TV sets model name in EDID data is below.
Model name

ADL

(2) Comand Set

(3) Detail EDID Options are below


a. Product ID
HEX

ADH

ADH : EEPROM Sub Address high (00~1F)


ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +...+ Data_n
Delay : 20ms

0 0
a0 5a
96 0
58 2c
16 20
0 e

MODEL NAME

LENGTH

(3) Method & notice


1) Serial number D/L is using of scan equipment.
2) Setting of scan equipment operated by Manufacturing
Technology Group.
3) S erial number D/L must be conformed when it is
produced in production line, because serial number D/L
is mandatory by D-book 4.0.

e. Checksum: Changeable by total EDID data.


HD
EDID C/S data
HDMI
RGB
Block 0
A4
A5
5B (HDMI1)
Check sum
(Hex)
Block 1
4B (HDMI2)
3B (HDMI3)
f. Vendor Specific(HDMI)
Input

Model name(HEX)

HDMI1

65030C001000

HDMI2

65030C002000

HDMI3

65030C003000

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 13 -

LGE Internal Use Only

* Manual Download(Model Name and Serial Number)


If the TV set is downloaded by OTA or Service man,
sometimes model name or serial number is initialized.(Not
always)
There is impossible to download by bar code scan, so It
need Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "6.Model Number D/L" like below photo.
3) Input the Factory model name(ex 32LV2510-TB) or Serial
number like photo.

4) Check the model name Instart menu. Factory name


displayed. (ex 32LV2510-TB)
5) Check the Product/Service Info.(Menu Key Red Key
Select Product/Service Info.) Buyer model displayed
(ex 32LV2510-TB)

5.2. IR Out

5.2.1. In using Commercial Check Jig

(1) Check the LED for IR-Out inspection.


* Please refer to the criteria of Judgement.

5.2.2. In using Mini check Jig

4.5. Outgoing condition Configuration

When pressing IN-STOP key by Service remote control,


Red LED are blinked alternatively. And then automatically
turn off. (Must not AC power OFF during blinking)

(1) Connect JIG for inspection to RS-232C port on TV as


below.
(2) Check the LED for IR-Out inspection.
* Please refer to the criteria of Judgement.

5. Check Commercial features

5.1. External SPK Out and Volume control

(1) Connect external speaker to speaker out port with phone


jack on TV side as below.
(2) Check the Max. speaker output is 1W or not. Sine wave
with 1KHz will be displayed.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 14 -

LGE Internal Use Only

TROUBLE SHOOTING GUIDE


1. Check the booting Voltage
Make sure the Stand-by Voltage
P401 3, 5pin : +3.5V_ST

No

Make sure the Power


Connector

No

Exchange the L403

No

Exchange the X201

No

Re- download of Firmware

No

Exchange the circuit board

No

Exchange the IC402/3/7,


Q403

No

Exchange the Q406

Yes

Make sure the disconnection of


Main board 3.5V circuit

Yes

Exchange the
Circuit board

Yes
Make sure the Micom voltage
L403 : +3.5V _ST
Yes
Make sure the CLK of X201
Is 24MHZ
Yes
Make sure the PWR_ON of P401
1pin : 3.5V

No

Exchange the Mstar(IC101)


Or Main board

Yes
Make sure the Multi Voltage
P401 9, 10pin : 24V , 13~15pin : 12V
Yes
Make sure the Output Voltage of IC 402/3/7
IC402: 2.5V, IC403: 1.1V, IC407: 1.5V , Q403: 3.3V
Yes
Make sure the voltage of LVDS Power
Q406: 12V
Yes
Make sure the output of MSTAR LVDS

No

Exchange the Mstar(IC101)


Or Main board

Yes
Make sure the Inverter control and error
P401 2pin: High

No

Exchange the circuit or


check the LCD Module

Yes
Exchange the LCD Module

2. Digital TV Video

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 15 -

LGE Internal Use Only

3. Analog TV Video

4. AV Video

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 16 -

LGE Internal Use Only

5. RGB Video

6. HDMI Video

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 17 -

LGE Internal Use Only

7. Audio of All input

8. TV Audio

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 18 -

LGE Internal Use Only

9. AV Audio

10. RGB Audio

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 19 -

LGE Internal Use Only

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 20 MAX3232

RGB/H/V

CVBS, L/R

L/R

TMDS

TMDS

TI AMP

External SPK Out


L/R

I2S

RS232C

R ear

IRout -Path(Pin 4)

SIF

TU_CVBS

A. AMP
NTP7400

(CAN)

IF

SPK L/R

RS-232C

RGB PC

AV

PC/DVI Audi In

HDMI(DVI) 1/2

Half

NIM

S7LR2

24M

X- tal

TMDS

DP/DM

I2C

DDR3 Data

DDR3 Add.

SPI

PCM_A[0:7]

HDMI3

USB2.0

Side

M24M01 - HRMN6TP
1Mbit

HDCP EEPROM
CAT24WC08W - T

DDR3 1GB
DDR3 1GB Hynic
HynicH5TQ1G63DFR
H5TQ1G63DFR

MX25L8006EM2I

SERIAL FLASH
MXIC (8M bit)

NAND Flash
(1Gbit)
NAND01GW3B2CN6E

LVDS
(60Hz/FHD/HD)

30P
51P

+3.5Vst

IR

LED_R

KEY2

KEY1
CONTROL
IR & LED

BLOCK DIAGRAM

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE

300

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

Set + Stand
Stand Base+Stand

A2

301

A10

500

900

910

200

122

123

530

LV1

540

120

521

510

400

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

- 21 -

LGE Internal Use Only

IC102
NAND01GW3B2CN6E
+3.3V_Normal

/PF_WE
WP
C
B

/PF_WP

NC_11

OS
R106
1K

NC_12

OPT
E Q101
MMBT3904(NXP)

OS
R102
3.3K

NC_13
NC_14
NC_15

35

14
15

34

16

33
32

17
18

31

19

30

20

29

21

28

22

27

23

26

24

25

Y15

1K
OPT

1K

1K
OPT

R152

NC_22

R123

C103
0.1uF
OS

VSS_2

OS

VDD_2

1K

NC_23

PCM_A[0]

OPT

36

AE21
AB21

LED_R
NC_21

I/O3

PCM_A[1]

V20

PCM_A[2]

W22

PCM_A[3]

AB18

PCM_A[4]

AA20

PCM_A[5]

AA21

PCM_A[6]

Y19

PCM_A[7]

AB17

AUD_SCK

OS
AR102

NC_20

W20

Y16

R148

AUD_MASTER_CLK

AB19

AUD_MASTER_CLK_0
PCM_A[3]

OPT
C112
100pF
50V

PCM_A[2]

I/O2

PCM_A[1]

I/O1

56

AB20

PWM0

AA16
AA19

PWM1

AC21

PWM2
PCM_A[0]

I/O0

22

NC_19
NC_18
NC_17

AA17

1K

13

AE20

Y20
R153

PF_ALE

37

OS
C102
10uF

1K

AL

12

AB22
AA15

PCM_A[0-7]
NC_24

R124

CL
/PF_CE1

OPT
R104
10K

38

11

NC_25

NON_OS

NC_10

39

AA18

+3.3V_Normal

R165

NC_9

40

10

PCM_A[4]

R117

OPT
R105
1K

I/O4

1K

VSS_1

41

PCM_A[5]

1K

VDD_1

PCM_A[6]

I/O5

S7LR2_DIVX_MS10
W21

: 4b0000 Boot from 8051 with SPI flash


: 4b0001 Secure B51 without scramble
: 4b0010 Secure B51 with scramble
: 4b0100 Boot from MIPS with SPI flash
: 4b0101 Boot from MIPS with SPI flash
: 4b0110 Boot from MIPS with SPI flash
: 4b1001 Secure MIPS without scramble
: 4b1010 Scerur MIPS with SCRAMBLE

R121

+3.3V_Normal

NC_8

42

I/O6

B51_no_EJ
SB51_WOS
SB51_WS
MIPS_SPE_NO_EJ
MIPS_SPI_EJ_1
MIPS_SPI_EJ_2
MIPS_WOS
MIPS_WS

R118

OS
C101
0.1uF

OPT
R108
1K

PCM_A[7]

1K

NC_7

43

I/O7

OPT

E
/PF_CE0

NC_26

1K

R
/PF_OE

44

OPT

/F_RB

45

<CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)

R115

RB

IC101
LGE2111A-T8
PCM_A[0-7]

OS
22
AR101

NC_27

R103

NC_6

46

47

1K

NC_5

1b0
1b1

NC_28

1K

NC_4
OS
R109
3.9K

OS
R107
1K

48

OPT

NC_3

1
NAND_FLASH_1G_NUMONYX
EAN60762401
2

R110

NC_2

<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH)
Boot from SPI_CS0N(INT_FLASH)

+3.3V_Normal
NC_29

10V

NC_1

R116

NAND FLASH MEMORY

AB15
AA22
AD22

NC_16

AD20
AD21
AC20
Y18
Y21
Y22

EAN35669102
NAND_FLASH_1G_HYNIX
IC102-*1
H27U1G8F2BTR-BC

NC_1
NC_2
NC_3

48

47
46

NC_4
NC_5
NC_6
R/B

45

44

43

RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12

42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29
28

21

NC_13

27

22

NC_14
NC_15

EAN61508001

EAN61857001
NAND_FLASH_1G_SS
IC102-*2
K9F1G08U0D-SCB0

23

26

24

25

NC_29

NC_1

NC_28

NC_2

NC_27

NC_3

NC_26

NC_4

I/O7

NC_5

I/O6

NC_6

I/O5

R/B

I/O4

RE

NC_25

CE

NC_24

NC_7

NC_23

NC_8

VCC_2

VCC_1

VSS_2

VSS_1

NC_22

NC_9

NC_21

NC_10

NC_20

CLE

I/O3

ALE
WE

I/O2
I/O1

WP

I/O0

NC_11

NC_19

NC_12

NC_18

NC_13

NC_17

NC_14

NC_16

NC_15

IC102-*3
TC58NVG0S3ETA0BBBH

48

47
46

3
4

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29
28

21

27

22
23

26

24

25

NC_29

NC_1

NC_28

NC_2

NC_27

NC_3

NC_26

NC_4
NC_5

I/O7
I/O6

NC_6

I/O5

RY/BY

I/O4

RE

NC_25

CE

NC_24

NC_7

NC_23

NC_8

VCC_2

VCC_1

VSS_2

VSS_1

NC_22

NC_9

NC_21

NC_10

NC_20

CLE

I/O3

ALE
WE

I/O2
I/O1

WP

I/O0

NC_11

NC_19

NC_12

NC_18

NC_13

NC_17

NC_14

NC_16

NC_15

48

47
46

3
4

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29
28

21

27

22
23

26

24

25

NC_29
NC_28
NC_27
NC_26
I/O8
I/O7
I/O6
I/O5
NC_25
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O4
I/O3
I/O2
I/O1
NC_19
NC_18
NC_17
NC_16

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15

48

47
46

3
4

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14

35
34

15

33

16
17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

NC_29
NC_28
NC_27
NC_26
I/O7
I/O6
I/O5
I/O4
NC_25
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RY/BY
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15

48

47
46

3
4

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

NC_29

NC_1

NC_28

NC_2

NC_27

NC_3

NC_26

NC_4

I/O8

NC_5

I/O7

NC_6

I/O6

R/B

I/O5

RE

NC_25

CE

NC_24

NC_7

NC_23

NC_8

VCC_2

VCC_1

VSS_2

VSS_1

NC_22

NC_9

NC_21

NC_10

NC_20

CLE

I/O4

ALE
WE

I/O3
I/O2

WP

I/O1

NC_11

NC_19

NC_12

NC_18

NC_13

NC_17

NC_14

NC_16

NC_15

48

47

46

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

NC_27

USB2_CTL

I/O7

D4

I/O4

RJP_CTRL0

NC_25

MSTAR (IC101) Multi package (11.11.18~)

NC_24

PM_TXD

VSS_2

TE(US)_Multi
IC101-*5
LGE2111A-TE

NC_22
NC_21

C7

I/O3

E6
I/O2

F5

I/O1

B6

I/O0

D5

NC_19

B7

E5

E7
NC_18

F7

NC_17

AB5
AB3

NC_16

A9
F4

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N

LVB4P

LVACKP

NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15

47
46
45

44

43

42

41

40

10

39

11

38

12

37

13

36
35

14
15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

T8(EU)_Multi
IC101-*6
LGE2111A-T8

VD(CN)_Multi
IC101-*7
LGE2111A-VD

W1(KR)_Multi
IC101-*8
LGE2111A-W1 [MULTI]

NC_20

LVB3P

48

N25
N24

VCC_2

LVB4N

E4

RJP_CTRL1

NC_23

LVB3N

LVACKN

NC_29

LVBCKP

NC_28

LVBCKN

NC_27
GPIO196

NC_26

GPIO193
GPIO194

I/O7

GPIO195

I/O6

AB25

C7

AB23

E6

AC25
AB24

F5
B6

AD25

E5

AC24

D5

AE23

B7

AC23

E7

AC22

F7

AD23

AB5
AB3

V23

A9

U24

F4

V25

AB1

V24

N6

W25

AB2

W23

AC2

AA23

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N
LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N

Y23

F4

V25

AB1

V24

N6

W25

AB2

W23

AC2

LVA1P
LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P
LVB3N
LVB4P
LVB4N
LVACKP

AD24

LVACKN

Y23

LVBCKP

W24

GPIO196
GPIO193
GPIO194

T23

A9

LVA0N

GPIO38
GPIO39

AE24

LVBCKP

U23
T24

AB5

V23
U24

GPIO37

AA24

LVBCKN

T25

F7

AD23

LVA0P

AA25

LVACKN

W24

E7

AC22

AA23

LVACKP

AD24

B7

GPIO36

Y24

LVB4N

AE24

E5
D5

AE23

AB3

LVB4P

AA24

F5
B6

AD25
AC24
AC23

LVB3N

AA25

E6

AB24

LVB3P

Y24

C7

AC25

GPIO50
GPIO51

AB25
AB23

GPIO195

LVBCKN

T25

GPIO196

U23

GPIO193

T24

GPIO194

T23

GPIO195

AB25

C7

AB23

E6

AC25
AB24

F5
B6

AD25

E5

AC24

D5

AE23

B7

AC23

E7

AC22

F7

AD23

AB5
AB3

V23

A9

U24

F4

V25

AB1

V24

N6

W25

AB2

W23

AC2

AA23

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P

Y24

LVB3N

AA25

LVB4P

AA24

LVB4N

AE24

LVACKP

AD24

LVACKN

Y23

LVBCKP

W24

LVBCKN

T25

GPIO196

U23

GPIO193

T24

GPIO194

T23

GPIO195

PM_RXD

for SYSTEM EEPROM


(IC104)

B8

MODEL_OPT_6

A8

MODEL_OPT_7

AB25
AB23

I2C_SCL

AC25
AB24

I2C_SDA

AD25
AE23

R136

22

P23

R137

22

P24

AC23

D2

RGB_DDC_SDA

AC22
AD23

D1

RGB_DDC_SCL

V24

P21

W25

PWM0

W23
AA23

PWM1

Y24
AA25
AA24

PWM2

AE24

EXT_SPK_DET

AD24

RJP_CTRL2

Y23
W24

NF_CEZ/GPIO137
PCMADR[0]/GPIO125

NF_CLE/GPIO136

PCMADR[1]/GPIO124

NF_REZ/GPIO139

PCMADR[2]/GPIO122

NF_WEZ/GPIO140

PCMADR[3]/GPIO121

NF_ALE/GPIO141

PCMADR[4]/GPIO99

NF_RBZ/GPIO142

N23
P22
R21
P20
F6

LED_R

T23

H6
G5
G4
J5
J4

VCC_2

S7LR2_DIVX_AT_ASE
IC101-*1
LGE2111A-TE

NC_22

S7LR2_DIVX_AT_SPIL
IC101-*2
LGE2111A-TE SPIL

S7LR2_DIVX_DTS_AT
IC101-*3
LGE2111A-W1

S7LR2_DIVX_CN
IC101-*4
LGE2111A-VD

R23

NC_21
NC_20
C7

I/O3

E6
F5

I/O2

B6

I/O1

E5
D5

I/O0

B7

NC_19

E7
F7

NC_18

AB5

NC_17

AB3
A9

NC_16

F4
AB1
N6
AB2
AC2

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P
LVB3N
LVB4P
LVB4N

+3.3V_Normal

LVACKP
LVACKN
LVBCKP
LVBCKN
GPIO196
GPIO193
GPIO194
GPIO195

AB25
AB23

C7
E6

AC25

F5

AB24

B6

AD25

E5

AC24

D5

AE23

B7

AC23

E7

AC22

F7

AD23

AB5
AB3

V23

A9

U24

F4

V25

AB1

V24

N6

W25

AB2

W23

AC2

AA23

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

AB25

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N

U24

F4

V25

AB1
N6

W25

AB2

W23

AC2

LVA2P
LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P
LVB3N
LVB4P
LVB4N
LVACKP
LVACKN
LVBCKP

W24

GPIO196

T24

A9

LVA1N

GPIO41

Y23

GPIO193
GPIO194

T23

F7
AB5

GPIO39
GPIO40

AE24

LVBCKN

U23

AC22
AD23

LVA1P

AD24

LVBCKP

T25

E7

LVA0N

GPIO38

AA24

LVACKN

W24

B7

LVA0P

GPIO37

Y24

LVACKP

Y23

D5

AC23

GPIO36

AA25

LVB4N

AE24

E5

AC24
AE23

AA23

LVB4P

AD24

AD25

V24

LVB3N

AA24

F5
B6

V23

LVB3P

Y24
AA25

E6

AB24

AB3

GPIO50
GPIO51

C7

AB23
AC25

GPIO195

LVBCKN

T25

GPIO196

U23

GPIO193

T24

GPIO194

T23

GPIO195

AB25
AB23

C7
E6

AC25

F5

AB24

B6

AD25

E5

AC24

D5

AE23

B7

AC23

E7

AC22

F7

AD23

AB5
AB3

V23

A9

U24

F4

V25

AB1

V24

N6

W25

AB2

W23

AC2

AA23
Y24
AA25
AA24
AE24
AD24
Y23
W24
T25
U23
T24
T23

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P
LVB3N
LVB4P
LVB4N
LVACKP
LVACKN
LVBCKP
LVBCKN
GPIO196
GPIO193
GPIO194
GPIO195

AB23

R24

AC25
AB24

R25

AD25
AC24

T21

AE23
AC23

T22

AC22
AD23

PCMADR[7]/GPIO103
PCMADR[8]/GPIO108
GPIO_PM[0]/GPIO6

PCMADR[9]/GPIO110
PCMADR[10]/GPIO114

PM_UART_TX/GPIO_PM[1]/GPIO7

PCMADR[11]/GPIO112

GPIO_PM[2]/GPIO8

PCMADR[12]/GPIO104

GPIO_PM[3]/GPIO9

PCMADR[13]/GPIO107

GPIO_PM[4]/GPIO10

PCMADR[14]/GPIO106

PM_UART_RX/GPIO_PM[5]/GPIO11
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
GPIO_PM[7]/GPIO13

PCMREG_N/GPIO123

GPIO_PM[8]/GPIO14
GPIO_PM[9]/GPIO15

PCMOE_N/GPIO113
PCMWE_N/GPIO197

PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
GPIO_PM[11]/GPIO17

PCMIORD_N/GPIO111
PCMIOWR_N/GPIO109

PM_SPI_SCK/GPIO1
PCMCE_N/GPIO115

PM_SPI_CZ0/GPIO_PM[12]/GPIO0

PCMIRQA_N/GPIO105
PCMCD_N/GPIO130

PM_SPI_SDI/GPIO2
PM_SPI_SDO/GPIO3

IC104-*3
M24512-RMN6TP

E2

VSS

+3.3V_Normal

I2C_SCL
A1

VSS

SDA

R129
22
HDCP_EEPROM

I2C_SDA

GND

PM_RXD

33

/SPI_CS
/FLASH_WP

M6
M5

PANEL_CTL

C1

PM_MODEL_OPT_0

M4

AMP_MUTE
A2

R147

33

SPI_SCK

D3
B2
B1

R151

SPI_SDI

33

for SERIAL FLASH

EAN61133501

TS0CLK/GPIO87
PCM2_CE_N/GPIO131
PCM2_IRQA_N/GPIO132

TS0VALID/GPIO85
TS0SYNC/GPIO86

PCM2_CD_N/GPIO135
PCM2_WAIT_N/GPIO133

TS0DATA_[0]/GPIO77

PCM2_RESET/GPIO134

TS0DATA_[1]/GPIO78
TS0DATA_[2]/GPIO79

UART1_TX/GPIO43

TS0DATA_[3]/GPIO80

UART1_RX/GPIO44

TS0DATA_[4]/GPIO81

UART2_TX/GPIO65

TS0DATA_[5]/GPIO82

UART2_RX/GPIO64

TS0DATA_[6]/GPIO83

UART3_TX/GPIO47

TS0DATA_[7]/GPIO84

UART3_RX/GPIO48
TS1CLK/GPIO98
I2C_SCKM2/DDCR_CK/GPIO72
I2C_SDAM2/DDCR_DA/GPIO71

TS1VALID/GPI96
TS1SYNC/GPIO97

Y14
AA10
Y12
Y13
Y11
AA12
AB12
AA14
AB14
AA13
AB11
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC

AC15
AD15

FE_TS_DATA[0-7]

AC16

DDCA_DA/UART0_TX

TS1DATA_[0]/GPIO88

DDCA_CK/UART0_RX

TS1DATA_[1]/GPIO89
TS1DATA_[3]/GPIO91

PWM0/GPIO66

TS1DATA_[4]/GPIO92

PWM1/GPIO67

TS1DATA_[5]/GPIO93

PWM2/GPIO68

TS1DATA_[6]/GPIO94

PWM3/GPIO69

TS1DATA_[7]/GPIO95

AD16

FE_TS_DATA[0]

AE15

FE_TS_DATA[1]

AE14

FE_TS_DATA[2]

AC13
AC14

FE_TS_DATA[3]
FE_TS_DATA[4]

AD12

FE_TS_DATA[5]

AD13

FE_TS_DATA[6]
FE_TS_DATA[7]

AD14

VCC

WC

A0

A1

SCL

SDA

A2

GND

EAN43349003

PWM_PM/GPIO199

SAR0/GPIO31
SAR1/GPIO32
SAR2/GPIO33
SAR3/GPIO34
SAR4/GPIO35

VSYNC_LIKE/GPIO145
SPI1_CK/GPIO201
SPI1_DI/GPIO202
SPI2_CK/GPIO203
SPI2_DI/GPIO204

Y24
AA24
AE24
AD24
Y23
W24

S7LR2_DIVX_MS10
IC101
LGE2111A-T8

T25
U23
T24
T23

C7
E6
F5

5V_DET_HDMI_2

B6

5V_DET_HDMI_4

E5

AV_CVBS_DET

D5

B7

VCC

E7
WP

F7

RJP_CTRL3

SCL

AB5

SDA

MODEL_OPT_1
AMP_SCL
+3.5V_ST

AMP_SDA

EAN43349004

MODEL_OPT_2

IC104-*1
M24256-BRMN6TP

VCC

E0

WP

IC104-*2
R1EX24256BSAS0A
VCC

A0

WC

A1

SCL

R111

SDA

R112
C104
8pF
OPT

C106
8pF
OPT

22
22

I2C_SCL

E1

E2

I2C_SDA

SCL

A2

10K

NVRAM_RENESAS

NVRAM_ST

SCL

A9
F4
R172

R173OPT

OPT

AB1
N6
AB2
AC2

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P
LVB3N

R177
10K
OPT

LVB4P
LVB4N

PM_MODEL_OPT_0
PM_MODEL_OPT_1

VCC

WP

AB3

MODEL_OPT_0

RJP_CTRL4

C105
0.1uF

LVACKP
LVACKN
LVBCKP

R176
10K
12_SUB

LVBCKN
GPIO196

VSS

SDA

VSS

SDA

GPIO193
GPIO194

EAN61548301

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

Internal demod out

PWM4/GPIO70

GPIO195

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SPI_SDO

AA25

IC104-*4
AT24C512C-SSHD-T

A0h
A2

R146

L5

AA23

TOUCH_KEY

IC104
AT24C256C-SSHL-T
NVRAM_ATMEL
A0

C2

W25

R174

R127
4.7K
HDCP_EEPROM
HDCP_EEPROM
22
R128
6 SCL

POWER_ON/OFF_1

L6

W23

TACT_KEY

EEPROM

8
7

RL_ON

K4

V24

R175 10K

A2

INV_CTL

J6

U24

PM MODEL OPTION

WP

PM_TXD

K5

PCM_RESET/GPIO129

TUNER_RESET

POWER_DET

K6

PCMWAIT_N/GPIO100

DSUB_DET

E1

A1

H5

V25

NON_OS_512k_ST NON_OS_512k_ATMEL

E0

HDCP_EEPROM
C107
0.1uF

/F_RB

V23

I2C_SCL

IC103

PF_ALE

AD19

PCMADR[6]/GPIO102

5V_DET_HDMI_1

I2C_SDA

HDCP_EEPROM CAT24WC08W-T
R113
4.7K
A0
VCC

/PF_WE

AE17

R145
2.2K

AMP_SCL

HDCP_EEPROM

/PF_OE

AD17

AR104
22
OS

AMP_RESET

Addr:10101--

/PF_CE1

AC19

PCMADR[5]/GPIO101

PWM2

+3.3V_Normal

/PF_CE0

AC18

AB25

AMP_SDA

HDCP EEPROM

/PF_WP

AD18

U23

SUB_AMP_MUTE

VSS_2

AC17

T24

NC_23

R144
2.2K

NF_WPZ/GPIO198

AE18

T25

NC_24

R140 R141
1K
1K

NF_CE1Z/GPIO138

PCMDATA[7]/GPIO116

TS1DATA_[2]/GPIO90

KEY2

100

PCMDATA[6]/GPIO117

V25

KEY1

R157

PCMDATA[5]/GPIO118

V23

NC_25

PWM_DIM

OS
AR103
22

PCMDATA[4]/GPIO119

U24

I/O4

I2C

PCMDATA[3]/GPIO120

AC24

I/O5

DIMMING

PCMDATA[2]/GPIO128

I/O5

IC102-*7
H27U1G8F2CTR-BC

U22

I/O6

EAN35669103
NAND_FLASH_1G_HYNIX_NEW

T20

NC_26

AC2

NC_4

R20

USB2_OCD

N6

NC_2

V21

USB1_CTL

NC_28

AB2

NC_3

U21

USB1_OCD

NC_29

AB1

NC_1

PCMDATA[1]/GPIO127

EAN60708702
NAND_FLASH_2G_HYNIX_NEW
IC102-*6
H27U2G8F2CTR

EAN60991001
NAND_FLASH_2G_TOSHIBA
IC102-*5
TC58NVG1S3ETA00

EAN60708701
NAND_FLASH_2G_HYNIX_OLD
IC102-*4
HY27UF082G2B-TPCB

NAND_FLASH_1G_TOSHIBA_NEW

PCMDATA[0]/GPIO126

AB25

RXA0+

AB23

RXA0-

AC25

RXA1+

AB24

RXA1-

AD25

RXA2+

AC24

RXA2-

AE23

RXA3+

AC23

RXA3-

AC22

RXA4+

AD23

RXA4-

V23

RXB0+

U24

RXB0-

V25

RXB1+

V24

RXB1-

W25

RXB2+

W23

RXB2-

AA23

RXB3+

Y24

RXB3-

AA25

RXB4+

AA24

RXB4-

AE24

RXACK+

AD24

RXACK-

Y23

RXBCK+

W24

RXBCK-

T25

MODEL_OPT_3

U23

MODEL_OPT_4

T24

MODEL_OPT_5

T23

EAN62389501

LA2AW
FLASH/EEPROM/GPIO

2012.09.11
1

LGE Internal Use Only

MODEL OPTION
HIGH

PHM_ON

MODEL_OPT_2

AB2

NON_DVB_T2

DVB_T2

MODEL_OPT_3

T25

NON_3D

3D

MODEL_OPT_4

U23

NON_OLED

OLED

MODEL_OPT_5

T24

NON_DVB_S

DVB_S

MODEL_OPT_6

B8

NON_120HZ

120HZ

MODEL_OPT_7

A8

+1.10V_VDDC

MODEL_OPT_5
MODEL_OPT_6

R4039 OPT 100

OPC&SCANNING_CTRL

1K

Close to MSTAR
R288
FHD

PHM_OFF

1K

C4068-*1
68pF

100

C257

100

C258

0.1uF

G9

CK+_HDMI1

J3

CK-_HDMI1

K3

D0+_HDMI1

J1

D0-_HDMI1
D1+_HDMI1

K2
K1

D1-_HDMI1

L2

D2+_HDMI1

L3

D2-_HDMI1

T5

DDC_SDA_1

T4

DDC_SCL_1

V5

HPD1

RXACKP
RXACKN

VIFP
VIFM

RXA0P
RXA0N

IP

RXA1P

IM

RXA1N
RXA2P
RXA2N

SIFP
SIFM

0.1uF

10uF
C284

K11
L10
M12
M13
N12
P14
R10
R14

FB_CORE

R15

AVDD_AU33
+3.3V_Normal

AE3

T10
L208
BLM18PG121SN1D

L227
BLM18PG121SN1D
HALF_NIM/EU_NON_T2

AD4

P10

C241
0.1uF

C240
0.1uF

P19

FB_CORE

HALF_NIM/EU_NON_T2
R4019
10K
HALF_NIM/EU_NON_T2
R4004
0

AD2

R16
L11
M14

MIUVDDC

HDMI

AE9

CK+_HDMI4

AC9

CK-_HDMI4

AC10

D0+_HDMI4

AD9

D0-_HDMI4
D1+_HDMI4

AC11
AD10

D1-_HDMI4

AE11

D2+_HDMI4

AD11

D2-_HDMI4

AE8

DDC_SDA_4

AD8

DDC_SCL_4

AC8

HPD4

F2

CK+_HDMI2

F3

CK-_HDMI2

G3

D0+_HDMI2

F1

D0-_HDMI2
D1+_HDMI2

G2
G1

D1-_HDMI2

H2

D2+_HDMI2

H3

D2-_HDMI2

R6

DDC_SDA_2

U6

DDC_SCL_2

P5

HPD2

R4

CEC_REMOTE_S7

AE6

W9

AVDD2P5

W10
W11

TU_SCL

AD6

W12

TU_SDA

Close to MSTAR

DSUB_HSYNC

DSUB

DSUB_VSYNC
DSUB_R+
DSUB_G+

R3

R228

33

C204

0.047uF

N2

R229

68

C205

0.047uF

P3

R230

33

C206

0.047uF

N3

R231

68

C207

0.047uF

N1

R232

33

C208

0.047uF

M3

R233

68

C209

0.047uF

M2

C210

1000pF

M1

2.4K

10K

R4023

R4026

DSUB_B+

P2

AC1

HOTPLUGB/GPIO20
RXCCKP
RXCCKN

SPDIF_IN/GPIO152
SPDIF_OUT/GPIO153

X201
24MHz

22pF

RXC1P
RXC1N

USB0_DM
USB0_DP

RXC2P
RXC2N
DDCDC_DA/GPIO28

USB1_DM
USB1_DP

U19

22pF

I2S_IN_BCK/GPIO150
RXDCKP
RXDCKN

I2S_IN_SD/GPIO151
I2S_IN_WS/GPIO149

RXD0P
RXD0N

I2S_OUT_BCK/GPIO156

RXD1P

I2S_OUT_MCK/GPIO154

RXD1N

I2S_OUT_SD/GPIO157

D6

R213

100

W14

AVDD25_PGA

SPDIF_OUT
AVSS_PGA

E3

U7

AVDD_NODIE

USB2_DM
USB2_DP

E2

W15

+2.5V_Normal

L7

VDD33

AC12
USB1_DM

AE12

M7

L211
BLM18PG121SN1D

P7

USB1_DP

R7
C269
10uF

C8
AMP_SCL

D8

C273
0.1uF

C274
0.1uF

C4045

AMP_SDA

D9

AVDD_AU33
AUD_SCK

C9

AVDD25_PGA:13mA

AUD_MASTER_CLK_0

B9

VDD33

L229
BLM18PG121SN1D

AUD_LRCH

C4070
0.1uF
16V

HSYNC0

AUL1

VSYNC0

AUR1

RIN0P

AUL2

RIN0M

AUR2

GIN0P

AUL3

GIN0M

AUR3

BIN0P

AUL4

BIN0M

AUR4

W7

C10

R19

AUD_LRCK

W19

VDD33

AUR0

V7

W18

HOTPLUGD/GPIO22
CEC/GPIO5

M19

T19

I2S_I/F
I2S_OUT_WS/GPIO155

1uF

AVDD2P5_MOD

B10

RXD2N
DDCDD_CK/GPIO29

V19

V3
U3
U2
T1
T2
R2
R1
T3

Y9

C246

2.2uF

AA9

C247

2.2uF

AVDD_MIU
L219
BLM18PG121SN1D

AV_COMP_PC_L_IN

AA7

J17
K15
K16

AV_COMP_PC_R_IN

L15

AB8

C4027
0.1uF

Y8
Y10

K17
L17

L223

AC7

M17

AVSS_PGA
BLM18SG121TN1D

AD7

L16

HSYNC1
VSYNC1

AUOUTL0

RIN1P

AUOUTL2

RIN1M

AUOUTL3

GIN1P

AUOUTR0

GIN1M

AUOUTR2

BIN1P

AUOUTR3

V6

A23

V4
Y7

B17

W5

R202
0

U5

C23

DDR3 1.5V

EXT_SPK

TP208

A5
C11
C19

EXT_SPK

C22

SOGIN1

D14

W1

HSYNC2
RIN2P

L202
BLM18SG121TN1D

SOGIN2
EARPHONE_OUTL

R244

TU_CVBS

33

C225

0 . 0 4 7 u F AA8
Y4

R246

AV_CVBS_IN

33

C227

0 . 0 4 7 u F W4
AA5
Y5
AA4
Y6
AA1

C203
1000pF
OPT

R252

68

C233

0.047uF

AB4

Close to MSTAR

EARPHONE_OUTR

C263
10uF

EXT SPEAKER

AC6
AA6

OPT

AB6

OPT

0
R204
0
R214

L203
L205

ET_RXD[0]/RP/GPIO60

CVBS3

ET_TXD[0]/TP/GPIO57

CVBS4
CVBS5
CVBSOUT0

ET_RXD[1]/RN/GPIO63
ET_TXD[1]/LED1/GPIO56

CVBSOUT1
ET_TX_CLK/TN/GPIO59
VCOM

5.6uHEXT_SPK
5.6uHEXT_SPK
OPT

CVBS2

ET_TX_EN/GPIO58
ET_MDC/GPIO61
ET_MDIO/GPIO62

C6

L268
4.7uF
OPT
10V

ARC0
HWRESET

C5

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

G8

AVDD_DDR1:55mA

H8
N22

L272
4.7uF
10V

N21
N20
M22

A6

M21

C4

M20

SOC_RESET

B5

POWER_DET_RESET

C3

F10

A3
B3

N4
T6
N5

R210

33

HDMI1_ARC

C231

0.047uF

HDMI1_ARC

IR

C202
4.7uF
10V
RESET_IC_SOC_RESET

W16
V8
T18

RESET_IC_SOC_RESET
R215
470

B4

V15

SWICH
+3.5V_ST SW200
JTP-1127WEM

C200
4.7uF
10V

STby 3.5V

SWICH
R205
100

+1.10V_VDDC

AVDD_NODIE:7.362mA
R217
10
SOC_RESET

HDMI_ARC
SOC_RESET
R200
62K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

F19

EXT_AMP_R

+3.5V_SOC_RESET

IRIN/GPIO4

F17

EXT_AMP_L

ET_COL/LED0/GPIO55

F8
F18

CVBS0
CVBS1

E22

1uF

C256
0.1uF

0.1uF

AUVRP

C253
1uF

C4042

BIN2M

C249
4.7uF
AE5

0.1uF

AUVAG

E19
C4009

BIN2P

AD5
C4038

GIN2M

E18

10uF

AUVRM

E17

C278

RIN2M

CVBS In/OUT

L209
BLM18PG121SN1D

0.1uF

W3

D19

C4046

V1

D18

AVDD_MIU

Y3

VDDC_7

GND_40

VDDC_8

GND_41

VDDC_9

GND_42

VDDC_10

GND_43

VDDC_11

GND_44

VDDC_12

GND_45

VDDC_13

GND_46

VDDC_14

GND_47
GND_49

AVDD1P0

GND_50

FB_CORE

GND_51

AVDDL_MOD

GND_52

AVDD10_LAN

GND_53

DVDD_DDR

GND_54
GND_56

AVDD2P5_ADC_1

GND_57

AVDD2P5_ADC_2

GND_58

AVDD2P5_ADC_3

GND_59

AVDD25_REF

GND_60
GND_61
GND_62

AVDD25_LAN

GND_63
AVDD_MOD_1

GND_64

AVDD_MOD_2

GND_65
GND_67

AVDD25_PGA

GND_68

AVSS_PGA

GND_69
GND_70
GND_71

AVDD_NODIE

GND_72
AVDD_DVI_USB_1

GND_73

AVDD_DVI_USB_2

GND_74

AVDD3P3_MPLL

GND_75

AVDD_DMPLL

GND_76
GND_77
GND_78

DVDD_NODIE

GND_79
AVDD_AU33

GND_80

AVDD_EAR33

GND_81
GND_82

VDDP_1

GND_83

VDDP_2

GND_84
GND_85

AVDD_LPLL_1

GND_86

AVDD_LPLL_2

GND_87
GND_88
GND_89

VDDP_NAND

GND_91
AVDD_DDR0_D_1

GND_92

AVDD_DDR0_D_2

GND_93

AVDD_DDR0_D_3

GND_94

AVDD_DDR0_C

GND_95
GND_96

AVDD_DDR1_D_1

GND_97

AVDD_DDR1_D_2

GND_98

AVDD_DDR1_D_3

GND_99
GND_100

AVDD_DDR1_C

GND_101

R201
0

BIN1M

GIN2P

GND_39

GND_102
GND_103

GND_EFUSE

GND_104

W2

GND_38

VDDC_6

W6

AA3

VDDC_5

Close to IC with width trace

SOGIN0

+1.5V_DDR

Y2

GND_37

AVDD25_PGA

AUDIO IN

AA11

AVDD_DDR0:55mA
AA2

VDDC_4

GND_90

AB9

E9
V2

GND_36

AVDD2P5

RXD2P
DDCDD_DA/GPIO30

GND_35

VDDC_3

GND_66

DDCDC_CK/GPIO27
HOTPLUGC/GPIO21

VDDC_2

D7

Normal 2.5V

RXC0N

V18

AVDD2P5_MOD
C262

RXC0P

AUL0
R4024 510
R4025 510

C261

AD1
1M

XOUT

GND_34

GND_55

C4065
0.047uF
25V
HALF_NIM/EU_NON_T2

OPT
R4001
0

TUNER_I2C

R287

R5

PM_MODEL_OPT_1

GND_33
VDDC_1

IF_AGC_MAIN

AE2

Y17
XIN

GND_32

AVDDLV_USB

GND_48

AC5

HOTPLUGA/GPIO19

I2C_SCKM1/GPIO75

K10

P15

AC3

DDCDA_CK/GPIO23

I2C_SDAM1/GPIO76

C264
1000pF
OPT

ANALOG SIF
Close to MSTAR

AD3

HALF_NIM/EU_NON_T2
C4064
0.1uF

RF_AGC

47

AC4

DDCDA_DA/GPIO24

IF_AGC

TU_SIF

C4044

J2

0 . 1 u F R4003

C4043

C251

S7LR2_DIVX_MS10

47

0.1uF

HALF_NIM/EU_NON_T2
C4069
100pF

0 . 1 u F R4002

H9

L204
BLM18PG121SN1D

IF_N_MSTAR

IC101
LGE2111A-T8

K12

VDD33

+3.3V_Normal

HALF_NIM/EU_NON_T2
C4068
100pF

HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2

C250

0.1uF

S7LR2_DIVX_MS10

Normal Power 3.3V

IF_P_MSTAR

OPT

IC101
LGE2111A-T8

+1.10V_VDDC

DTV_IF

0.1uF
C4067

R289

1uF

C4069-*1
68pF

HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2

R227

R212

NON_DVB_T2

1K

1K
NON_3D

R209

R207

NON_OLED

1K

1K

NON_DVB_S

R4029

R4030

1K
R294

1K

NON_120HZ

R293

HALF_NIM/ASIA HALF_NIM/ASIA

* Dual Stream is only Korea 3D spec

MODEL_OPT_7

OS_DualStream(X)/NonOS_ErrorOut(O)

OS:NON_DualStream OS:DualStream
NonOS:ErrorOut
NonOS:NON_ErrorOut

0.1uF

MODEL_OPT_4

C4012

MODEL_OPT_3

C4001 10uF

MODEL_OPT_2

C283

MODEL_OPT_1

C280

MODEL_OPT_0
RF_SW_BR_OPT
R203 100
RF_SWITCH_CTL

+1.10V_VDDC

0.1uF

PHM_OFF

0.1uF

F4

C4025

MODEL_OPT_1

HD

C4020

FHD

1uF

LOW

AB3

C277

PIN NO.

MODEL_OPT_0

10uF

1K
HD

1K
PHM_ON

R226

R211

1K
DVB_T2

1K
3D
R206

R208

1K
OLED

1K

R291

1K

DVB_S

R290

R4027

OS_DualStream(O)/NonOS_ErrorOut(X)

R4028

120HZ

1K

MODEL OPTION

10uF

PIN NAME

+3.3V_Normal

C275

+2.5V_Normal

C228

+3.3V_Normal

C201
0.1uF

GND_105
GND_1

GND_106

GND_2

GND_107

GND_3

GND_108

GND_4

GND_109

GND_5

GND_110

GND_6

GND_111

GND_7

GND_112

GND_8

GND_113

GND_9

GND_114

GND_10

GND_115

GND_11

GND_116

GND_12

GND_117

GND_13

GND_118

GND_14

GND_119

GND_15

GND_120

GND_16

GND_121

GND_17

GND_122

GND_18

GND_123

GND_19

GND_124

GND_20

GND_125

GND_21

GND_126

GND_22

GND_127

GND_23

GND_128

GND_24

GND_129

GND_25

GND_130

GND_26

GND_131

GND_27

GND_132

GND_28

GND_133

GND_29

GND_134

GND_30

GND_135

GND_31

GND_136

G10
G11
G12
G13
G14
G17
G18
G19
G24
H11
H12
H13
H14
H15
H16
H17
H18
H19
J9
J10
J11
J12
J13
J14
J15
J16
J18
J19
J25
K9
K13
K14
H10
K18
K19
K22
L8
L9
J8
L12
L13
L18
L19
M8
K8
M10
M11
L14
M15
M16
M18
M25
N10
N11
N13
N14
N15
N16
N17
N19
K7
P8
P9
M9
P11
P13
P16
P17
P18
P12
R8
R9
R11
R12
R13
R17
T8
T9
N7
T11
T12
T13
T14
T15
T16
T17
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
R18
V9
V10
V11
V12
V14
V17
T7
E8

MIUVDDC

L228
BLM18PG121SN1D

+3.5V_ST

AVDD_NODIE
L206
BLM18PG121SN1D
C286
0.1uF

C4071
10uF

C4062
0.1uF

C252
0.1uF

LA2AW
POWER,IN/OUT,H/W OPT

2012.09.11
2

LGE Internal Use Only

+3.5V_ST --> 3.375V --> 3.46V

+12V

PANEL_POWER
L409
120
CIS21J121

0.01uF
C423
0.01uF
50V

OPT
C428
10uF
25V

C424
0.1uF
25V

Q406
AO3407A

S
+3.5V_ST

Q402

+3.5V_ST
R416
1K

VCC

GND
PWR_DET_ON_DIODES
IC406-*1

RESET

APX803D29

PD_+24V
R462
100

RESET

VCC

GND

GND

PD_+24V_PWR_DET_DIODES

Power_DET

INV_CTL

L405

+24V
0.1uF

MLB-201209-0120P-N2

50V

L413

+12V
0.1uF

MLB-201209-0120P-N2

DRV ON

PDIM#1

3.5V

PDIM#2

GND

GND

24V

10

24V

GND

11

12

GND

12V

13

14

12V

12V

15

16

N.C

GND

17

18

GND

3.9K

OPT

+3.3V_Normal

PWM_DIM
R420

100

+1.5V_DDR

PWM1

T120

Max 1000mA

780 mA

+3.5V_ST

16V

IC404
AP7173-SPG-13 HF(DIODES)

L410
19

+3.3V_Normal

FET_AOS
Q408
AO3407A

+3.5V_ST

+1.5V_DDR
NON_CI_CAP
C443
0.1uF
16V

[EP]

BLM18PG121SN1D

EN

1.5A6

OUT

FET_AOS G
C444
4.7uF
16V

R1 R440

FB

4.3K

R2
C433
560pF
50V

GND

R437
4.7K
1/16W
1%

C439
22uF
10V

C440
0.1uF
16V

FET_2.5V_AOS
AO3435
Q408-*2

FET_2.5V_DIODE
DMP2130L
Q408-*1

R456
10K

POWER_ON/OFF_1

D404
5V

FET_2.5V
C444-*1
2.2uF
10V

FET_AOS
R459
100

D403
5V
OPT

C448
22uF
10V

C446
0.1uF
16V

FET_2.5V
R459-*1
2.2K

1/16W
1%

SS

NON_CI_CAP
C421
0.1uF
16V

C418
10uF
10V

R458
22K

+3.3V_Normal
R430
10K

PG

VCC

1
THERMAL

IN
C401
68uF
35V
OPT

R454
10K

L412
BLM18SG700TN1D

3.5V

CIC21J501NE

16V

0.1uF

Q407
MMBT3904(NXP)

OPT
R452
10K

PWR ON

L403

+3.5V_ST

C407

PD_+24V
C441
0.1uF
16V

3
1

PD_+24V_PWR_DET_ON_SEMI
IC406
NCP803SN293

PD_+24V
R444
1.5K
1%

Q403
MMBT3904(NXP)

R419

C405

RESET

P401
SMAW200-H18S1

5V OPT

CIC21J501NE
L402
C403

POWER_DET_RESET

PD_+24V
R460
100K

VCC

PANEL_DISCHARGE_RES_5.6K
PANEL_DISCHARGE_RES_5.6K

R425
10K

R417
10K

IC405-*1
APX803D29

C445
0.1uF

GND

D401

R442
5.6K

R418
10K

Q401
MMBT3904(NXP)
E

R441
5.6K

POWER_DET

RESET_IC_SOC_RESET

R407
10K

NON_CI_CAP
C437
0.1uF
25V

Q405
MMBT3904(NXP)

001:AL22

R415
100

R461
300

RESET

PD_KR_42_LIPS
R451-*1
5.1K
1%

+24V

R426
10K

PANEL_CTL

RL_ON

R410
4.7K

OPT

R409
10K

OPT
R414
33K

R406
10K

PD_KR_42_LIPS
R455-*1
100
1%

PD_+12V
R451
1.2K
1%

RESET_IC_SOC_RESET

PWR_DET_ON_SEMI
IC405
NCP803SN293

5%

PD_+24V
R443
8.2K
1%

+3.3V_Normal

1
R413
10K

C442
0.1uF
16V

OPT
C435
0.1uF
25V

R436
5.6K

R465
10K

PD_+3.5V
R455
0

PANEL_VCC

MMBT3906(NXP)

+3.5V_ST

+3.5V_ST
R457
100K

VCC

R442-*1
4.7K

PANEL_DISCHARGE_RES_4.7K
PANEL_DISCHARGE_RES_4.7K

C431
10uF
25V

R435
33K

R441-*1
4.7K

+3.5V_ST

+24V --> 3.78V --> 3.92V (3.79V)


+18.5V --> 3.5V --> 3.75V (3.59V)
PD_+12V
R450
2.7K
1%

R442-*2
New item
5.1K
5.1K_PANEL_DISCHARGE

FROM LIPS & POWER B/D

0.015uF
C420
0.015uF
50V

+12V

+20V --> 3.51V --> 3.76V (3.59V)


+12V --> 3.58V --> 3.82V (3.68V)

R441-*2
5.1K
5.1K_PANEL_DISCHARGE

Vout=0.8*(1+R1/R2)=1.5319

S7LR core 1.2V volt


Vout=0.8*(1+R1/R2)

R403
10K

LDO_NEW
IC402-*1

C430
0.1uF
16V

D402
5V
OPT

3
4

PWRGD

EN

BOOT
13

14

11

PH_2

NR8040T3R6N

10
IC403
TPS54319TRE
9

PH_1

C432
22uF
10V

THERMAL
17

SS/TR

5
R412
20K

C438
0.1uF
16V

C434
22uF
10V

D405
5V
OPT

C427
3300pF
R433
1/16W 330K 5%

R432
15K

R1

C429
3300pF

R438
27K
1/16W
1%

C436
50V
100pF

OUT

R2

1
R421
4.7K
OPT

GND

3A

$ 0.165

R439
56K
1/16W
1%

USB1_CTL

Vout=0.827*(1+R1/R2)=1.225V

C409
3300pF
50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

PH_3

50V
+3.3V_Normal

3
R411
2K

VIN_2

GND_1

L411
3.6uH

12

TJ1118S-2.5
IN

RLIM

C408
100pF
50V
OPT

NON_CI_CAP
C417
0.1uF
16V

C425
10uF
10V

USB1_OCD

EN_SW

ROSC

SS

EN
[EP]

C416
10uF
10V

VIN_1

GND_2

FAULT

COMP

16

V7V

AGND

300 mA
R434
1

GND

C415
22uF
10V

+5V_Normal

IC401
TPS65281RGV

VIN
15

C406
4 . 7 u F 10V

NON_CI_CAP
C419
0.1uF
16V

VOUT

RT/CLK

SW_IN
9

FB
10

11

LX

BST
12
13

SW_OUT
14

PGND

THERMAL
17

C404
10uF
16V

+5V_USB_1

3Vd=550mV 2
1

VIN

11K 1%
C414-*1
C414 CAP_10uF_X5R
10uF
CHANGE TO
10V
10UF/10V/X5R 10uF 10V
85C
CAP_10uF_X7R

L408

+2.5V_Normal

IC402

VIN_3

R2

TJ3940S-2.5V-3L

COMP

R402

LDO_OLD

+3.3V_Normal

+1.10V_VDDC

C426
0.1uF
16V

15

C413
0.1uF
16V
OPT

C412
330pF
50V

+3.5V_ST

R401
27K
1%

+2.5V/+1.8V

EP[GND]

R404
33K
1%

VSENSE

R408
0

L401
CIC21J501NE

R405
100K

C402
22uF
16V
OPT

16

C411
22uF
16V

C410
0.047uF
25V

CHANGE TO
16V/X5R

0.33uF
16V

R429
10K

R1

L404
3.6uH

+12V

C422

+3.3V_Normal

+5V_Normal

AGND

+5V_Normal
&
+5V_USB_1

LA2AW

POWER

2012.09.11
4

LGE Internal Use Only

IR/LED and control for normal models.

+3.5V_ST

R606
10K
1%

R602
100

R608
10K
1%
L602
BLM18PG121SN1D

KEY1

R603
100

OPT
C604
VA602
0.1uF
5.6V
AMOTECH CO., LTD.

L603
BLM18PG121SN1D

P601
12507WR-08L

KEY2
OPT
VA601
5.6V
AMOTECH CO., LTD.

C603
0.1uF

3
+3.5V_ST
L601
BLM18PG121SN1D
4
C601
0.1uF
16V

C602
1000pF
50V

LED_R

R615
1.5K

6
OPT
C608
0.1uF
16V

8
9
+3.5V_ST
IR_OUT_EU
IR_OUT
R601
22

+3.5V_ST

R605
1K

IR_OUT

IR_OUT

IR_OUT_EU
IR_OUT_EU
Q601
2SC3052

R609
1K

+3.5V_ST

R607
10K

C
B
E

C
B
IR_OUT
Q602 E
2SC3052
IR_OUT_US
R604
0

IR_OUT
R610
47K

R611
3.3K

C607
100pF
50V

OPT
ZD603
5.48VTO5.76V

IR

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LA2AW
IR/CONTROL

2012.09.11
6

LGE Internal Use Only

HDMI
5V_HDMI_1

+5V_Normal

5V_HDMI_2

+5V_Normal

HPD1
10K

R820

2.7K

2.7K

R812
2.7K

2.7K

20

VA804

3.3K

1.8K

17

R805

R802

18

R818

100

R822

100

DDC_SDA_1

DDC_SCL_2

DDC_SCL_1

DDC_SCL_1

VA807
ESD_HDMI

ESD_HDMI

16

DDC_SDA_2

DDC_SDA_1

19

A2

A1

R819

R811

HDMI_2

VA805
ESD_HDMI

SHIELD

MMBD6100
D802

10K
R808

C
Q801
MMBT3904(NXP)

R813

MMBD6100
D801

5V_HDMI_1

HDMI_2

HDMI_1

HDMI_2

1K
R801

5V_DET_HDMI_1

5V_HDMI_1

A1

A2

5V_HDMI_1

VA806
ESD_HDMI

15

5V_HDMI_4

+5V_Normal

CK-_HDMI1

CK+_HDMI1

D0-

D0-_HDMI1

D0+_HDMI1

6
5
4
3
2
1

D0_GND
D0+

ESD_HDMI

D1D1_GND

D805
RCLAMP0524PA
1
10

D1+

D1-_HDMI1

D1+_HDMI1

D2-

D2-_HDMI1

D2+_HDMI1

D2_GND
D2+

MMBD6100
D803

R827

R828

2.7K

2.7K

HDMI_SIDE

D804
RCLAMP0524PA
10

11
10

A1

HDMI_SIDE

CK+

12

HDMI_SIDE

HDMI_1_Normal

EAG59023302

HDMI_CEC

13

A2

14

DDC_SDA_4

DDC_SCL_4

ESD_HDMI

VA801
ESD_HDMI

JK802

For CEC
R816
100
HDMI_CEC

CEC_REMOTE_S7

SIDE_HDMI
5V_HDMI_4
5V_HDMI_2

SHIELD

VA809
ESD_HDMI

Q802
MMBT3904(NXP)

20

HPD2

R824

100

R825

100

16
15

R807

14

DDC_SDA_2

19

DDC_SCL_2

18

9
8
7
6
5
4
3

D806
RCLAMP0524PA
1
10

2
1

CK+

D0-

D0_GND

D0+

ESD_HDMI

CK-_HDMI2
CK+_HDMI2
D0-_HDMI2

11
10
9

D0+_HDMI2
7

D807
RCLAMP0524PA
1
10

D1+

D2-

6
D1-_HDMI2

D1+_HDMI2
4
D2-_HDMI2

D2+_HDMI2
2

D2+

VA814
ESD_HDMI

100

R829

100

DDC_SDA_4
DDC_SCL_4

VA815
ESD_HDMI

ESD_HDMI
1

SHIELD

BODY_SHIELD

18
17
16

HDMI_CEC
15
D808
RCLAMP0524PA
1
10
CK+

CK-_HDMI4

CK+_HDMI4

D0-

D0_GND

D0+

14
13
12
D0-_HDMI4
D0+_HDMI4

11
10

ESD_HDMI

D1D809
RCLAMP0524PA
1
10

D1+

D1-_HDMI4

D1+_HDMI4

D2-

D2-_HDMI4

D2+_HDMI4

D1_GND

D2_GND
D2+

ESD_HDMI

8
7
6
5
4
3

ESD_HDMI
VA802

JK801
JK803

VA803
ESD_HDMI

HOT_PLUG_DETECT
VDD[+5V]
DDC/CEC_GND
SDA
SCL
RESERVED
CEC
TMDS_CLKTMDS_CLK_SHIELD
TMDS_CLK+
TMDS_DATA0TMDS_DATA0_SHIELD
TMDS_DATA0+
TMDS_DATA1TMDS_DATA1_SHIELD
TMDS_DATA1+
TMDS_DATA2TMDS_DATA2_SHIELD
TMDS_DATA2+

SIDE_HDMI_32LS3500
51U019S-312HFN-E-R-E-LG
JK803-*1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

SHIELD
20

20
19

ESD_HDMI

12

D1D1_GND

VA812

R826

13

D2_GND

14

HDMI_CEC

HDMI_SIDE

11
10

- EMI Gasket Touch Jack


HPD4

10K

15

HDMI_ARC

HDMI1_ARC

1.8K

16

13
12

R815

17

VA811
ESD_HDMI

EAG62611204

VA810
ESD_HDMI

VA813
ESD_HDMI

BODY_SHIELD

Q804
MMBT3904(NXP)

R823

20

3.3K

17

R806

1.8K
ESD_HDMI
VA808

For BDP In-Packing Model


R821
10K

R810
10K

R804

18

5V_HDMI_4

5V_DET_HDMI_4

R809
10K

19

EAG59023302

5V_HDMI_4

5V_HDMI_2

HDMI_2_Normal

R814
1K

R803
1K

5V_DET_HDMI_2

3.3K

5V_HDMI_2

R817

HDMI_2

20
19
18
17

HPD
+5V_POWER
DDC/CEC_GND

16

SDA

15

SCL

14

NC

13

CEC

12

CLK-

11

CLK_SHIELD

10

CLK+

9
8

DATA0DATA0_SHIELD

DATA0+

6
5

DATA1DATA1_SHIELD

DATA1+

3
2

DATA2DATA2_SHIELD

DATA2+

HDMI_2_BDP_Model
YKF45-7054V
JK801-*1

LA2AW
HDMI/RJP

19
18
17

HPD
+5V_POWER
DDC/CEC_GND

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

SDA
SCL
NC
CEC
CLKCLK_SHIELD
CLK+
DATA0DATA0_SHIELD
DATA0+
DATA1DATA1_SHIELD
DATA1+
DATA2DATA2_SHIELD
DATA2+

HDMI_1_BDP_Model
YKF45-7054V
JK802-*1

2012.09.11
8

LGE Internal Use Only

LVDS for large inch

[51Pin LVDS Connector]


(For FHD 60Hz)

FOR FHD REVERSE(10bit)

[30Pin LVDS Connector]


(For HD 60Hz_Normal)

Change in S7LR

FHD
P1100
FI-RE51S-HF-J-R1500

MIRROR
LVDS_SEL

Pol-change
HD

RXA4+

RXA0+

RXA0-

RXA4-

RXA0-

RXA0+

RXA3+

RXA1+

RXA1-

RXA3-

RXA1-

RXA1+

RXACK+

RXA2+

RXA2-

RXACK-

RXA2-

RXA2+

RXA2+

RXACK+

RXACK-

P1101

1
+3.3V_Normal

FF10001-30

2
3

OPT
R1102
3.3K

HD_GND_2pin

5
OPT
R1103
10K

6
7
8
9

PWM_DIM

SCANNING_EN
+3.3V_Normal

OPT
R1104
3.3K

PSU_T120_LGD
R1100
0

10

OPC&SCANNING_CTRL
OPT
R1105
10K

11
12

RXA4+

13

RXA4-

14

RXA3+

15

RXA3-

16

RXACK+

17

RXACK-

R1106
0

RXA2-

RXACK-

RXACK+

RXA1+

RXA3+

RXA3-

RXA3+

RXA1-

RXA3-

RXA3+

RXA3-

RXA0+

RXA4+

RXA4-

RXA0-

RXA4-

RXA4+

RXB4+

RXACK+

10

RXACK-

RXB0+

RXB0-

11

RXB4-

RXB0-

RXB0+

12

RXA2+

RXB3+

RXB1+

RXB1-

13

RXA2-

RXB3-

RXB1-

RXB1+

14
RXA1+
RXA1-

RXBCK+

RXB2+

RXB2-

15

RXBCK-

RXB2-

RXB2+

16

RXB2+

RXBCK+

RXBCK-

17

21

RXB2-

RXBCK-

RXBCK+

18

RXA0+

22

RXB3+

RXB3-

19

RXA1+

RXB1+

RXA0-

23

RXB1-

RXB3-

RXB3+

20

RXA1-

24

RXB0+

RXB4+

RXB4-

21

RXA0+

RXB4+

22

18
19

RXA2+

20

RXA2-

25

RXB0-

RXA0-

RXB4-

24

PANEL_VCC

25

28

RXB4+

29

RXB4-

AUO_GND
R1101
10K

HD
L1101
70-ohm
BLM18SG700TN1D

26
27

30

RXB3+

31

RXB3-

32

RXBCK+

28

FOR FHD REVERSE(8bit)

29

Change in S7LR

RXBCK-

30

OPT
C1103
10uF
16V

OPT
C1104
1000pF
50V

HD
C1105
0.1uF
16V

31

34

36

OPT
R1108
10K

AUO_GND/LGD_NC

27

35

OPT
R1107
3.3K

23

26

33

LVDS_SEL
+3.3V_Normal

MIRROR
RXB2+

RXA4+

RXB2-

Pol-change

Shift

RXA4+

RXA4-

RXA0RXA0+

RXA4-

RXA4-

RXA4+

RXA3+

RXA0+

RXA0-

RXA1-

RXA3-

RXA0-

RXA0+

RXA1+

RXACK+

RXA1+

RXA1-

RXA2-

RXACK-

RXA1-

RXA1+

RXA2+

RXA2+

RXA2+

RXA2-

RXACK-

RXA2-

RXA2-

RXA2+

RXACK+

RXA1+

RXACK+

RXACK-

RXA3-

RXA1-

RXACK-

RXACK+

RXA3+

RXA0+

RXA3+

RXA3-

RXA4-

RXA0-

RXA3-

RXA3+

RXA4+

RXB4+

RXB4+

RXB4-

RXB0-

RXB4-

RXB4-

RXB4+

RXB0+

RXB3+

RXB0+

RXB0-

RXB1-

RXB3-

RXB0-

RXB0+

RXB1+

RXBCK+

RXB1+

RXB1-

RXB2-

RXBCK-

RXB1-

RXB1+

RXB2+

RXB2+

RXB2+

RXB2-

RXBCK-

RXB2-

RXB2-

RXB2+

RXBCK+

RXB1+

RXBCK+

RXBCK-

RXB3-

RXB1-

RXBCK-

RXBCK+

RXB3+

RXB0+

RXB3+

RXB3-

RXB4-

RXB0-

RXB3-

RXB3+

RXB4+

37
38

RXB1+

39

RXB1-

40

RXB0+

41

RXB0-

42
43
44

PANEL_VCC

45
46
47

FHD
L1100
70-ohm

48
49
50
51

OPT
C1100
10uF
16V

OPT
C1101
1000pF
50V

FHD
C1102
0.1uF
16V

52

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LA2AW
LVDS_LARGE

2012.09.11
11

LGE Internal Use Only

R1227

AVDD_DDR0

L1202
CIC21J501NE

1uF

0.1uF

C1220

1uF

C1241

1uF

C1238

1uF

C1219

1uF

C1218

C1217

0.1uF

C1239

10uF

0.1uF

C1206

OPT
C1251

OS
1K 1%

+1.5V_DDR

R1228

0.1uF

C1250
OS
1%
1K

C1249

OS 1000pF

OS

OS
1K 1%

R1224
R1225

0.1uF

C1248
OS
1K
1%

C1247

OS

CLose to Saturn7M IC

CLose to Saturn7M IC

CLose to DDR3

AVDD_DDR0

B-MVREFDQ

B-MVREFCA

A-MVREFCA

OS 1000pF

1000pF

C1204

C1203

1%
1K

R1205

0.1uF

A-MVREFDQ

1000pF

0.1uF
C1202

AVDD_DDR0

1K 1%

R1204

AVDD_DDR0

1K 1%
1%

R1202

1K

C1201

R1201

AVDD_DDR0

CLose to DDR3

IC1201-*1
K4B1G1646G-BCH9

IC1202-*1
K4B1G1646G-BCH9

DDR_1333_SS_NEW
N3

R8

L7
N7
T3

A4
R1203

L8

ZQ

A6

240
1%

AVDD_DDR0

A7
B2

C1205

10uF

D9

C1207

0.1uF

G7

C1208

0.1uF

K2

0.1uF

K8

C1210

A5

C1211

0.1uF

N1

C1212

0.1uF

N9

C1213

0.1uF

R1

C1214

0.1uF

R9

C1215

0.1uF

C1216
OS

0.1uF

A8
VDD_1

A9

VDD_2

A10/AP

VDD_3

A11

VDD_4

A12/BC

VDD_5

A13

VDD_6
VDD_7

NC_5

VDD_8
VDD_9

BA0
BA1

A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7

A-MA14

BA2
VDDQ_1
VDDQ_2

CK

VDDQ_3

CK

VDDQ_4

CKE

VDDQ_5
VDDQ_6

CS

VDDQ_7

ODT

VDDQ_8

RAS

VDDQ_9

CAS
WE

NC_1
NC_2

RESET

B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B9
D1
D8
E2
E8
F9
G1
G9

R8
R2
T8
R3
L7
R7
N7
T3

A-MA2

A-MA4

A-MA3

A-MA5

A-MA4

A-MA6

A-MA5

A-MA7

A-MA6

A-MA8

A-MA7

A-MA9

A-MA8

A-MA10

A-MA9

A-MA11

A-MA10

A-MA12

A-MA11

A-MA13

B11
F12
C15
E12
A14
B14
D12
C13
E11

A-MA13

M7

B13

A-MA14

M2

A-MBA0

N8

A-MBA1

M3

A-MBA2

J7
K7
K9

NC_6

DQSL

VSS_1

DQSU

VSS_2

DQSU

VSS_3
VSS_4

DML

VSS_5

DMU

VSS_6
VSS_7

DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4

VSS_12

DQL5
DQL7

VSSQ_1
VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

VSSQ_9

DQU7

A_DDR3_A[2]

B_DDR3_A[2]

A_DDR3_A[3]

B_DDR3_A[3]

A_DDR3_A[4]

B_DDR3_A[4]

A_DDR3_A[5]

B_DDR3_A[5]
B_DDR3_A[6]

A_DDR3_A[7]

B_DDR3_A[7]

A_DDR3_A[8]

B_DDR3_A[8]
B_DDR3_A[9]

A_DDR3_A[10]

B_DDR3_A[10]

A_DDR3_A[11]

B_DDR3_A[11]

A_DDR3_A[12]

B_DDR3_A[12]

A_DDR3_A[13]

B_DDR3_A[13]
B_DDR3_A[14]

A_DDR3_A[14]

D25
F22
G22
E24
F21
E23
D22
D24
D21
C24
C25
F23

B-MA2

B-MA1

B-MA3

B-MA2

B-MA4

B-MA3

B-MA5

B-MA4

B-MA6

B-MA5

B-MA7

B-MA6

B-MA8

B-MA7

B-MA9

B-MA8

B-MA10

B-MA9

B-MA11

B-MA10

B-MA12

B-MA11

B-MA13

F13

A-MBA0

B15

A-MBA1

C1209
0.01uF
50V

A-MCKB

B_DDR3_MCLKZ

A_DDR3_MCLKZ

B16

A-MCKE

B_DDR3_MCLK

A_DDR3_MCLK

A17

A-MCKB

B_DDR3_BA[2]

A_DDR3_BA[2]

C17

A-MCK

A-MCKE

B_DDR3_BA[1]

A_DDR3_BA[1]

E13

A-MBA2

B_DDR3_BA[0]

A_DDR3_BA[0]

B_DDR3_MCLKE

A_DDR3_MCLKE

P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

B-MA12

E21

M7

B-MA13

D23

B-MA14

G20

B-MBA0

F24

OS C1240

B-MBA1

F20

B-MBA2

G25

0.01uF
50V

B-MCK

G23

N8

B-MBA1

M3

B-MBA2

J7
K7
K9

B-MCKE

B-MCKB

B-MCKB

F25

M2

B-MBA0

B-MCK

A-MCK

L2

B_DDR3_A[1]

A_DDR3_A[9]

C16
A15

A-MA12

A_DDR3_A[1]

A_DDR3_A[6]

D11

L2

B-MCKE

K1

B-MODT

K1

A-MODT

J3

A-MRASB

K3

A-MCASB

L3

A-MWEB

AVDD_DDR0

E14

A-MODT
A-MRASB

R1231
10K

A12

A-MCASB

C12

A-MWEB

T2

A-MRESETB

B_DDR3_ODT

A_DDR3_ODT

B12

A_DDR3_RASZ

B_DDR3_RASZ

A_DDR3_CASZ

B_DDR3_CASZ
B_DDR3_WEZ

A_DDR3_WEZ

F11

A-MRESETB

NC_4

DQL6
B1

P2

A-MA3

NC_3

DQSL
A9

P8

C14

B-MA0

56
R1237

A3

A-MA1

B_DDR3_A[0]

OS
1%

VREFDQ

N2

A-MA2

A_DDR3_A[0]

B23

56
R1238

A-MVREFDQ

P3

A-MA0

P7

B-MA1

OS
1%

H1

A2

A-MA1

1%

A1

P7

R1235
56

A0

S7LR2_DIVX_MS10
A11

A-MA0

1%

VREFCA

N3

R1236
56

M8

A-MVREFCA

B_DDR3_RESET

A_DDR3_RESET

AVDD_DDR0

D20

B-MODT

B25

B-MWEB

OS

L3

B-MWEB

R1232
10K

B-MCASB

A24

K3

B-MCASB

B-MRASB

B24

J3

B-MRASB

T2

B-MRESETB

B-MRESETB

F3

A-MDQSL

G3

A-MDQSLB

B19

A-MDQSL

A-MDQSU

B7

A-MDQSUB

A-MDMU
A-MDQL0

F7

A-MDQL1

F2

A-MDQL2

F8

H7

F15

A-MDQL3

A-MDQL5

G2

B21

A-MDQL2

A-MDQL4

H8

G15

A-MDQL1

A-MDQL3

H3

D17

A-MDQL0

B22

A-MDQL4

A-MDQL6

A-MDQL5

A-MDQL7

A-MDQL6

A22
D15

A-MDQU0

C3
C8
C2
A7
A2
B8

A-MDQU1

A-MDQU0

A-MDQU2

A-MDQU1

A-MDQU3

A-MDQU2

A-MDQU4

A-MDQU3

A-MDQU5

A-MDQU4

A-MDQU6

A3

G16
B20
F16
C21
E16
A20

A-MDQU5

A-MDQU7

D16

A-MDQU6

C20

A-MDQU7

A_DDR3_DQMU

B_DDR3_DQMU

A_DDR3_DQL[0]

B_DDR3_DQL[0]

A_DDR3_DQL[1]

B_DDR3_DQL[1]

A_DDR3_DQL[2]

B_DDR3_DQL[2]

A_DDR3_DQL[3]

B_DDR3_DQL[3]
B_DDR3_DQL[4]

A_DDR3_DQL[4]

F14

A-MDQL7

D7

B_DDR3_DQML

A_DDR3_DQML

A21

A-MDMU

E3

B_DDR3_DQSUB

A_DDR3_DQSUB

E15

A-MDML

B_DDR3_DQSU

A_DDR3_DQSU

A18

A-MDML

D3

B_DDR3_DQSLB

A_DDR3_DQSLB

B18

A-MDQSU
A-MDQSUB

E7

B_DDR3_DQSL

A_DDR3_DQSL

C18

A-MDQSLB

C7

A_DDR3_DQL[5]

B_DDR3_DQL[5]

A_DDR3_DQL[6]

B_DDR3_DQL[6]

A_DDR3_DQL[7]

B_DDR3_DQL[7]

A_DDR3_DQU[0]

B_DDR3_DQU[0]

A_DDR3_DQU[1]

B_DDR3_DQU[1]

A_DDR3_DQU[2]

B_DDR3_DQU[2]

A_DDR3_DQU[3]

B_DDR3_DQU[3]

A_DDR3_DQU[4]

B_DDR3_DQU[4]

A_DDR3_DQU[5]

B_DDR3_DQU[5]

A_DDR3_DQU[6]

B_DDR3_DQU[6]

A_DDR3_DQU[7]

B_DDR3_DQU[7]

G3

B-MDQSLB

K24

B-MDQSL

K25

B-MDQSLB

C7

B-MDQSU

B7

B-MDQSUB

J21

B-MDQSU

J20

B-MDQSUB

E7

B-MDML

D3

B-MDMU

H24

B-MDML

L20

B-MDMU

E3

B-MDQL0

F7

B-MDQL1

L23
J24
L24

B-MDQL0

B-MDQL2

B-MDQL1

B-MDQL3

B-MDQL2

J23

H8
G2

B-MDQL6

B-MDQL5

M23

H3

B-MDQL5

B-MDQL4

H23

F8

B-MDQL4

B-MDQL3

M24

F2

H7

B-MDQL7

B-MDQL6

K23

B-MDQL7

D7

B-MDQU0

C3

B-MDQU1

G21
L22
H22
K20
H20
L21

B-MDQU0

B-MDQU2

B-MDQU1

B-MDQU3

B-MDQU2

B-MDQU4

B-MDQU3

B-MDQU5

B-MDQU4

B-MDQU6

B-MDQU5

H21

C8
C2
A7
A2
B8
A3

B-MDQU7

K1

H1

B-MVREFDQ

J3
K3

A4
A5
ZQ

A6

OS
R1226

L8

L3

A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5
VDD_6
VDD_7

NC_5

VDD_8
VDD_9

BA0

0.1uF

OS C1230
OS C1231

0.1uF

N1

0.1uF

E7

N9

OS C1232

0.1uF

D3

R1

OS C1233
OS C1234

0.1uF

OS C1235
OS C1236

0.1uF

F2

0.1uF

F8

K2
K8

R9

BA1
BA2
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8
VDDQ_9

CAS

H3
H8

A8

G2

C1

NC_1
NC_2

RESET

NC_4
NC_6

DQSL

VDDQ_3

CKE

VDDQ_4

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

C3
C8

F1

C2

H2

A7

H9

A2

VSS_2

DML

VSS_4

DMU

VSS_5

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

B8

J1

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

T7

DQSL

IC1201-*5
K4B1G1646G-BCK0

IC1202-*5
K4B1G1646G-BCK0

EAN61829001

EAN61667501

DDR_1600_HYNIX

IC1201-*4
H5TQ1G63DFR-PBC

EAN61667501

DDR_DVB_T2_2G

IC1202-*4
H5TQ1G63DFR-PBC

EAN62348801

DDR_DVB_T2_2G

VSS_2

DQSU

VSS_3
DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

A9

P7

B3

P3
N2

E1

P8

G8

P2

J2

R8

J8

R2
T8

M1

R3

M9

L7

P1

R7

P9

N7
T3

T1
T9

M7

DQL6

M2

DQL7
VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8
VSSQ_9

DQU7

N8

B1

M3

B9
D1

J7

D8

K7
K9

E2
E8

L2

F9

K1

G1

J3
K3

G9

L3
T2

B-MDQU7

IC1201-*3
K4B2G1646C

IC1202-*3
K4B2G1646C

EAN62348801

EAN61848801

DDR_1600_MICRON DDR_1600_MICRON
IC1201-*6
MT41J64M16JT-125:G

EAN61848801

EAN61829003

DDR_1600_2G_SS

DDR_1600_2G_SS

IC1201-*7
K4B2G1646C-HCK0

IC1202-*7
K4B2G1646C-HCK0

IC1202-*6
MT41J64M16JT-125:G

EAN61829003

DDR_1600_HYNIX_NEW

EAN61848802

DDR_1600_HYNIX_NEW

IC1201-*8
H5TQ1G63EFR-PBC

EAN61859501

DDR_1600_2G_SS_NEWExchange

IC1202-*8
H5TQ1G63EFR-PBC

D3

DDR_1600_NANYA_NEW

IC1201-*9
K4B2G1646E-BCK0

IC1201-*10
NT5CB64M16DP-DH

E3
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2

A0

VREFCA

P3

A2
A3

VREFDQ

G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3

H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

A15

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

VREFCA

A2
A3

VREFDQ

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

A15

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

A15

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_5

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQ0

VSS_7

DQ1

VSS_8

DQ2

VSS_9

DQ3

VSS_10

DQ4

VSS_11

A1
A8

DQ5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQ9

VSSQ_3

DQ10

VSSQ_4

DQ11

VSSQ_5

DQ12

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQ13

VSSQ_7

DQ14

VSSQ_8

DQ15

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

A15

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_5

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQ0

VSS_7

DQ1

VSS_8

DQ2

VSS_9

DQ3

VSS_10

DQ4

VSS_11

A1
A8

DQ5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQ9

VSSQ_3

DQ10

VSSQ_4

DQ11

VSSQ_5

DQ12

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQ13

VSSQ_7

DQ14

VSSQ_8

DQ15

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

P7
H1

P2
ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2

L7
R7

K2

N7

K8

T3

N1
N9

VDDQ_1
VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

G3
A9
B3

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

H1

F8

A4
A5
A6

ZQ

L8

A7
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4
VDD_5
VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

B2
D9

VDDQ_1
CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
RESET

NC_2
NC_4

DQSL

NC_7

G2

G7
K2

H7

K8
N1

A0

K1

H2

J3

R1
R9

VDDQ_2

CK

VDDQ_3

A1

CKE

VDDQ_4

A8
C1

CS

VDDQ_6

C9

ODT

VDDQ_7

D2

RAS

VDDQ_8

CAS

VDDQ_9

E9
F1
H2
H9

WE

J1

NC_1

T2

J9

NC_2

RESET

L1

NC_3

C7
B7
E7

J2

D3

DQSL

F7
F2

P9

F8

T1

H3

T9

H8
G2

D7

D1

C3

D8

C8

E2

C2

E8

A7

VSS_2

A9

DML

VSS_4

B3

DMU

VSS_5

E1
G8

DQL0

VSS_7

J2

DQL1

VSS_8

J8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

M1
M9
P1
P9
T1
T9

DQL6
DQL7

B1
B9

VSS_1

DQSU

VSS_6

E3

P1

DQSU

VSS_3

J8
M9

T7

NC_6

DQSL

E1
G8

L9

NC_4

F3

B3

G9

N9

VDDQ_5

K3

A9

G1

N1

VDDQ_1

G3

F9

K8

VDD_9

L9

B1

VSSQ_1

A2
B8
A3

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9
D1
D8
E2
E8
F9
G1
G9

IC1202-*2
NT5CB64M16DP-CF
DDR_1333_NANYA_NEW

EAN61857201 VREFCA

D7

R9

C3
A1

C8

A8
C1

C2

C9
D2

A7

E9
F1

A2

H2
H9

B8

J1

A3

J9
L1

M8

P3

A2
A3

VREFDQ

H1

N2

L8

R8

P8

A4

P2

A5
A6

ZQ

R2

A7

T8

A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4

NC_6

VDD_5
VDD_6

NC_5

VDD_7
VDD_8

BA0

VDD_9

B2
D9

L7
R7

K2

N7

K8

T3

N1
N9

M7

R1
R9

M2
N8
M3

BA2
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R3

G7

BA1

RESET

N3
P7

A1

NC_7

A1
A8

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

DQSU

VSS_1

DQSU

VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

T2

L1
T7

F3

A9

C7

B3

B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9
T1
T9

F8
H3
H8
G2
H7

VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

M8

A1
A2
VREFDQ

A3

H1

A4
A5
ZQ

A6

L8

A7
A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4

NC_6

VDD_5
VDD_6
VDD_7

NC_5

VDD_8
VDD_9

BA0

B2
D9
G7
K2
K8
N1
N9
R1
R9

BA1
BA2
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2

RESET

NC_3

G3

DQL6
DQL7

EAN61857201 VREFCA

A0

L9

DQSL

N9
R1

BA1
BA2

CKE

H3
H8

A8

NC_6

F7
F2

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

NC_7

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

NC_7

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQ7

A0

M8

A1

L9
T7

DQ6

DQ8

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

NC_6

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQ7

A0

M8

A1

L9
T7

DQ6

DQ8

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

NC_6

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P3

NC_3
F3

H7

DQL7

A0

M8

A1

L9
T7

DQL6

DQU0

M2
N8

DQSL

DMU

M7

R1

M3

CK

RESET

R3

D9
G7

BA1
BA2

CKE

R8
R2

A7
A8

A13

N2
P8

A4
A5
A6

N3
P7

A1

NC_3
F3

M8

F1

M1

K2

VDD_7

CK

DDR_1333_NANYA_NEW
N3

VSS_1

DQSU

E7
EAN61829001

L2

T7

G7

B-MA14

B7

DDR_1600_HYNIX

E9

IC1201-*2
NT5CB64M16DP-CF

L9

C7

EAN61836301

VDD_5

L1

G3

DDR_1600_SS

A13

D9

J9

F3

EAN61836301

K9

L1

NC_3

DDR_1600_SS

J7
K7

C9

H7

DQU0

VDD_4

BA2

L3

VSSQ_1

D7

E9

VSS_1

DQSU

A12/BC

B2

BA1

J1

NC_6

DQSU

VDD_3

BA0

D2

NC_2

VDD_2

A11

VDD_8

M2

C1

J9

VDD_1

A10/AP

NC_5

A8

H9

A9

VDD_6

M7

A1

DQL7

C9

B-MDQU6

K21

VDDQ_2

CK

DQL6

H7

D2

T3

N8

VSS_6

F7

A1

K8

R9

VSS_3

E3

0.1uF

N7

DQSL

A3

WE

CK

DQSL

B7

A8

R1

NC_4

C7

0.1uF

K2

L8

A7

M3

RESET

G3

OS C1228
OS C1229

G7

VDD_7

NC_3

10uF

R7

N9

NC_1

F3

C1227

L7

G7

ZQ

A6

R3

N1

VDD_9

AVDD_DDR0

B2
D9

VDD_5

WE

T2

240
1%

A7

NC_3

E20

B-MDQSL

F3

VREFDQ

A3

A13

VDDQ_5

L2

A2

VDD_4

VDDQ_1

K9

A1

A12/BC

BA2

K7

B-MVREFCA

A5

R8

D9

BA1

M3

M8

VDD_3

BA0

N8

J7

VREFCA

A0

VDD_2

A11

VDD_8

M2

DDR_1333_HYNIX
N3

B-MA0

VDD_1

A10/AP

NC_5

EAN61828901

DDR_1333_HYNIX

A9

VDD_6

M7

A4

R2
B2

H1

VREFDQ

A3

T8

A8

R7

IC101
LGE2111A-T8

L8

A7

T8
R3

IC1201
H5TQ1G63DFR-H9C

ZQ

A6

R2

A2

N2
P2

A5

M8

A1

P8

A4

P2

IC1202
H5TQ1G63DFR-H9C

VREFDQ

A3

P8

H1

VREFCA

A0

P3

A2

N2

N3
P7

A1

P3

EAN61828901

DDR_1333_SS_NEW
M8

VREFCA

A0

P7

NC_4
NC_7

DQSL

A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7

DQSL
DQSU

VSS_1

DQSU

VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL6
DQL7
VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9
D1
D8
E2
E8
F9
G1
G9

L9
T7

DQSL
DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL6
DQL7
VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9
D1
D8
E2
E8
F9
G1
G9

LA2AW
DDR_256

2012.09.11
12

LGE Internal Use Only

Serial Flash for SPI boot_NON_OS and OS

+3.5V_ST

+3.5V_ST

S_FLASH_OS_MACRONIX
OPT
R302
4.7K

+3.5V_ST

IC301
MX25L8006EM2I-12G
CS#

/SPI_CS

OPT
R301
10K

SO/SIO1
SPI_SDO
WP#

/FLASH_WP
GND
OPT
R304
0

S_FLASH_OS
C301
0.1uF

VCC

HOLD#

SCLK
SPI_SCK
SI/SIO0

R303
33

S_FLASH_OS

SPI_SDI

OPT
Q301
MMBT3904(NXP)

B
E

S_FLASH_OS_WINBOND
IC301-*1
W25Q80BVSSIG
CS

DO[IO1]

%WP[IO2]

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

VCC

HOLD[IO3]

CLK

DI[IO0]

LA2AW
Serial FLASH

2012.09.11
3

LGE Internal Use Only

Audio amp(NTP-7500)

AMP_RESET
C516
1000pF
50V
50V

R521
10K

AVDD_PLL

DVDD_PLL

LF

GND_1

DGND

10K
NON_LIPS

PVDD1_2

PVDD1_3

OUT1A_1

PGND1A

BST1A

/RESET

AD

38

39

40

41

42

43

44

45

37
32

VDR1

31

VCC_5

27

PGND2A

BCK

11

26

OUT2A_2

SDA

12

25

OUT2A_1

R515
12

C530
390pF
50V

L505
10.0uH
L506
10.0uH

C537
0.1uF
50V

C531
390pF
50V

D502
1N4148W
100V
OPT

R509
12

R516
4.7K

C535
0.47uF
50V

SPEAKER_L
C538
0.1uF
50V

R513
12

R517
4.7K
SPK_L-

C526
22000pF
50V

WAFER-ANGLE

SPK_L+

SPK_L-

SPK_R+

C528
1uF
25V

C529
1uF
25V

C534
1uF
25V

SPK_R-

C527
22000pF
50V

P501

24

23

22

21

20

19

18

17

R508
12

C518
22000pF
50V

PVDD2_3

SPK_R+

PVDD2_2

Q501
MMBT3904(NXP)
NON_LIPS
E

BST1B

10

PVDD2_1

AMP_MUTE

C505
1000pF
50V

33

WCK

OUT2B_2

R501

100

PGND1B

BST2A

OUT2B_1

NON_LIPS

NON_LIPS
R506

34

28

PGND2B

NON_LIPS
C

OUT1B_1

29

BST2B

R502
10K

R520
10K

C509
33pF
50V

35

16

C507
33pF
50V

+3.5V_ST

OUT1B_2

SDATA

MONITOR2

100

IC501
NTP-7500L

SCL

AMP_SCL

100

SPK_L+

VDR2

AUD_SCK

R504

OPT
C525
0.01uF
50V

D501
1N4148W
100V
OPT

AGND

AUD_LRCK

R503

C523
10uF
35V

C521
0.1uF
50V

30

DVDD
AUD_LRCH

AMP_SDA

DGND_PLL

MONITOR1

C513
0.1uF
16V

THERMAL
49

15

OPT
C511
10uF
10V

C519
0.1uF
50V

36

MONITOR0

3.3K

46

AGND_PLL

R505

100pF
50V

OPT
R507
3.3

C512
0.1uF
16V

47

C510
10uF
10V

14

C503

C508
0.1uF
16V

13

C504
1000pF
50V

C506
10uF
10V

/FAULT

C502
0.1uF
50V

48

C501
0.1uF
50V

GND_IO

16V

CLK_I

0.1uF

L501
CIS21J121

C515
10uF
10V

[EP]

C514

VDD_IO

+24V_AMP

+24V

+24V_AMP

OUT1A_2

C517

AUD_MASTER_CLK

22000pF

L502
BLM18PG121SN1D

PVDD1_1

+3.3V_Normal

+24V_AMP

D503
1N4148W
100V
OPT

C520

C522

C524

0.1uF
50V

0.1uF
50V

10uF
35V

D504
1N4148W
100V
OPT

R510
12

R514
12

C532
390pF
50V

L504
10.0uH

C533
390pF
50V
R511
12

L503
10.0uH

R512
12

C536
0.47uF
50V

C539

R518

0.1uF
50V

4.7K

C540

R519

0.1uF
50V

4.7K

SPEAKER_R

SPK_RR522
0
POWER_DET
LIPS_ONLY

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LA2AW
NTP-7500

2012.09.11
5

LGE Internal Use Only

USB DOWN STREAM

SPDIF OPTIC JACK

+3.3V_Normal

5.15 Mstar Circuit Application

3AU04S-305-ZC-(LG)
JK703

10uF
10V

VCC

VINPUT

SPDIF_OUT

4
C707
0.1uF
16V

GND

IN_1

IN_2

EN

120-ohm

NC

+5V_USB_2

TEST
L703
CIS21J121

OUT_2

C716
22uF
10V
TEST

OUT_1

FLG

USB2

+3.3V_Normal

+5V_USB_2

+5V_USB_1

USB2
3AU04S-305-ZC-(LG)
JK704

47

Rear AV

USB2_OCD

USB2_DM

C719
10uF
10V
TEST

AV_CVBS_IN

USB2_DP

D701
30V
4

TEST

C708
47pF
50V

R701
75

C710
220pF
50V
OPT

+3.3V_Normal

USB2_CTL

OPT
RCLAMP0502BA
D709

R715

TEST
R714
10K

R713
4.7K
OPT

USB DOWN STREAM

C709
100pF
50V

FIX_POLE

+5V_Normal

R704
10K

JK701
PPJ233-01

JP_GND
+5V_Normal

3C

[RD]CONTACT
L-MONO

4B

[WH]C-LUG

3A

[YL]CONTACT

D705
5.6V
OPT

R724
2.2K

AV_CVBS_DET

R705
1K
C711
0.1uF
16V

R706
10K

4A

[YL]O-SPRING

5A

[YL]E-LUG

R702
470K

D702
5.6V

L701
120-ohm

C712
330pF
50V

L702
120-ohm

R707
10K
AV_COMP_PC_L_IN

R703

D703
5.6V

NON_CI_CAP_RGB_PC
C724
0.1uF
16V

RGB_PC

R723
2.2K

4C

[RD]O-SPRING

JP_GND2

A1

RGB_PC

[RD]E-LUG

AV_COMP_PC_R_IN

JP_GND1
C

5C

R708
12K

RGB PC
RGB_PC
D710
MMBD6100
A2

Fiber Optic

VIN

VCC

GND

L703-*1
MLB-201209-0120P-N2

C717

EAN61849601

IC702
AP2191DSG

GND

USB1_DP
TEST

SPDIF-JACK-SOLTEAM
JK702-*1
JST1223-001

Fiber Optic

OPT
RCLAMP0502BA
D708

USB1_DM

OCP for USB_2

SPDIF-JACK-FOXCONN
JK702
2F01TC1-CLM97-4F

SHIELD

USB1
+5V_USB_1

470K

C713
330pF
50V

R709
12K

JP_GND3
RGB_DDC_SCL

NON_CI_CAP_RGB_PC
NON_CI_CAP_RGB_PC
C721
18pF
50V

JP_GND4

RGB_DDC_SDA

C723
18pF
50V

RS232C
DSUB_VSYNC
10
DSUB_HSYNC
OPT
C718
68pF
50V

OPT
OPT
C720
VA701
68pF
20V
50V
ADUC 20S 02 010L

OPT
VA706
5.6V

OPT
VA705
20V
ADUC 20S 02 010L

9
IR_OUT

OPT
VA707
5.6V

4
8

R710
100

JP708

R711
100

JP709

3
DSUB_B+
ADUC 20S 02 010L
RGB_PC
R718
75

+3.5V_ST

RGB_VARISTOR
VA702
20V

D704
CDS3C30GTH
30V
OPT
C701

SPG09-DB-009
IC701

JK706

C706
0.1uF

MAX3232CDR
ADUC 20S 02 010L

+3.5V_ST
+3.3V_Normal

RGB_VARISTOR
VA703
20V

RGB_PC
R729
10K

C1+
C702
0.1uF

RGB_PC
R732
1K
DSUB_DET

OPT
VA708
5.6V
ADMC 5M 02 200L

DSUB_R+
RGB_PC
R720
75

D706
CDS3C30GTH
30V
OPT

0.33uF

DSUB_G+
RGB_PC
R719
75

ADUC 20S 02 010L


RGB_VARISTOR
VA704
20V

C703
0.1uF

V+

C1-

C2+
C704
0.1uF

C2-

C705
0 . 1 u FDOUT2

DDC_GND

DDC_CLOCK

SYNC_GND

GND_1

V_SYNC

NC

BLUE

H_SYNC

BLUE_GND

GREEN

DDC_DATA

GREEN_GND

RED

GND_2

RED_GND

V-

SHILED

15

14

13

12

11

10

VCC
D707
BAP70-02

R712
1K

GND
50V
DOUT1

RIN1

ROUT1
PM_RXD
DIN1
PM_TXD
DIN2

ROUT2

EAN41348201

16

15

16

10

14
4

13
3

12
7
2

11

RIN2

JK705
SPG09-DB-010

RGB_PC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LA2AW
REAR JACKS

2012.09.11
7

LGE Internal Use Only

RJP
+12V
RJP
L901

Q902
AO3407A RJP

BLM18PG121SN1D
C901
2.2uF
16V RJP

R905
1K
RJP_PROTECTION

RJP
R902
10K

C903
1uF
25V
OPT

S
KRJV9768-1001-024

RJP_PROTECTION
R903
5.1K

RJP
R914
10K

Q901
AO3407ARJP_PROTECTION

RJP_PROTECTION
R904
5.1K

RJP
JK901

C908
22uF
16V
OPT

R901
10K
RJP

RJP_PROTECTION

100K
R908

R906

RJP_PROTECTION

1
RJP_NORMAL

R910

510 RJP

R912

510 RJP

R913

510 RJP

RJP_CTRL0

RJP_CTRL1

RJP_CTRL2

RJP_CTRL3

R919
RJP 8.2K

R918
RJP 3.9K

R917
RJP 3.9K

RJP R915
3.9K

R916
RJP 3.9K

RJP

RJP
0.01uF

5.1V
ZD905

C907

RJP

RJP
5.1V

0.01uF

ZD904

C906

RJP
0.01uF
C905

5.1V
ZD903

RJP

0.01uF
C904

RJP

5.1V

RJP

RJP_CTRL4

ZD902

RJP

510 RJP

RJP

R909

5.1V

0.01uF

510 RJP

ZD901

R911

R907

C902

Single ended
+3.5V_ST

EXT_SPK
4.7K
R923

EXT_SPK
10K
R922

BLM18PG121SN1D
L902

EXT_SPK

+24V

EXT_SPK
C915
0.1uF
50V

EXT_SPK
C914
0.1uF
50V

EXT_SPEAKER

EXT_SPK
C916
4.7uF
50V

C
B

SUB_AMP_MUTE
001:AC13

EXT_SPK

EXT_SPK

Q903
MMBT3904(NXP) E

JK902
PEJ034-01

IC901
TPA3124D2PWPR

EXT_SPK

SD

PVCCL_2
EXT_SPK
R924
10K

MUTE

EXT_SPK
C928
10V
1uF

LIN

24

23

22

21

20

19

18

PGNDL_2

PGNDL_1

LOUT

EXT_SPK

EXT_SPK

BSL

22.0uH
L905
EXT_SPK

AVCC_2

EXT_AMP_R
10V
1uF
C927
EXT_SPK

BYPASS

AGND_1

AGND_2

PVCCR_1
C911
1uF
50V
EXT_SPK

VCLAMP

C912
1uF
50V
EXT_SPK
C913
0.1uF
50V
EXT_SPK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

PVCCR_2

17

16

10

15

11

14

12

13

C920
R935
2.2uF
4.7K
50V
EXT_SPK EXT_SPK

C921
2.2uF
50V
EXT_SPK
C922
2.2uF
50V
EXT_SPK

EXT_SPK
10K
R936

EXT_OUT_R

EXT_SPK
R939
100K
EXT_SPK
R938
100

EXT_OUT_L
C919
R934
2.2uF
4.7K
50V
EXT_SPK EXT_SPK

C917
0.22uF
50V

EXT_AMP_L
RIN

L904
22.0uH

C924
47uF
25V
EXT_SPK

PVCCL_1

+3.3V_Normal
E_SPRING

C923
47uF
25V
EXT_SPK

EXT_SPK_DET
4

R_SPRING

T_SPRING

EXT_OUT_R

7B

B_TERMINAL2

6B

T_TERMINAL2

EXT_OUT_L
C925
1uF
OPT

C926
1uF
OPT

EXT_SPK
10K
R937

AVCC_1
R930
10K
OPT

GAIN0

R932
10K
OPT

GAIN1

BSR

ROUT

EXT_SPK
C918
0.22uF
50V

R931
10K
EXT_SPK

R933
10K
EXT_SPK

PGNDR_2

PGNDR_1

LA2AW
RJP / EXT AMP

2012.09.11
9

LGE Internal Use Only

GP4R_GLOBAL_TUNER_BLOCK
0

Pull-up cant be applied


because of MODEL_OPT_2

TU1002
TDSS-G102D

TU1001
TDSN_B001F

SI2176_BR_2INPUT_H

+3.3V_TU

TU1002-*1
TDSS-H101F

RF_SWITCH_CTL

RF_SW_OPT

SI2176_ATSC_1INPUT_H

R1001

SI2176_DVB_1INPUT_H

B1

1
2
3
4
5
6
7
8
9
10
11

B1

A1

NC
RESET
SCL
SDA
+B1[3.3V]
SIF

R1030
470

+B2[1.8V]

IF_AGC

TU_SIF

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

C1001
0.1uF
16V

RESET

SCL
3
SDA
4
+B1[3.3V]
5
SIF
6
+B2[1.8V]
7
CVBS
8
NC_1
9
NC_2
10
NC_3
11
+B3[3.3V]

+1.23V_TU

A1

+B4[1.23V]
NC_4

120

C1002
0.1uF
16V
FULL_NIM

GND

B1

A1

C
R1008
100

TUNER_RESET

NC

B1

A1

+3.3V_TU

C1014
0.1uF
16V

Q1002

R1027
4.7K
TU_BUFFER

R1010
100K

RESET
SCL

33

R1019
1K
R1015

R1022
1K

+3.3V_TU

TU_SCL

SDA

33

R1014
TU_SDA

+B1[3.3V]
SIF

close to TUNER

C1004
0.1uF

+B2[1.8V]

C1019
18pF
50V

C1016
18pF
50V

C1004-*1
0
ASIA

TU_NON_BUFFER
0
R1025

NON_ASIA

CVBVS
IF_AGC
DIF[P]

NON_ASIA R1023

NON_ASIA R1024

TU_CVBS

E
R1028
1K
OPT

+3.3V_TU

DIF[N]
+1.2V/+1.8V_TU

C1005
0.1uF
16V

C1006
22uF
25V

C1011
0.1uF
16V

C1009
100pF
50V

C1008
10uF
6.3V

A1
C1003
100pF
50V

TU_BUFFER
R1031
220

TU_BUFFER
R1029
220

16V

C1017
5pF
50V
ASIA

TU_BUFFER
Q1001
C MMBT3906(NXP)

C1020
5pF
50V
ASIA

close to the tuner pin, add,09029

R1016
3.3
ASIA

12

R1007

100

R1018
2K
OPT

R1020
3.3
ASIA

IF_AGC_MAIN
NON_BR

SHIELD

ERROR

R1017
0
ASIA

should be guarded by ground

NON_BR
C1012
0.1uF
16V

R1021
0
ASIA

SYNC
VALID
NON_BR
R1002
0

MCLK

IF_N_MSTAR

D0
IF_P_MSTAR
R1003 0
NON_BR
Close to the tuner

D1

1. should be guarded by ground


2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils

D2
D3
D4
+3.3V_TU

D5

+1.2V/+1.8V_TU

D6

IC1001

FE_TS_SYNC

+3.3V_TU

AZ1117BH-1.8TRE1

D7
FE_TS_VAL_ERR

FE_TS_DATA[0-7]

IN

C1010
0.1uF
16V

FE_TS_CLK

5%

A1

ADJ/GND

Size change,0929
L1003
MLB-201209-0120P-N2

R1009
1
1/16W

60mA

FE_TS_DATA[0]

28

+3.3V_Normal

OUT

B1

TU_BUFFER
MMBT3906(NXP)

FULL_NIM
L1001

B1

+3.3V_TU

DIF[N]

SHIELD

RF_S/W_CTL

R1032
82

DIF[P]

12

TU_BUFFER

TU_NON_BUFFER
0
R1026

CVBS

C1013
0.1uF
16V

FE_TS_DATA[1]

SHIELD

C1024
22uF
10V

C1015
10uF
10V

C1025
0.1uF
16V

C1026
22uF
10V

C1027
0.1uF
16V

add,0929
FE_TS_DATA[2]

IC1002
AP2132MP-2.5TRG1
[EP]
+1.23V_TU

FE_TS_DATA[3]

FE_TS_DATA[5]

PG

FULL_NIM_OPT

C1007
0.1uF
16V

EN

R1004

L1002

+5V_Normal

FULL_NIM

FE_TS_DATA[7]

10K

FE_TS_DATA[6]

FULL_NIM

VIN

VCTRL

1
8
FULL_NIM_BCD
2

FE_TS_DATA[4]

10K

THERMAL

R1005

380mA

GND

ADJ

FULL_NIM_BCD FULL_NIM_BCD
R1012
R1013
11K
10K
R1

VOUT

NC

FULL_NIM_BCD

R1011
20K
1005

C1018
0.1uF
16V
FULL_NIM

C1021
10uF
10V
FULL_NIM

R2

R1006
0
FULL_NIM_BCD

BCD Vo=0.6*(1+R1/R2)
TJ Vo=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LA2AW

TUNER

2012.09.11
10

LGE Internal Use Only

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