Professional Documents
Culture Documents
1. General description
The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary
weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The
device features two input enable (E0 and E1) inputs. A HIGH on either of the input
enables forces the outputs HIGH. The device can be used as a 1-to-16 demultiplexer by
using one of the enable inputs as the multiplexed data input. When the other enable input
is LOW the addressed output will follow the state of the applied data. Inputs include clamp
diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of VCC.
3. Ordering information
Table 1.
Ordering information
Type number
74HC154D
Package
Temperature range Name
Description
Version
40 C to +125 C
SO24
40 C to +125 C
SSOP24
SOT340-1
40 C to +125 C
TSSOP24
SOT355-1
40 C to +125 C
74HCT154D
74HC154DB
74HCT154DB
74HC154PW
74HCT154PW
74HC154BQ
74HCT154BQ
SOT815-1
74HC154; 74HCT154
NXP Semiconductors
4. Functional diagram
$
$
$
$
(
'(&2'(5
(
<
<
<
<
<
<
<
<
<
<
DDE
';
*
$
$
$
$
(
(
;<
<
<
<
<
(1
DDE
DDE
74HC_HCT154
(1
2 of 20
74HC154; 74HCT154
NXP Semiconductors
(
<
<
(
$
$
<
<
<
<
<
$
<
<
$
<
<
<
<
<
<
<
DDE
5. Pinning information
5.1 Pinning
<
WHUPLQDO
LQGH[DUHD
+&
+&7
9&&
+&
+&7
<
$
<
9&&
<
$
<
$
<
$
<
$
<
$
<
$
<
(
<
$
<
(
<
(
<
<
<
(
<
<
<
<
<
<
<
<
<
<
*1'
<
9&&
<
<
<
<
*1'
<
DDE
7UDQVSDUHQWWRSYLHZ
DDE
74HC_HCT154
3 of 20
74HC154; 74HCT154
NXP Semiconductors
Pin description
Symbol
Pin
Description
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8, Y9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, data output (active LOW)
Y10, Y11, Y12, Y13, Y14, Y15
16, 17
GND
12
ground (0 V)
E0, E1
18, 19
address input
VCC
24
supply voltage
6. Functional description
Function table[1]
Table 3.
Input
Output
E0
E1 A0 A1 A2 A3 Y0
Y1 Y2 Y3
Y4 Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12 Y13
Y14 Y15
[1]
74HC_HCT154
4 of 20
74HC154; 74HCT154
NXP Semiconductors
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7.0
IIK
[1]
20
mA
IOK
[1]
20
mA
output current
[1]
25
mA
supply current
[1]
50
mA
IGND
ground current
[1]
Tstg
storage temperature
IO
ICC
Ptot
[1]
[2]
Tamb = 40 C to +125 C
[2]
50
mA
65
+150
300
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO24 packages: Ptot derates linearly at 8 mW/K above 70 C.
For SSOP24 and TSSOP24 packages: Ptot derates linearly at 5.5 mW/K above 60 C.
For DHVQFN24 packages: Ptot derates linearly at 4.5 mW/K above 60 C.
supply voltage
Conditions
74HC154
74HCT154
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
6.0
4.5
5.0
5.5
VI
input voltage
VCC
VCC
VO
output voltage
VCC
VCC
Tamb
ambient temperature
40
+25
+125
40
+25
+125
t/V
625
VCC = 4.5 V
1.67
139
1.67
139
ns/V
VCC = 6.0 V
83
ns/V
74HC_HCT154
VCC = 2.0 V
ns/V
5 of 20
74HC154; 74HCT154
NXP Semiconductors
9. Static characteristics
Table 6.
Static characteristics 74HC154
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
1.5
1.2
VCC = 4.5 V
3.15
2.4
VCC = 6.0 V
4.2
3.2
VCC = 2.0 V
0.8
0.5
VCC = 4.5 V
2.1
1.35
VCC = 6.0 V
2.8
1.8
VCC = 2.0 V; IO = 20 A
1.9
2.0
VCC = 4.5 V; IO = 20 A
4.4
4.5
VCC = 6.0 V; IO = 20 A
5.9
6.0
3.98
4.32
5.48
5.81
VCC = 2.0 V; IO = 20 A
0.1
VCC = 4.5 V; IO = 20 A
0.1
VCC = 6.0 V; IO = 20 A
0.1
Tamb = 25 C
VIH
VIL
VOH
VOL
VI = VIH or VIL
VI = VIH or VIL
0.15
0.26
0.16
0.26
II
0.1
ICC
supply current
8.0
CI
input capacitance
3.5
pF
VCC = 2.0 V
1.5
VCC = 4.5 V
3.15
Tamb = 40 C to +85 C
VIH
VIL
VOH
74HC_HCT154
VCC = 6.0 V
4.2
VCC = 2.0 V
0.5
VCC = 4.5 V
1.35
VCC = 6.0 V
1.8
VCC = 2.0 V; IO = 20 A
1.9
VCC = 4.5 V; IO = 20 A
4.4
VCC = 6.0 V; IO = 20 A
5.9
3.84
5.34
VI = VIH or VIL
6 of 20
74HC154; 74HCT154
NXP Semiconductors
Table 6.
Static characteristics 74HC154 continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
VI = VIH or VIL
VCC = 2.0 V; IO = 20 A
0.1
VCC = 4.5 V; IO = 20 A
0.1
VCC = 6.0 V; IO = 20 A
0.1
0.33
0.33
II
1.0
ICC
supply current
80
VCC = 2.0 V
1.5
Tamb = 40 C to +125 C
VIH
VIL
VOH
VOL
VCC = 4.5 V
3.15
VCC = 6.0 V
4.2
VCC = 2.0 V
0.5
VCC = 4.5 V
1.35
VCC = 6.0 V
1.8
VCC = 2.0 V; IO = 20 A
1.9
VCC = 4.5 V; IO = 20 A
4.4
VCC = 6.0 V; IO = 20 A
5.9
3.7
5.2
VCC = 2.0 V; IO = 20 A
0.1
VCC = 4.5 V; IO = 20 A
0.1
VCC = 6.0 V; IO = 20 A
0.1
0.4
VI = VIH or VIL
VI = VIH or VIL
0.4
II
0.1
ICC
supply current
160
74HC_HCT154
7 of 20
74HC154; 74HCT154
NXP Semiconductors
Table 7.
Static characteristics 74HCT154
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIH
2.0
1.6
VIL
1.2
0.8
VOH
VI = VIH or VIL
Tamb = 25 C
VOL
VCC = 4.5 V; IO = 20 A
4.4
4.5
VCC = 4.5 V; IO = 4 mA
3.98
4.32
VCC = 4.5 V; IO = 20 A
0.1
VCC = 4.5 V; IO = 4 mA
VI = VIH or VIL
-
0.15
0.25
II
0.1
ICC
supply current
8.0
ICC
360
CI
input capacitance
3.5
pF
2.0
0.8
VCC = 4.5 V; IO = 20 A
4.4
VCC = 4.5 V; IO = 4 mA
3.84
VCC = 4.5 V; IO = 20 A
0.1
VCC = 4.5 V; IO = 4 mA
0.33
1.0
Tamb = 40 C to +85 C
VIH
VIL
VOH
VI = VIH or VIL
VOL
VI = VIH or VIL
II
ICC
supply current
80
ICC
450
Tamb = 40 C to +125 C
VIH
2.0
VIL
0.8
VOH
VI = VIH or VIL
VCC = 4.5 V; IO = 20 A
4.4
VCC = 4.5 V; IO = 4 mA
3.7
VCC = 4.5 V; IO = 20 A
0.1
VCC = 4.5 V; IO = 4 mA
0.4
VOL
VI = VIH or VIL
II
1.0
ICC
supply current
160
ICC
490
74HC_HCT154
8 of 20
74HC154; 74HCT154
NXP Semiconductors
Parameter
25 C
Conditions
40 C to +125 C
Unit
Min
Typ
Max
Min
Max
(85 C)
Max
(125 C)
36
150
190
225
ns
VCC = 4.5 V
13
30
38
45
ns
VCC = 5 V; CL = 15 pF
11
ns
VCC = 6.0 V
10
26
33
38
ns
74HC154
propagation delay
tpd
[1]
VCC = 2.0 V
39
150
190
225
ns
VCC = 4.5 V
14
30
38
45
ns
VCC = 5 V; CL = 15 pF
11
ns
11
26
33
38
ns
VCC = 2.0 V
19
75
95
110
ns
VCC = 4.5 V
15
19
22
ns
13
16
19
ns
60
pF
VCC = 6.0 V
transition time
tt
[2]
VCC = 6.0 V
CPD
power dissipation
capacitance
[3]
propagation delay
[1]
74HCT154
tpd
VCC = 4.5 V
16
35
44
53
ns
VCC = 5 V; CL = 15 pF
13
ns
15
32
40
48
ns
13
ns
15
19
22
ns
60
pF
tt
[2]
VCC = 4.5 V
power dissipation
capacitance
CPD
[1]
[2]
[3]
[3]
74HC_HCT154
9 of 20
74HC154; 74HCT154
NXP Semiconductors
11. Waveforms
9,
$QLQSXW
9,
90
90
*1'
*1'
W 3+/
92+
<QRXWSXW
W 3/+
W3+/
92+
90
92/
90
90
90
92/
W 7/+
W 7+/
DDE
W 7/+
DDE
Table 9.
W3/+
<QRXWSXW
W 7+/
Fig 7.
90
90
(QLQSXW
Fig 8.
Measurement points
Type
Input
Output
VM
VM
74HC154
0.5VCC
0.5VCC
74HCT154
1.3 V
1.3 V
74HC_HCT154
10 of 20
74HC154; 74HCT154
NXP Semiconductors
9,
W:
QHJDWLYH
SXOVH
90
9
9,
WI
WU
WU
WI
SRVLWLYH
SXOVH
9
90
90
90
W:
9&&
9&&
9,
92
5/
6
RSHQ
'87
&/
57
DDG
Test data
Type
Input
VI
tr, tf
CL
RL
tPHL, tPLH
74HC154
VCC
6 ns
15 pF, 50 pF
1 k
open
74HCT154
3V
6 ns
15 pF, 50 pF
1 k
open
74HC_HCT154
Load
S1 position
11 of 20
74HC154; 74HCT154
NXP Semiconductors
$
<
$
<
$
<
$
<
$
$
$
$
VWUREH
(
(
<
GDWD
LQSXW
<
(
(
DDE
74HC_HCT154
<
<
DDE
12 of 20
74HC154; 74HCT154
NXP Semiconductors
627
'
(
$
;
F
+(
\
Y 0 $
=
4
$
$
$
$
SLQLQGH[
/S
/
H
ES
GHWDLO;
Z 0
PP
VFDOH
',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV
81,7
$
PD[
$
$
$
ES
F
'
(
H
+(
/
/S
4
Y
Z
\
PP
LQFKHV
=
R
R
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG
5()(5(1&(6
287/,1(
9(56,21
,(&
-('(&
627
(
06
-(,7$
(8523($1
352-(&7,21
,668('$7(
13 of 20
74HC154; 74HCT154
NXP Semiconductors
6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP
'
627
(
$
;
F
+(
\
Y 0 $
=
4
$
$
$
$
SLQLQGH[
/S
/
ES
H
GHWDLO;
Z 0
PP
VFDOH
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
81,7
$
PD[
$
$
$
ES
F
'
(
H
+(
/
/S
4
Y
Z
\
=
PP
R
R
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
287/,1(
9(56,21
627
5()(5(1&(6
,(&
-('(&
-(,7$
(8523($1
352-(&7,21
,668('$7(
02
14 of 20
74HC154; 74HCT154
NXP Semiconductors
76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP
'
627
(
$
;
F
+(
\
Y 0 $
=
4
$
SLQLQGH[
$
$
$
/S
/
ES
H
GHWDLO;
Z 0
PP
VFDOH
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
81,7
$
PD[
$
$
$
ES
F
'
(
H
+(
/
/S
4
Y
Z
\
=
PP
R
R
1RWHV
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
287/,1(
9(56,21
627
5()(5(1&(6
,(&
-('(&
-(,7$
(8523($1
352-(&7,21
,668('$7(
02
15 of 20
74HC154; 74HCT154
NXP Semiconductors
'+94)1SODVWLFGXDOLQOLQHFRPSDWLEOHWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJH
QROHDGVWHUPLQDOVERG\[[PP
'
%
627
$
$
(
$
F
GHWDLO;
WHUPLQDO
LQGH[DUHD
&
H
WHUPLQDO
LQGH[DUHD
H
\ &
Y 0 & $ %
Z 0 &
E
\
/
H
(K
;
'K
PP
VFDOH
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
81,7
$
PD[
$
E
F
'
' K
(
( K
H
H
H
/
Y
Z
\
\
PP
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
5()(5(1&(6
287/,1(
9(56,21
,(&
-('(&
-(,7$
627
(8523($1
352-(&7,21
,668('$7(
16 of 20
74HC154; 74HCT154
NXP Semiconductors
14. Abbreviations
Table 11.
Abbreviations
Acronym
Description
CMOS
DUT
ESD
ElectroStatic Discharge
HBM
TTL
Transistor-Transistor Logic
MM
Machine Model
Revision history
Document ID
Release date
Change notice
Supersedes
74HC_HCT154 v.7
20160229
74HC_HCT154 v.6
Modifications:
74HC_HCT154 v.6
Modifications:
20070212
74HC_HCT154 v.5
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Table 3 on page 4: Corrected errors in output information.
74HC_HCT154 v.5
20041012
Product specification
74HC_HCT154 v.4
74HC_HCT154 v.4
20041005
Product specification
74HC_HCT154 v.3
74HC_HCT154 v.3
20040601
Product specification
74HC_HCT154_CNV v.2
74HC_HCT154
17 of 20
74HC154; 74HCT154
NXP Semiconductors
Product status[3]
Definition
Development
This document contains data from the objective specification for product development.
Qualification
Production
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warranty and liability Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT154
18 of 20
74HC154; 74HCT154
NXP Semiconductors
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
74HC_HCT154
19 of 20
NXP Semiconductors
74HC154; 74HCT154
4-to-16 line decoder/demultiplexer
18. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application information. . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Contact information. . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section Legal information.