Trang 1

MC LC
Trang
Trang ph ba
Mc lc
Li m u

1
3

PHN 1: TNG QUAN V TI IU KHIN NHIT

Chng I: GII THIU TI
1.1
Mc ch V Phm Vi Nghin Cu
1.2
Tnh hnh nghin cu trong v ngoi nc
1.3
Phng hng v phng php nghin cu
1.4
Kh khn trong qu trnh nghin cu v bin php khc phc
1.5
S khi tng th ca h thng

4
5
5
5
6

PHN 2: C S L THUYT V PHNG PHP NGHIN CU

Chng 1: PHNG PHP O NHIT
1.1
H Thng o Lng C Bn
1.2
S Khi Chi Tit Ca H Thng o
1.3
Cu To Thermocouple
1.4
S Mch IC o v Khuch i Tn Hiu

7
7
9
12

Chng 2: KHI GIAO TIP MY TNH

2.1
S lc v chun RS232
2.2
MAXIM 232 v h IC dng cho bin i TTLRS-232-C

13
15

Chng 3:
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9

KHO ST VI IU KHIN ATMEGA32

c im Chung Ca VK ATMEGA32
S Khi Ca VK ATMEGA32
Chc Nng Cc Chn Ca VK ATMEGA32
Tng Quan V Kin Trc Ca VK ATMEGA32
S T Chc B Nh ATMEGA32
B nh SRAM
B nh EEFROM
B chuyn i A/D bn trong ATmega32
B nh thi Watchdog bn trong

17
19
21
24
27
27
31
33
40

Chng 4:
4.1
4.2
4.3

KHI CNG SUT

Gii Thiu Tng Qut V Solid State Relay (SSR)
Cc loi SSR ca hang OMRON
Cu trc v cch mc ng vo ra ca SSR

41
42
43

Chng II: CC PHNG PHP IU KHIN NHIT

5.1
Phng Php ON/OFF
5.2
iu khin kiu PID
5.2.1 iu khin T L (P)

44
45

Trang 2

5.3

5.2.2 iu khin Tch Phn (I)

5.2.3 iu khin Vi Phn (D)
5.2.4 iu khin Tch Phn - T L (PI)
5.2.5 iu khin Vi Phn T L (PD)
5.2.6 iu khin Vi Phn Tch Phn T L (PID)
iu khin kiu FUZZY
5.3.1 Khi nim c bn
5.3.2 nh ngha tp m
5.3.3 B iu khin m
5.3.4 Thit K B iu Khin M
5.3.5 Thit k PID m

46
46
47
47
48
51
51
52
53
54

PHN 3: KT QU THC HIN TI

Chng 1: NH GI
3.1
Kt Qu iu Khin ON/OFF V p ng Thc T Ca L
3.2
Kt Qu iu Khin PID V p ng Thc T Ca L
3.3
Kt Qu Qu Trnh Nghin Cu Thut Gii FUZZY

62
63
65

Danh mc ti liu tham kho

Ph lc

67
68

Trang 3

LI M U
Trong thi i cng nghip ha hin i ha ngy nay, cng vi s pht trin
nh v bo ca k thut in t trong nhng nm gn y m c th l cng ngh bn
dn v vi in t, cho ra i nhiu sn phm vi x l ngy mt hon thin hn. T
h vi iu khin 8051 kinh in xut hin cc dng khc vi nhng tnh nng u
vit v hon thin hn nh PIC, AVR, LPC Nh vo s pht trin mnh m ca Vi
x l th iu khin t ng tr thnh mt nhu cu rt cn thit trong i sng sinh
hot cng nh sn xut. Di s xut hin ca cc hc thuyt v cc ng dng c th
trong i sng hng ngy, c th ni iu khin t ng ang chi phi dn cuc sng
ca chng ta, mang li s tin nghi v thoi mi cho chng ta. Trong phm vi ti
ny nhm s ng dng Vi iu khin AVR ca h ATMEL thc hin vic o v
iu khin nhit .
iu khin nhit ch l mt lnh vc nh trong iu khin t ng, v cng
c nhiu cng trnh c hiu qu cao nh cc l nung trong cng nghip, cc l
nng dn dng, i hi phi iu khin sao cho nhit bng hoc xp x nhit
t p ng cc iu kin m nhu cu sn xut t ra. ti ny ra i ch nhm
mc ch tm hiu v a ra gii php m c th d dng ng dng c vi gi thnh
r, d thi cng, v hiu qu tm chp nhn c.
Mc d nhm dnh ht tm huyt nghin cu thc hin ti c ng
thi hn. Tuy nhin, y l ti thc t v iu khin nhit u tin m nhm
tham gia thc hin nn c th khng trnh khi sai st trong qu trnh thit k v thi
cng. Rt mong nhn c s ng gp kin ti c th hon thin hn.
Thi cng b iu khin l sy c th nghin cu ti trng, ch ng trong
qu trnh gi u bc tip theo c nh hng vi cng ty Nectokin. Nghin cu mt
s cng ngh mi nh : iu khin dng AVR, PID, k thut iu khin m (Fuzzy)
Nhm nng cao r rt trnh chuyn su ca gio vin. ti thc hin thnh cng
s lm m hnh cho sinh vin thc tp iu khin qu trnh, iu khin h thng t
ng.
Kt thc giai on 1 thc hin ti, nhm hon thnh ng tin ra
nh: thi cng hon chnh l nhit, thit k mch iu khin, mch cng sut, lp trnh
ch iu khin ON/OFF, PID, thit k giao din giao tip my tnh, nghin cu v
vit chng trnh thut gii Fuzzy logic.
Trong giai on 2 s a thut gii Fuzzy vo iu khin l nhit v hon chnh
m hnh xut a vo ging dy.

Trang 4

Phn 1: TNG QUAN V TI IU KHIN

NHIT
1.1 Mc ch i tng v phm vi nghin cu:
Nghin cu mt s cng ngh mi nh : iu khin dng AVR, PID, k thut
iu khin m (Fuzzy) Nhm nng cao trnh chuyn su.
ti thc hin thnh cng s lm m hnh cho sinh vin thc tp iu khin
qu trnh, iu khin h thng t ng..
i tng iu khin l m hnh l sy.
Phm vi v mc ch nghin cu l ng dng nhng kin thc hc vo thc
tin nhm cng c v nng cao trnh .
in tr nhit
nung l

u d nhit
Thermocouple
loi K

M hnh l sy cn iu khin

B iu Khin Thng Dng Trn Th Trng

Thng s:
Kch thc: 48x48x100 (mm), mn hnh LED, s cao 13.5mm, hin th ti 1999,
multi-input K,J,L, Pt100
Kiu iu khin : ON/OFF hoc 2-PID (c auto-tuning)
C th chn nhiu di nhit ; 8 ch cnh bo.
Chc nng kho m bo v.
Ngun cung cp 220VAC, 110VAC, 24VDC (chn).
u ra iu khin 24VDC.

Trang 5

1.2 Tnh hnh nghin cu trong v ngoi nc:

Trong lnh vc khoa hc k thut ti o lng v iu khin nhit khng
phi l mt ti mi, v trn thc t c rt nhiu cng trnh nghin cu v vn
trn. Tuy nhin thc hin c v a vo ng dng trong thc tin sn xut th
hu nh rt t v trn thc t th hu ht cc b o lng v iu khin nhit l c
nhp t cc hng sn xut ln.

1.3 Phng hng v phng php nghin cu:

Thit k v thi cng mch o nhit s dng Thermocouple loi K
Thit k v thi cng mch khuch i s dng IC AD595 chuyn dng cho
thermocouple loi K.
Tm hiu v vi iu khin AVR v phng php chuyn i ADC (Analog to
Digital Convert).
Tm hiu v cc phng php iu khin nhit ON/OFF, PID V FUZZY.
Thit k chng trnh giao din ca b hin th trn LCD 20x4 v phm nhn
giao tip ngi dng..
Tin hnh iu khin l nhit thc t cn chnh cc thng s iu khin.
Thit k mch giao tip my tnh gi cc thng s iu khin v p ng ng
ra.
-

1.4 Nhng kh khn trong qu trnh nghin cu v

bin php khc phc:
-

Nhit l i tng kh o lng v d pht sinh nhiu nht l trong mi

trng sn xut cng nghip nh nh my, x nghip Bin php gii quyt ca
nhm l mc thm t lc nhiu (phn ngun v tn hiu vo) ng thi kt hp
x l chng nhiu bng phn mm.
thc hin thut ton chuyn i t in p tr v ti u d ra nhit i
hi thc hin nhiu php ton nng cao nh hm m, logaric m dng vi iu
khin thc hin th thi gian p ng l rt chm. Sau mt thi gian ti u ha
thut ton vn khng thnh cng bin php c nhm xut l lp bng tra gi
tr quy i t tn hiu u vo tng ng vi nhit thc t, kt qu l tc x
l rt nhanh gn nh tc thi.
Vi iu khin AVR l h vi iu khin tng i mi ca hng ATMEL, l do
nhm chn VK ny v n c tch hp sn b bin i ADC (Analog to Digital)
rt cn cho vic o nhit v mt l do quan trng hn na l nhm mun tm
hiu nghin cu nhng ci mi khng trng lp vi cc ti i trc (thng
dng h 8051 kt hp vi IC chuyn i ADC) . tip cn cch s dng n v
ng dng vo ti trong khong thi gian ngn l mt c gng n lc ht mnh
ca nhm (thit k mch np, mch iu khin, kin trc VK AVR, phn mm
lp trnh, phn mm np, ngn ng lp trnh)

Trang 6

1.5 S khi tng th ca h thng:

Khi Cm Bin
(dng thermocouple
loi K its_90)

Khi Cng Sut iu

Khin L SSR (Solid
State Relay)

Khi Hin Th
(LCD 20x4)

Khi Khuch
i (IC
AD595)

Khi chuyn i ADC

V X L Trung Tm
(AVR ATMEGA32)

Khi Giao Tip

My Tnh
(Max232)
Khi bn phm
(nhp thng s
iu khin)

Trang 7

Phn 2: C S L THUYT V PHNG PHP

NGHIN CU
Chng 1: O NHIT
1.1 H Thng o Lng C Bn:
thc hin php o ca mt i lng no th tu thuc vo c tnh ca
i lng cn o, iu kin o, cng nh chnh xc theo yu cu ca mt php o
m ta c th thc hin o bng nhiu cch khc nhau trn c s ca cc h thng o
lng khc nhau.
S khi ca mt h thng o lng tng qut:
Khi Chuyn
i

Mch o

Khi Hin
Th

Khi chuyn i: lm nhim v nhn trc tip cc i lng vt l c trng

cho i tng cn o bin i cc i lng thnh cc i lng vt l thng
nht(dng in hay in p) thun li cho vic tnh ton.
Mch o: c nhim v tnh ton bin i tn hiu nhn c t b chuyn i
sao cho ph hp vi yu cu th hin kt qu o ca b ch th.
Khi hin th: lm nhim v bin i tn hiu in nhn c t mch o th
hin kt qu o.

1.2 S Khi Chi Tit Ca H Thng o:

Khi Hin
Th

Khi Cng
Sut

iu Khin Chn Knh

Khi Cm
Bin

Khuch i
tn hiu o

Dn Knh
tng t

Khi
ADC

Khi x l
trung tm

ATMEGA 32
Khi Giao Tip
My Tnh

Khi bn
phm

Trang 8

Nguyn l hot ng:

cho mch nh gn hn nhm la chn s dng vi iu khin AVR
ATMEGA 32 ca hng ATMEL tch hp sn b ADC 8 knh..
i tng cn o l i lng vt l,da vo cc c tnh ca i tng cn o
m ta chn mt loi cm bin ph hp bin i thng s i lng vt l cn o
thnh i lng in ,a vo mch ch bin tn hiu(gm:b cm bin,h thng
khuch i,x l tn hiu).
B chuyn i tn hiu sang s ADC(Analog Digital Converter) lm nhim v
chuyn i tn hiu tng t sang tn hiu s v kt ni vi khi x l trung tm.
B vi x l c nhim v thc hin nhng php tnh v xut ra nhng lnh trn
c s trnh t nhng lnh chp hnh thc hin trc .
B dn knh tng t (multiplexers) v b chuyn ADC c dng chung tt
c cc knh . D liu nhp vo vi x l s c tn hiu chn ng knh cn x l a
vo b chuyn i ADC v c ng gi tr c trng ca n qua tnh ton c kt
qu ca i lng cn o.
Khi bn phm l nhng nt nhn ngi dng nhp thng s iu khin.
Khi giao tip my tnh dng IC Max232 truyn v nhn d liu t my tnh.
Khi cng sut dng SSR (Solid State Relay) cung cp nng lng nung
in tr nhit t l.
Khi hin th dng LCD 20x4 thng bo nhit t, nhit io v ch
iu khin.
Phng Php o Nhit :
o nhit l mt phng thc o lng khng in, o nhit c chia
thnh nhiu dy:
+ o nhit thp
+ o nhit trung bnh
+ o nhit cao.
Vic o nhit c tin hnh nh cc dng c h tr chuyn bit nh:
+ Cp nhit in
+ Nhit k in k kim loi
+ Nhit in tr kim loi
+ Nhit in tr bn dn
+ Cm bin thch anh.
o lng cc i lng c nhit ln nh ng dng cho cc l sy nhm
xut s dng cp nhit in thermocouple loi K, c dy o rng (-2700C n
13720C), chu nhit tt.

Trang 9

Hnh dng thc t ca Thermocouple loi K

1.3 Cu To Thermocouple:

Tm o: t -2700C n 13720C
Gm 2 thanh kim loi A v B c ni chung 1 u, khi c s thay i nhit
u ni chung th 2 u cn li s sinh ra sut in ng eAB

S cu to Thermocouple
-

Gi tr ca sut in ng eAB c cho bi cng thc sau:

eAB = T

Vi: l h s t l ca Thermocouple ng vi mi khong nhit s c mt

h s. (nu l loi K : 0,04mV trong dy nhit t 0-2000C)
T l thay i ca nhit
eAB l thay i ca sut in ng ng vi khong nhit thay i
- Nh vy ta thy i vi Thermocouple loi K th s thay i in p ng vi nhit
gn nh l tuyn tnh v ta c c tuyn sau:

Trang 10

th tng quan gia nhit v sut in ng

th tng quan gia h s v nhit

Trang 11
Temp
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150
160
170
180
190
200

0
0.000
0.397
0.798
1.203
1.612
2.023
2.436
2.851
3.267
3.682
4.096
4.509
4.920
5.328
5.735
6.138
6.540
6.941
7.340
7.739
8.138

1
0.039
0.437
0.838
1.244
1.653
2.064
2.478
2.893
3.308
3.723
4.138
4.550
4.961
5.369
5.775
6.179
6.580
6.981
7.380
7.779
8.178

2
0.079
0.477
0.879
1.285
1.694
2.106
2.519
2.934
3.350
3.765
4.179
4.591
5.002
5.410
5.815
6.219
6.620
7.021
7.420
7.819
8.218

3
0.119
0.517
0.919
1.326
1.735
2.147
2.561
2.976
3.391
3.806
4.220
4.633
5.043
5.450
5.856
6.259
6.660
7.060
7.460
7.859
8.258

4
0.158
0.557
0.960
1.366
1.776
2.188
2.602
3.017
3.433
3.848
4.262
4.674
5.084
5.491
5.896
6.299
6.701
7.100
7.500
7.899
8.298

5
0.198
0.597
1.000
1.407
1.817
2.230
2.644
3.059
3.474
3.889
4.303
4.715
5.124
5.532
5.937
6.339
6.741
7.140
7.540
7.939
8.338

6
0.238
0.637
1.041
1.448
1.858
2.271
2.685
3.100
3.516
3.931
4.344
4.756
5.165
5.572
5.977
6.380
6.781
7.180
7.579
7.979
8.378

7
0.277
0.677
1.081
1.489
1.899
2.312
2.727
3.142
3.557
3.972
4.385
4.797
5.206
5.613
6.017
6.420
6.821
7.220
7.619
8.019
8.418

8
0.317
0.718
1.122
1.530
1.941
2.354
2.768
3.184
3.599
4.013
4.427
4.838
5.247
5.653
6.058
6.460
6.861
7.260
7.659
8.059
8.458

Bng Tng Quan Gia Nhit v in p u d t 00-2000

9
0.357
0.758
1.163
1.571
1.982
2.395
2.810
3.225
3.640
4.055
4.468
4.879
5.288
5.694
6.098
6.500
6.901
7.300
7.699
8.099
8.499

Trang 12

1.4 S Mch IC o v Khuch i Tn Hiu

Nguyn l hot ng ca mch:

Tn hiu nhit c o qua u d nhit (Thermocouple loi K) l tn hiu sut
in ng rt nh khong 0,04mV/0C sau c a vo ng vo IC AD595 l
dng IC khuch i chuyn dng cho Thermocouple loi K, tn hiu ny s c
khuch i ln 250 ln v ng ra t b khuch i s c gi tr khong 10mV/0C
sau c a vo ng vo b chuyn i ADC.
B ADC bn trong VK Atmega32 s bin i tn hiu in p thu c (dng
analog) thnh gi tr s (digital) cha trong thanh ghi ADCW v VK s c lp
trnh chuyn i gi tr ny thnh gi tr nhit tng ng.
T gi tr nhit c c, VK s so snh vi gi tr nhit cn iu khin (c
th ci t) v la chn phng thc iu khin ON/OFF, PID, FUZZY
B hin th l mn hnh LCD20x4 s c lp trnh thng bo nhit hin ti,
nhit cn iu khin v phung thc iu khin.

VCC

14
15
16
17
18
19
20
21

U2CON12
UP
DOWN

MODE
BANPHIM

1
2
3
4

1
2
3
4

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

12

CAP NP

13
CRYSTAL

X2
X1

LED

VCC

C1
C
C2

VCC(5V)
R5

C
1

D1

VCC(12v)
J1
ISO5
1
OPTO ISOLATOR-A 2
CON2

31
9

a
RST

VCC(5v)

R1

30
32

AVCC
AREF

Y1

ad0
ad1
ad2
ad3

29
28
27
26
25
24
23
22

PC7
PC6
PC5
PC6
PC4
PC3
PC2
PC1

C3

C4
CAP NP

40
39
38
37
36
35
34
33

PAO/AD0
PA1/ADC1
PA2/ADC2
PA3/ADC3
PA4/ADC4
PA5/ADC5
PA6/ADC6
PA7/ADC7

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7

ATMEGA32

U1
1
2
3
4
5
6
7
8

R6

VCC

LCD

1
2
3
4
5
6
11
12
13
14
15
16

10

VCC(5V)

J5

NUT RESET

S mch tng th

Trang 13

Chng 2: KHI GIAO TIP MY TNH

a s cc thit b ngy nay u c th giao tip vi my tnh v cc tnh nng
tuyt vi ca my tnh. Do , board mch iu khin y cng c trang b c
kh nng . Mc d n cng c yu cu bt buc l np chng trnh iu khin t
my tnh, nhng xa hn na n c th trao i vi my tnh v cc thng s ca qu
trnh iu khin, trng thi ca mch v c th c iu khin bi my tnh .
2.1 S lc v chun RS-232 :
Trong k thut truyn d liu gia cc h thng vi nhau, ngi ta c th phn
loi 2 cch truyn : song song hay ni tip. Nhng do cch truyn song song rt d b
nhiu tc ng nn khng th truyn i xa c, do cng t c s dng. Truyn
ni tip cng c 2 loi : ng b hay khng ng b. Trong cch truyn ng b, dy
k t c truyn s km theo k t ng b l SYN (m ASCII l 22). Phng thc
ny cho tc truyn kh cao nhng do mch x l truyn v nhn (bao gm mch
thm k t ng b, pht hin v bo sai) kh phc tp nn ch dng trong cc ng
dng c yu cu cao v tc truyn. Cn trong cc ng dng thng thng, nht l
cc ng dng trong lnh vc iu khin t ng, th khng c yu cu v tc m
yu cu v tin cy nhng mch thc hin n gin, r tin. Khi , cch truyn
khng ng b rt ph hp. Theo cch truyn ny th cc k t c truyn ring r,
phn lm tng frame c bit bt u, cc bit d liu ca k t cn truyn, bit chn l (
kim tra li ng truyn, v cc bit kt thc.
Chun RS-232-C (do EIA a ra) l mt trong nhng phng thc truyn ni
tip khng ng b. Theo chun ny th vic truyn thng c thc hin ngay ti ch
bng cch truyn v nhn mt chui cc xung in p lin tc tng ng vi cc bit.
D liu mc TTL c bin i sang cc mc in p nh sau : mc 1 l t -3V n
-15V (tiu chun l -12V), v mc 0 l t +3V n +15V (tiu chun l +12V).
Ta thy rng vic truyn v nhn cc mc in p nh vy c thc hin rt
n
gin. Chnh v vy m chun RS-232-C tr thnh giao din ph bin rng ri nht,
c trang b hu ht trn cc my tnh nh l mt trong nhng thnh phn cu thnh
nn h thng.
Cc thut ng c lin quan n giao thc truyn thng RS-232-C :
Chu k truyn d liu : tc truyn d liu c tnh bng bit/giy, nhng
phn bit vi cch truyn ng b, ngi ta s dng n v baud (tng ng
vi bit/giy trong thi gian c d liu truyn) tng nh n nh
khoa hc Php th k 19 l J. M. E. Baudot .
Trng thi nh du : l khong thi gian khng c d liu truyn. Trong sut
thi gian ny, thit b pht s gi ng truyn mc cao.
Bit bt u : mt bit thp cho bit vic truyn d liu s bt u.
Cc bit k t : l dng d liu gm 5, 6, 7, hay 8 bit m ha k t c
truyn.
Bit c trng s thp nht (LSB) l bit u tin c truyn.
Bit chn l : l mt bit ty chn (c th c hay khng), c pht i sau cc
bit k t dng kim tra cc li truyn d liu. Trong ch kim tra tnh
chn, thit b pht s bt 1 hay xa v 0 bit chn l tnh tng cc bit 1 ca k

Trang 14

t
c
truyn v bit chn l l mt s chn. Cn trong ch kim tra tnh l, bit chn
l
thc hin tnh tng cc bit 1 phi l mt s l.
Cc bit kt thc : mt hay nhiu bit cao c chn trong dng truyn bo
vic
kt thc truyn mt k t, cng nh cho thit b nhn c thi gian chun b

sn sng cho vic nhn k t k tip.

Mt khung truyn trong chun RS232

Trong giao thc RS-232-C, cc tham s truyn v nhn c chn t mt min
cc gi tr chun. Sau y l cc thng s ph bin nht trong cc my vi tnh IBM :
Tc truyn : 50, 110, 300, 600, 1200, 2400, 4800, 9600, 19200.
Bit d liu : 5, 6, 7, hay 8.
Bit chn l : chn, l, khng kim tra.
Bit kt thc : 1,5 hay 2.
Cc u ni :
Theo chun RS-232-C, u ni phn cng xc nh vi 25 chn, gi l chn
cm D-Shell hay DB-25. Nhng khng phi tt c cng ni tip u s dng u ni
DB-25. Mt s my tnh nh PCJr dng chn cm BERG 16 chn, my PC AT th s
dng chn cm D-Shell 9 chn.

Cc u ni thng dng trn my tnh

Trang 15

Bng chc nng cc chn cng RS 232

2.2 MAXIM 232 v h IC dng cho bin i TTLRS-232-C :
H IC t MAX220-MAX249 c sn xut cho truyn thng EIA/TIA-232E v
V.28/V.24, c th l cho nhng ng dng m khng c sn in p 12V. H IC ny
c bit thch hp cho nhng h thng dng pin c cng sut thp, do chng c ch
h ngun lm gim cng sut tiu tn xung di 5W. MAX225, MAX233,
MAX235, MAX245-MAX247 khng cn cc linh kin ph bn ngoi, c dng cho
nhng ni tit kim khng gian.
Cc c im chnh :
Ngun cung cp +5V (MAX231/MAX239 dng ngun +5V v +12V). H ngun
cng sut thp nhng vn c th nhn (MAX223/MAX242e. H tr chun EIA/TIA232E v V.28
Nhiu b nhn v pht.
Pht hin t mch ng truyn (MAX243).
1.Cu to chn :

Trang 16

S Kt Ni RS232
Ta thy rng MAX232 cn c 4 t mc ngoi bin i in p t 0V n 5V
thnh -12V n 12V ph hp cho truyn thng theo chun RS-232. ngoi ra c 4 b
khuch i o nhm chuyn t mc TTL ra chun RS-232.
Trong php giao tip thng thng, ch cn 3 dy ni : TXD, RXD, GND l m
bo cho giao tip.

Trang 17

Chng 3: KHO ST VI IU KHIN ATMEGA32

3.1 c im Chung Ca VK ATMEGA32:
Vi iu khin ATmega32 l mt loi vi iu khin tng i mi ca hng ATMEL
vi kin trc rt phc tp. ATmega32 s dng kin trc RISC (Reduced Instruction
Set Computer) AVR.
ATmega32 vi kin trc RISC c ch tiu cht lng cao v tiu th nng lng
t:

131 lnh hu ht c thc hin trong mt chu k xung nhp.

32 thanh ghi lm vic a nng.
Cung cp y cc trng thi hot ng
Tc x l lnh ln n 16 triu lnh/giy tn s 16MHz.

B nh d liu v b nh chng trnh khng t mt d liu:

32K byte b nh Flash lp trnh c ngay trn h thng, c th np xo
10000 ln.
1K byte b nh EEFROM lp trnh c ngay trn h thng, c th ghi xa
100000 ln.
2K byte b nh SRAM.
C th giao tip vi 64K byte b nh ngoi.
Kha bo mt phn mm lp trnh c.
Giao din ni tip SPI lp trnh ngay trn h thng.
Cc tnh nng ngoi vi:
Hai b m/ b nh thi 8 bit vi ch so snh v chia tn s tch bit.
Hai b m/ b nh thi 16 bit vi ch so snh, chia tn s tch bit v
ch bt mu (Capture Mode).
B m thi gian thc (RTC) vi b dao ng tch bit.
Bn b iu ch rng xung PWM 8 bit.
B bin i ADC bn trong 8 knh 10 bit.
2 b USART ni tip lp trnh c.
C giao thc truyn SPI ch v t
B nh thi Watchdog lp trnh c vi b dao ng trn chip.
Mt b so snh Analog.
Cc tnh nng vi iu khin c bit:

C mch power - on reset v c th reset bng phn mm.

C ngun dao ng ni tch hp sn bn trong.
C 2 nguyn nhn gy ngt l bn trong v bn ngoi.
C 6 ch ng: ngh (Idle). Tit kim nng lng (power save) v power
down, ADC Noise Reduction, Standby and Extended Standby.

Vo ra v cc cch ng v

Trang 18

32 ng vo ra lp trnh c.
40 chn dn kiu v ch nht (PDIP), 44 chn dn kiu v vung (TQFP)
in th lm vic:
VCC = 2,7V n 5,5V i vi ATmega32L.
VCC = 4,5V n 5,5V i vi ATmega32.
Vng tc lm vic:
0 n 8 MHz i vi ATmega32L.
0 n 16 MHz i vi ATmega32.
Nng lng tiu th ti tn s 1MHz, 3V, 25oC i vi ATmega32L:
Ch hot ng:

1,1mA

Ch ngh:

0,35mA

Ch ngun gim:

<1A

Hnh dng phn b chn vo ra ca ATmega32 dng PDIP

Trang 19

Hnh dng phn b chn vo ra ca ATmega32 dng TQFP/MLF

ATmega32 l b vi iu khin RISC 8 bit tiu th nng lng nhng t hiu
sut rt cao, da trn kin trc RISC AVR. Bng vic thc hin cc lnh trong mt chu
k xung nhp, ATmega32 t c tc x l d liu ln n 1 triu lnh/giy tn
s 1MHz. ATmega32 cn cho php ngi thit k h thng ti u ho mc tiu th
nng lng m vn m bo tc x l.

3.2 S Khi Ca VK ATMEGA32:

Trang 20

Trang 21

Kin trc c bit ca ATmega32 kt hp tp lnh phong ph v s lng vi 32

thanh ghi lm vic a nng cho php ngi lp trnh khai thc n mt cch hiu qu
ti u. Ton b 32 thanh ghi u c ni vi ALU cho php truy cp hai thanh ghi
c lp bng 1 lnh n trong mt chu k xung nhp. Kin trc RISC gip ATmega32
t tc x l nhanh gp 10 ln vi vi iu khin kin trc CISC thng thng.
ATmega cung cp 64K bytes b nh Flash lp trnh c trong h thng v c kh
nng c/xa/vit, 1K bytes b nh EFPROM, 2K bytes SRAM, 53 ng vo ra a
nng, 32 thanh ghi lm vic a nng, b m thi gian thc (RTC), 4 b nh thi/m
linh hot vi ch so snh v iu ch rng xung, 2 b USART, b ADC 8 knh
10bit vi s la chn ng vo c th lp trnh c li, b nh thi watchdog lp
trnh c vi b dao ng bn trong, mt cng ni tip SPI, 6 ch tit kim nng
lng la chn c bng phn mm.
c bit ch Idle lm ngng hot ng ca CPU trong khi b nh SRAM, cc b
nh thi/m, cng SPI v h thng ngt vn tip tc hot ng.
Ch Power Down lu tr ni dung thanh ghi nhng gii phng b dao ng, cm
tt c cc chc nng khc trn chp cho n khi xut hin mt ngt k tip hay tn hiu
Reset cng.
Ch Power Save cho php b dao ng nh thi tip tc chy cho php ngi
dng tip tc trong khong thi gian no y (t trc) trong khi nhng thit b khc
trong ch ng.
Ch ADC Noise Reduction tt c cc ng I/0 v CPU u ngng hot ng ngoi
tr timer v ADC vn hot ng, gim mc ti thiu nhiu trong chuyn i ADC.
Ch d phng Standby b dao ng vn chy trong khi nhng thit b trong ch
ng
ATmega32 c cng ty ATMEL ch to vi cng ngh b nh khng t mt d liu.
B nh Flash ISP trn chip cho php b nh chng trnh c th c lp trnh li
ngay trn h thng, thng qua mt giao din ni tip SPI hoc mt b np chng
trnh vo b nh khng t mt d liu.
Bng cch kt hp mt CPU 8 bit c kin trc RISC vi b nh Flash lp trnh c
trong h thng trn mt chp n l, ATmega32 l loi vi iu khin rt mnh vi tnh
linh hot cao trong s dng v chi ph hp l i vi nhiu ng dng iu khin chng
trong thc t.
ATmega32 c h tr bng tt c cc cng c lp trnh v pht trin h thng hin
c: trnh bin dch C, trnh bin dch Macro Assembler, trnh g ri/m phng v cc
kits th nghim.

3.3 Chc Nng Cc Chn Ca VK ATMEGA32:

VCC: in p ngun nui.
GND: t.
Port A (PA7PA0)
- Cc chn ca Port A l ng vo ca analog ca b chuyn i ADC
- Port A cng dng lm 8 bit xut nhp d liu c nh a ch nu b
chuyn i ADC khng c s dng. Nhng chn ca Port ny c cung

Trang 22

cp in tr ni ko ln bn trong. B m ng ra ca Port A th c thit k

tng li i xng c th hat ng c ch sink v source. Khi cc
chn t PA0 n PA7 l cc ng vo c t xung mc thp t bn ngoi,
chng s l ngun dng nu nh cc in tr ni ln ngun dng c kch
hot. Cc chn ny s trng thi tng tr cao khi tn hiu Reset mc tch cc
hoc ngay c khi khng c dao ng.
Port B (PB7PB0)
- Port B dng lm 8 bit xut nhp d liu c nh a ch. Nhng chn
ca Port ny c cung cp in tr ni ko ln bn trong. B m ng ra ca
Port B th c thit k tng li i xng c th hat ng c ch
sink v source. Khi cc chn t PB0 n PB7 l cc ng vo c t xung
mc thp t bn ngoi, chng s l ngun dng nu nh cc in tr ni ln
ngun dng c kch hot. Cc chn ny s trng thi tng tr cao khi tn
hiu Reset mc tch cc hoc ngay c khi khng c dao ng.
- Cc chn ca Port B cn c cc chc nng c bit khc nh sau:

Port C (PC7PC0)
- Port C dng lm 8 bit xut nhp d liu c nh a ch. Nhng chn
ca Port ny c cung cp in tr ni ko ln bn trong. B m ng ra ca
Port C th c thit k tng li i xng c th hat ng c ch
sink v source. Khi cc chn t PC0 n PC7 l cc ng vo c t xung
mc thp t bn ngoi, chng s l ngun dng nu nh cc in tr ni ln
ngun dng c kch hot. Cc chn ny s trng thi tng tr cao khi tn
hiu Reset mc tch cc hoc ngay c khi khng c dao ng.
- Cc chn ca Port C cn c cc chc nng c bit khc nh sau:

Trang 23

Port D (PD7PD0)
- Port D dng lm 8 bit xut nhp d liu c nh a ch. Nhng chn
ca Port ny c cung cp in tr ni ko ln bn trong. B m ng ra ca
Port D th c thit k tng li i xng c th hat ng c ch
sink v source. Khi cc chn t PD0 n PD7 l cc ng vo c t xung
mc thp t bn ngoi, chng s l ngun dng nu nh cc in tr ni ln
ngun dng c kch hot. Cc chn ny s trng thi tng tr cao khi tn
hiu Reset mc tch cc hoc ngay c khi khng c dao ng.
- Cc chn ca Port D cn c cc chc nng c bit khc nh sau:

Reset: Ng vo c t li. ATmega32 s c t li khi chn ny mc thp

trong hn 50ns hoc ngay c khi khng c tn hiu xung clock. Cc xung ngn
hn khng to ra tn hiu t li.
AVCC: Cung cp ngun cho Port A v b chuyn i ADC hot ng. Ngay khi
khng s dng b chuyn i ADC th chn AVCC vn phi c kt ni ti
ngun VCC.
AREF: y l chn iu chnh in p tham chiu cho b chuyn i A/D.
XTAL1: Ng vo b khuch i o v ng vo mch to xung nhp bn trong.
XTAL2: Ng ra b khuch i o.
B to dao ng thch anh :

Trang 24

XTAL1 v XTAL2 ln lt l li vo v li ra ca mt b khuch i o,

b khuch i ny c b tr lm b to dao ng trn chip nh trn
hnh 3.
iu khin c b Vi iu Khin t mt ngun xung nhp bn ngoi,
chn XTAL2 khng, chn XTAL1 c ni vi tn hiu dao ng bn
ngoi .

Hnh 2.1: Cch b tr iu khin b vi iu khin t mt ngun xung bn ngoi.

Hnh 2.2: Cch kt ni b dao ng

3.4 Tng Quan

ATMEGA32:

Kin

Trc

Ca

VK

Trang 25

S khi kin trc ca ATMEGA32

AVR s dng kin trc Harvard vi b nh v bus ring bit cho chng chnh
v d liu, b nh chng trnh c thc thi vi mt ng ng hai tng. Trong khi
mt lnh ang c thc thi th lnh tip theo c nhp vo b nh chng trnh.
Gii php ny cho php cc lnh c thc thi trong mi chu k xung nhp. B nh
chng trnh l b nh flash lp trnh c.
Cc thanh ghi a nng truy cp nhanh gm 32 thanh ghi 8 bit c truy cp
trong mt chu k xung nhp. iu ny c ngha l ALU thc hin c mt php ton:
hai ton hng c xut t tp cc thanh ghi a nng, php ton c thc hin v kt
qu c lu tr li vo tp cc thanh ghi trong mt chu k xung nhp.
6 trong s 32 thanh ghi ny c th dng lm 3 con tr a ch gin tip 16 bit
nh a ch khng gian d liu v cho php tnh a ch hiu dng. Mt trong ba con
tr a ch cng c dng lm con tr a ch cho chc nng tm kim bng hng s
trong b nh Flash. Cc thanh ghi c chc nng b sung ny l cc thanh ghi 16 bit X,
Y, Z.
ALU: h tr cc chc nng s hc v logic gia cc thanh ghi hoc gia mt
hng s v cc thanh ghi. Cc php ton trong mt thanh ghi cng c thc hin

Trang 26

trong ALU. Sau php ton s hc, thanh ghi trng thi s cp nht v phn hi li kt
qu tnh ton.
Ton b khng gian a ch c truy nhp trc tip nh cc lnh nhy v lnh gi.
Hu ht cc lnh AVR c nh dng t n 16 bit. Mi a ch ca b nh chng
trnh cha mt lnh 16 hoc 32 bit.
Khi ngt mm do c cc thanh ghi iu khin trong khng gian vo ra v mt
bit cho php ngt ton cc trong thanh ghi trng thi. Mi ngt u c mt vect ngt
ring. Cc ngt c th t u tin tng ng vi v tr vect ngt ca chng a ch
ca vect ngt cng thp th th t u tin cng cao.
Khng gian b nh vo ra cha 64 a ch cho cc chc nng ngoi vi ca CPU
nh cc thanh ghi iu khin, b m/ nh thi, cc b bin i tng t/s v cc
chc nng vo/ra khc. B nh vo/ra c th truy cp trc tip hoc nh cc v tr
trong khng gian d liu ngay sau cc v tr ca tp cc thanh ghi a nng t a ch
$20 n $5F. ATmega32 m rng thm khng gian t $60 n $FF trn SRAM ch c
cc lnh ST/STS/STD v LD/LDS/LDD c s dng.
Trong qu trnh gi ngt v chng trnh con, a ch tr v ca b m chng
trnh PC c lu vo ngn xp. Ngn xp c cp pht trong b nh d liu SRAM
nn kch thc ch b gii hn bi dung lng v khng gian s dng ca b nh
SRAM. Tt c chng trnh ca ngi dng phi khi to con tr ngn xp SP (stack
pointer) khi bt u chng trnh (trc khi chng trnh con v ngt c thc thi).
Con tr ngn xp 16 bit SP c truy cp c/vit trong khng gian vo/ra. B nh
SRAM 2kB c th c truy cp d dng thng qua nm ch nh a ch c
cung cp trong kin trc AVR.

Trang 27

3.5 S T Chc B Nh ATMEGA32:

Data Memory Map

3.6 B nh SRAM

S T Chc B Nh Cc Thanh Ghi Chc Nng c Bit

Trang 28

B nh SRAM c trong hu ht cc b x l ca Vi iu Khin AVR. Dung lng

ca b nh SRAM 2K byte, b nh SRAM c truy nhp bng cch s dng nhiu
lnh truy nhp d liu trc tip hoc gin tip, b nh SRAM cng c s dng cho
ngn xp, thi gian truy nhp vo b nh SRAM bng 2 chu k ng h.
32 a ch u tin trong SRAM l dnh cho 32 thanh ghi a nng (R0 n R31). Tp
thanh ghi c tch thnh 2 phn, mi phn c 16 thanh ghi nh s t R0 n R15 v
R16 n R31. Tt c cc lnh thao tc trn cc thanh ghi u c th truy cp trc tip
hoc gin tip n tt c cc thanh ghi. Nhng c mt ngoi l l c mt s cc lnh
(SBCI, SUBI, CPI, ANDI v ORI ) ch tc ng n thanh ghi t R16 n R31.
Cc thanh ghi R0 v R26 n R31 c cc chc nng b sung. Thanh ghi R0 c s
dng trong cc lnh np b nh chng trnh LPM (load program memory), trong khi
cc thanh ghi R26 n R31 c s dng lm cc thanh ghi con tr. Cc thanh ghi con
tr ny c s dng trong nhiu lnh gin tip dng trong thanh ghi.

Cc Thanh Ghi Con Tr X, Y, Z

64 a ch tip theo ($00 n $5F) c dng cho cc thanh ghi I/O, ta c th
truy xut cc thanh ghi I/O ny bng cc lnh IN, OUT, SBI, CBI.
ATmega32 m rng khng gian I/O t $60 n $FF trn SRAM ch c cc lnh
ST/STS/STD v LD/LDS/LDD mi c s dng.

Trang 29

1. Giao tip vi b nh SRAM ngoi:

ATmega32 cho php ngi lp trnh c th kt ni b nh SRAM ngoi ln ti 32K
byte.
Khi giao tip vi b nh SRAM ngoi:
Port A ng vai tr l 8 ng a ch thp v 8 ng d liu t AD0 n AD7
hot ng theo kiu a hp.
Port C cng ng vai tr nh 8 ng a ch cao t A8 n A15.
ALE l chn cho php cht a ch.
S dng chn RD v WR ca ATmega32 kt ni n chn RD v WR ca
SRAM ngoi.
giao tip c vi b nh SRAM ngoi bit SRE (bit7) trong thanh ghi MCUCR
phi c thit lp ln 1 v s dng cc thanh ghi MCUCR, XMCRA, XMCRB
iu khin.
Thi gian truy nhp mc nh i vi SRAM ngoi l bng 3 chu k ng h. Thi
gian ny c th lm tng ln 4 chu k ng h bng cch thit lp bit SRW10 (bit 6)
trong thanh ghi MCUCR.
ATmega32 khng c tp lnh ring truy xut SRAM ngoi tuy nhin ATmega32
cho php truy cp b nh SRAM ngoi bng cc lnh nh b nh SRAM ni. iu
c ngha l khi bit SRE trong thanh ghi MCUCR c t ln 1 th SRAM ngoi lc
ny c xem nh l mt SRAM ni c xp chng tip theo ln 2K byte SRAM ni
ca ATmega32. Khi ta truy xut d liu bng tp lnh mt cch d dng.

Trang 30

Kt ni SRAM ngoi vi ATmega32

Trang 31

3.7 B nh EEFROM
ATmega32 cha 1K byte b nh EEFROM lp trnh c ngay trn h thng, c th
ghi xa 100000 ln.
B nh EEFROM c truy nhp qua cc thanh ghi truy nhp EEFROM: Thanh ghi
a ch EEAR, thanh ghi d liu EEDR, thanh ghi iu khin EECR.
Gii thiu cc thanh ghi truy xut EEFROM:
EEPROM Address Register - EEARH and EEARL
-

EERA1 EERA EERA

0
9
8

EERA
H

EERA EERA EERA EERA EERA EERA2 EERA EERA

7
6
5
4
3
1
0

EERA
L

Bits 15..11:
y l cc bit c dnh ring v lun lun c t bng 0.
Bits 10..0 EEAR10..0:
y l thanh ghi c s dng t a ch ca b nh EEPROM m d
liu cn ghi vo hoc c ra t .
Do dung lng b nh EEPROM 1K byte nn a ch EEPROM phi cn
thc t l 2 thanh ghi EERAH v EERAL.
EEPROM Data Register - EEDR
MSB

LSB

EEDR

Thanh ghi EEDR l thanh ghi d liu b nh EEPROM v l mt thanh ghi

c/ghi.
Khi mun ghi d liu vo b nh EEPROM ta np cc d liu cn thit vo
thanh ghi EEDR.
Khi mun c d liu t b nh EEPROM th phi ch qu trnh ghi thc
hin xong ri c d liu t thanh ghi EEDR.
EEPROM Control Register - EECR
-

EERIE EEMWE EEWE EERE

EECR

Thanh ghi EECR c cc bit iu khin c/ghi vo b nh EEFPROM.

Bit 7..4:
y l cc bit c ATmega32 dnh ring v lun lun c t bng 0.
Bit 3 - EERIE
Bit ny cho php EEPROM sn sng ngt.

Trang 32

Khi bit I trong thanh ghi SREG v bit EERIE c t ln 1 th EEPROM

sn sng xy ra ngt.
Khi bit EERIE c xa v 0 th EEPROM cm ngt.
Bit2 - EEMWE
y l bit la chn EEPROM c c ghi d liu vo hay khng.
Khi bit EEMWE c thit t ln 1 v bit EEWE c t ln 1 trong 4
chu k xung clock th d liu s c vit vo b nh EEPROM ti a ch
la chn.
Khi bit EEMWE c xa v 0 th bt chp vic bit EEWE c t ln 1
vic ghi d liu vo EEPROM khng thc hin c.
Bit EEMWE c t ln 1 bi phn mm v c xa v 0 bi phn cng
sau 4 chu k xung clock.
Bit 1 - EEWE
Bit EEWE cho php ghi d liu vo b nh EEPROM.
Khi a ch v d liu c la chn hp l th ghi bit EEWE ln 1, d
liu s c vit vo b nh EEPROM.
Bit EEMWE bt buc phi c ghi ln 1 trc khi t bit EEWE ln 1 th
mi ghi c d liu vo EEPROM.
EEPROM khng th lp trnh trong khi CPU ang truy cp b nh Flash.
Bit 0 - EERE
Bit EERE cho php c d liu t b nh EEPROM.
Khi a ch c lp chnh xc trong thanh ghi EEAR th khi ghi bit EERE
ln 1 s cho php c d liu t EEPROM.
Khi EEPROM c c th CPU s tm dng trong 4 chu k xung clock
trc khi lnh k tip c thc thi.
Cc bc ghi d liu vo b nh EEPROM:
i cho n khi no bit EEWE c xa v 0
i cho n khi no bit SPMEN trong thanh ghi SPMCSR c xa v 0
Vit a ch cn np cho EEPROM vo thanh ghi EEAR
Vit d liu cn np cho EEPROM vo thanh ghi EEAR
Thit lp bit EEMWE ln 1 trong khi bit EEWE c xa v 0
Khi bit EEMWE c ghi ln 1, sau 4 chu k xung clock mi ghi bit EEWE ln
1
Khi bit EEWE va c thit lp ln 1, CPU s tm dng trong 2 chu k xung
clock trc khi lnh k tip c thc thi.

Trang 33

3.8 B chuyn i A/D bn trong ATmega32

c im:
ATmega32 c b bin i tng t sang s vi phn gii 10bit.
Thi gian bin i t 65 256 s.
Mt b dn knh a hp 8 li vo, mi knh c dn ring l ti b hin
th ADC.
C th la chn chuyn i 1 knh hay nhiu knh.
in p ng vo ca ADC rng t 0 VCC.
C th la chn c in p tham chiu 2,56V.
ADC c th bt u chuyn i bi ch t ng Trigger bng cnh ln
da trn la chn ngun.
Xut hin ngt trong ADC khi chuyn i hon thnh.
S sp xp cc chn li vo ca b bin i A/D
ATmega32

Tn Hiu

PF7
PF6

ADC7
ADC6

PF5

ADC5

PF4

ADC4

PF3

ADC3

PF2

ADC2

PF1

ADC1

Trang 34

S khi chuyn i A/D

1. Gii thiu cc thanh ghi chuyn i ADC
ADC Multiplexer Selection Register ADMUX
REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1

MUX0

Bit 7:6 REFS1:0:

Bit la chn in p tham chiu cho ADC.
Nu bit ny thay i trong qu trnh chuyn i ADC th s thay i ny
khng lm nh hng ti qu trnh v kt qu chuyn i ADC cho ti khi

Trang 35

chuyn i ny c hon thnh ( Bit ADIF trong thanh ghi ADCSRA c

t ln 1).
in p tham chiu ni khng c s dng nu in p tham chiu ngoi
c s dng ti chn AREF.
Bng la chn in p tham chiu cho ADC:
REFS1 REFS0 in p tham chiu ADC
0
0
AREF ( Vref ni c tt)
0
1
AVCC vi t ni bn ngoi ti chn AREF
1
0
Cha s dng
1
1
in p tham chiu ni l 2,56V vi t ni bn ngoi
ti chn AREF
Bit 5 ADLAR:
Bit ADLAR nh hng n kt qu chuyn i ADC t trong thanh ghi d
liu ADC.
Nu bit ny c t ln 1 th kt qu c iu chnh tri, ngc li th kt
qu c iu chnh phi.
S thay i bit ADLAR s nh hng trc tip n thanh ghi d liu ADC
bt chp s chuyn i ang din ra.
Bits 4:0 MUX4:0:
Bit la chn knh ng vo v li (knh no c la chn s c kt
ni n ADC v cc bit ny la chn li cho 2 knh khc nhau).
Nu bit ny thay i trong qu trnh chuyn i ADC th s thay i ny
khng lm nh hng ti qu trnh v kt qu chuyn i ADC cho ti khi
chuyn i ny c hon thnh ( bit ADIF trong thanh ghi ADCSRA c
t ln 1).

Trang 36

Bng La chn knh ng vo v li:

ADC Control and Status Register A ADCSRA

ADEN

ADSC ADATE

ADIF

ADIE ADPS2 ADPS1 ADPS0

Bit 7 ADEN
Khi bit ny c t ln 1 cho php ADC hot ng, ngc li s cm
ADC. Trong lc qu trnh chuyn i ang tin hnh ta xa bit ny v 0 th
qu trnh chuyn i s kt thc.
Bit 6 ADSC
Khi bit ny c t ln 1 cho php bt u chuyn i A/D.
Bit 5 ADATE:
ADC bt u chuyn i cnh dng ca tn hiu trigger. Trigger source
s c la chn bi s la chn bit ADTS trong thanh ghi ADSCRB.

Trang 37

Bit 4 ADIF
y l c ngt ADC.
Bit ny c t ln 1 khi ADC chuyn i hon thnh v thanh ghi d liu
c cp nht.
Bit 3 ADIE
C cho php ngt ADC.
Khi bit ADIE v bit I trong thanh ghi SREG c t ln 1 th khi chuyn
i hon thnh cho php ngt ADC c kch hot.
Bits 2:0 ADPS2:0:
y l bit xc nh h s chia gia tn s thch anh v thi gian chuyn i ADC:
Bng Xc nh h s chia gia tn s thch anh v thi gian chuyn i A/D
ADPS2 ADPS1 ADPS0
H s chia
0
0
0
2
0
0
1
2
0
1
0
4
0
1
1
8
1
0
0
16
1
0
1
32
1
1
0
64
1
1
1
128
ADC Data Register ADCL and ADCH
ADLAR = 0
ADC9 ADC8 ADCH
ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 ADCL
ADLAR = 1
ADC9 ADC8 ADC7 ADC6 ADC5 ADC4 ADC3 ADC2
ADC1 ADC0
-

ADCH
ADCL

Khi qu trnh chuyn i ADC hon thnh, kt qu c tm thy trong 2

thanh ghi ADCH v ADCL.
Khi ADCL c c th thanh ghi d liu khng c cp nht cho n khi
ADCH c c. V vy, nu kt qu l iu chnh tri v khng hn 8 bit
th ch cn c thanh ghi ADCH, cn trng hp khc th ADCL c c
u tin ri mi ti ADCH.
Bit ADLAR trong thanh ghi ADMUX v bit MUXn trong thanh ghi
ADMUX nh hng n hng c kt qu t thanh ghi d liu.
ADLAR c t ln 1 th kt qu c iu chnh tri.
ADLAR xa v 0 (mc nh) th kt qu c iu chnh phi.

Trang 38

ADC9:0
y l bit m t kt qu ca qu trnh chuyn i.
ADC Control and Status Register B ADCSRB
-

ADTS2 ADTS1 ADTS0

Bits 7:3
y l cc bit cha c ATmega32 s dng.
Bit 2:0 ADTS2:0
Khi bit ADATE trong thanh ghi ADCSRA c t ln 1 th la chn gi tr
ca cc bit ADTS2:0 cho php ngun trigger no s c chn.
Khi bit ADATE trong thanh ghi ADCSRA c xa v 0 th la chn gi tr
ca cc bit ADTS2:0 khng cn tc dng.
La chn ngun Trigger
ADTS2 ADTS1 ADTS0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
4.

Trigger Source
Free Running mode
Analog Comparator
External Interrupt Request 0
Time/Counter 0 Compare Match
Time/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event

Bt u mt qu trnh chuyn i
ATmega32 cho php ta la chn 1 trong 2 cch sau chuyn i 1 tn hiu
tng t thnh tn hiu s:
Khi bit ADSC c t ln 1 th ADC bt u chuyn i. Bit ny lun gi
mc cao khi qu trnh chuyn i ang cn tip din v c xa v 0
bng phn cng khi chuyn i hon thnh. Nu c 1 knh khc c la
chn trong khi qu trnh chuyn i cn ang tip din th ADC vn tip tc
v hon thnh chuyn i ang thc hin trc khi la chn chuyn i
knh tip theo.
S bin i c th la chn bng ch t ng trigger bng cnh ln da
trn s la chn cc ngun trigger khc nhau. Ch t ng trigger c
cho php khi thit lp bit ADATE trong thanh ghi ADCSRA ln 1. Ngun
trigger c la chn bi s thit lp v xa cc bit ADTS trong thanh ghi
ADCSRB. Khi cnh dng ca tn hiu trigger xut hin th tn s chuyn
i ADC (CLKADC) c thit lp v ADC bt u chuyn i. Nu tn hiu
trigger vn cn mc cao th 1 chuyn i mi s khng c bt u cho
n khi s chuyn i hon thnh. Nu c mt cnh dng khc xut hin
trong khi qu trnh bin i ang din ra th cnh dng ny s khng c
b chuyn i nhn ra.

Trang 39

ADC t ng trigger
Vic kt thc qu trnh bin i, ngha l thi im m mt tn hiu analog
c s ho v sn sng ch x l tip tc, s c bo hiu qua c ngt ADIF
trong thanh ghi iu khin v trng thi ADC (ADCSRA).
Khi 1 chuyn i hon thnh v thanh ghi d liu cp nht kt qu th bit ny
c t ln 1. Kt qu ca qu trnh bin i A/D c t cc thanh ghi d
liu ADCH v ADCL.
Ngi dng cn c th la chn mt trong hai ch hin th kt qu chuyn
i:
Nu bit ADLAR trong thanh ghi ADMUX c xa v 0: ADCL (bit 0 n
bit 7) v ADCH (bit 8 v bit 9).
Nu bit ADLAR trong thanh ghi ADMUX c thit lp ln 1: ADCL (bit 6
v bit 7) v ADCH (bit 8 n bit 15).
Kt qu ca chuyn i A/D:
ADC =

VIN *1204
VREF

Trang 40

3.9 B nh thi Watchdog bn trong

B nh thi Wachdog l mt b nh thi iu khin, c s dng lm thit b
nh thc trong trng hp phn mm b ri vo mt hoc mt s vng lp v tn
hoc vic thc thi chng trnh b mc li. B nh thi Watchdog c mt li ra, c
kh nng t li b iu khin.

Hnh 2.10: S khi b nh thi Watchdog

Mch nh thi Watchdog timer c gi nhp t mt b giao ng RC ring
bit trn chip. Bng cch iu khin mch chia tn s Watchdog timer, khong thi
gian reset mch Watchdog c th iu chnh c, cc khong Reset mch Watchdog
cng ph thuc vo in p ngun nui.
Ch hot ng tit kim nng lng:
ATmega32 c nhiu kh nng lm gim nng lng tiu th chuyn sang
trng thi ng (sleep mode), bit SE trong thanh ghi MCUCR phi c t ln 1, lnh
Sleep s c thc thi. Nu mt ngt cho php xut hin trong khi MCU ang
trng thi ng, th MCU s thc dy thc thi on chng trnh ngt v li tip tc
thc thi t lnh k tip theo lnh Sleep. Ni dung ca tp thanh ghi, SRAM, v b nh
I/O vn c gi nguyn. Nu mt tn hiu reset xut hin trong trng thi ng th
MCU s thc giy v thc thi t vect Reset.
Khi SM b xa v 0, th lnh Sleep bt buc MCU chuyn sang ch ngh,
lm ngng hot ng ca CPU nhng cho php b Timer/Counter Watchdog v ngt

Trang 41

h thng tip tc hot ng. c tnh ny cho php MCU nh thc cc ngt c
trigger t bn ngoi cng nh ngt bn trong ging nh ngt trn b nh thi v t
li watchdog. Nu s nh thc t ngt b so snh analog khng c yu cu, th b
so snh analog c th b ngt ngun nui bng cch t bit ACD vo thanh ghi iu
khin v trng thi so snh analog ACSR. Bin php ny lm gim dng tiu th trong
ch ngh.
Khi bit SM c t ln mt, lnh Sleep bt buc MCU chuyn sang ch
tit kim nng lng hay gim dng tiu th (power-down). Trong ch ny, b dao
ng ngoi b ngng hot ng, trong khi cc ngt ngoi v mch Watchdog vn tip
tc hot ng hoc ngt theo mc ngoi ln INT0 hoc INT1 mi c th nh thc
MCU.

Chng 4: KHI CNG SUT

4.1 Gii Thiu Tng Qut V Solid State Relay (SSR)
Khi ny phi m bo hai yu cu : cch ly v in v ng ngt ng tin cy.
C th dng relay m bo yu cu cch ly v in nhng li xy ra tia la in khi
ng ngt cng sut ln, cng nh tr tng i ln khng ph hp cho ng ngt
trong khong thi gian b. Qua ta thy vic dng bn dn l hiu qu hn c. Trong
d n ny nhm xut s dng SSR (Solid State Relay) relay bn dn nhm m bo
tt c 2 yu cu trn.
u im ca SSR:
+ ng ngt bng bn dn nn tng bn hn so vi dng tip im.
+ Gim thiu nh hng ca trng in t.
+ Thi gian p ng nhanh.
+ Chng Shock v nhiu tt.
+ Khng to ra ting n khi ng ngt.
+ tin cy cao.

Trang 42

4.2

Cc loi SSR ca hang OMRON

Hnh dng thc t mt s loi SS RELAY ca hng OMRON

Thng s ca mt vi loi SS RELAY 1phase

Trang 43

4.3

Cu trc v cch mc ng vo ra ca SSR

S kt ni vi ti v b iu khin

S cu to bn trong ca SSR

Trang 44

Chng 5: PHNG PHP IU KHIN NHIT

5.1 iu khin kiu ON/OFF:

-

L phng php iu khin n gin d thit k v gi thnh r, nhng iu khin

s b dao ng quanh nhit t ch khng n nh. Phng php ny thng
dng trong nhng i tng cho php khong nhit rng.

u ra ca b iu khin ch c hai v tr ph thuc vo du ca sai lch. Nu hai

v tr ny l ng hon ton v m hon ton th ngi ta gi l iu khin onoff . Hu ht cc b iu khin hai v tr u c thm vng trung ha ngn nga
s dao ng ca u ra (l dao ng ca hai v tr u ra khi sai lch quanh qun
bn im t). Vng trung ha l vng quanh im t m ti khng din ra
mt hnh ng iu khin no c. sai lch phi vt qua vng ny th mi xy
ra hnh ng iu khin.

th m t phng php iu khin ON/OFF

B iu khin ON/OFF cung cp cc xung nng lng n qu trnh iu
khin, iu ny s to ra mt chu k iu khin c bin ph thuc vo ba yu t :
qun tnh, thi gian tr, v mc thay i ca ti. dao ng s gim khi xy ra
mt hay nhiu thay i : tng qun tnh, gim thi gian tr, gim thay i ca
ti. iu khin hai v tr ch ph hp cho qu trnh c qun tnh ln, thi gian tr v
thay i trn ti nh (v d nh iu khin nhit l nung chagng hne. Tuy iu
khin hai v tr hn ch i tng iu khin nh vy, nhng do n n gin v r tin
nn ngi ta vn thch dng n

5.2 iu khin kiu PID:

H thng iu khin vng kn l h thng s xc nh sai khc gia trng thi
mong mun v trng thi thc (sai s) v to ra lnh iu khin loi b sai s. iu
khin PID thc hin ba cch pht hin v hiu chnh sai s ny.

Trang 45

H thng iu khin c th s dng P, PI, PD, hoc PID hiu chnh sai s.
Nhn chung, vn y l hiu chnh h thng bng cch la chn nhng gi tr
thch hp trong ba cch nu trn.
5.2.1 iu khin T L (P)
Cch th nht l P (proprotional t l) trong PID. Thut ng ny cho bit hot ng
iu khin ca b vi iu khin t l vi sai s. Ni cch khc, sai s cng ln th s
hiu chnh sai s cng cao.
L phng thc gim dn tn hiu iu khin khi n gn im t, c ngha l
khi nhit tin ti gn im t th rng xung Ton s gim theo. B iu khin
loi ny to tn hiu u ra t l vi sai lch. Cng gia tng t l (tc li) th
lng sai s to ra s thay i cng nh. iu ny khng c ngha l li cng cao
th cng tt, bi v khi li cng cao th khuynh hng dao ng ca bin iu khin
cng tng. Khi cn c mt s dung ha gia chng sao cho li ln mt mc
m khng to ra s dao ng.

th m t p ng ca b iu khin T L
V l do , ta thy rng khng th no loi tr hon ton c sai s, m lun
tn ti mt sai lch tnh c gi l sai lch t l (proportional offset). ln ca
sai lch tnh ny t l thun vi ln ca s thay i trn ti v t l nghch vi
li. Do b iu khin t l ch c dng khi li ln gim sai lch tnh
n mt mc c th chp nhn c.

Trang 46

Tuy nhin, u im ca b iu khin t l l p ng ngay tc khc. Khng h

c mt khong thi gian tr no k t khi xy ra s thay i trn ti cho n khi ra tn
hiu iu khin. V vy, c th dng b iu khin t l i vi nhng qu trnh c
qun tnh nh.
Phng trnh trong min thi gian :
y(t) = Kp.e(t)+y0
Hm truyn :
G(s) = Kp

5.2.2 iu khin Tch Phn (I)

Cch th hai l I (integral tch phn) trong PID, tch phn li theo thi gian, c
ngha l hiu chnh sai s c tnh n thi gian xy ra sai s. Ni cch khc, sai s xy
ra trong thi gian cng di th s hiu chnh li cng cao.
B iu khin tch phn to tn hiu iu khin bng mt lng t l vi tch
phn ca sai lch. V th, min l qu trnh cn sai s th b iu khin cn lm vic
v to s thay i ca tn hiu ra t l vi ln ca sai lch.
B iu khin tch phn c thng c kt hp n vi b iu khin t l
nhm b sung u im : trit tiu sai lch tnh.
Phng trnh trong min thi gian:
t

y(t)=KI. e(t)dt + y0
0

Hm truyn:

G(s)=KI/s

5.2.3 iu khin Vi Phn (D)

Cui cng l D (derivative o hm) trong PID, c ngha l vic hiu chnh sai s c
lin quan n o hm hoc thay i sai s i vi thi gian. Ni cch khc, sai s
thay i cng nhanh th hiu chnh sai s cng ln.
B iu khin vi phn to tn hiu ra da trn tc thay i ca sai lch. S

Trang 47

thay i ny c th l do bin o thay i, thay i im t, hay c hai. iu khin vi

phn chng li sai lch bng cch xem n thay i nhanh nh th no, v dng tc
thay i to tn hiu iu khin nhm lm gim sai lch.
Trong mi khong thi gian, u ra ca b iu khin vi phn t l vi dc
(tc thay i) ca tn hiu sai lch. Ta thy rng b iu khin vi phn l tng
khng bao gi c trong thc t. Khi hm nc xut hin, dc ca sai lch l v cng.
iu ny dn n p ng ca b iu khin vi phn l tng phi thay i vi ln
l v cng. Trong thc t, tc thay i ca b iu khin c mt gii hn ca n.
y l mt u im, bi v n s lm gim nhy ca b iu khin i vi cc loi
nhiu thng gp trong thc t ( cng l l do m nu c b iu khin vi phn l
tng th cng khng nn dng).
Tuy nhin, b iu khin vi phn khng bao gi dng ring mt mnh c. Bi
v u ra ca b iu khin ch thay i khi sai lch thay i, tc l nu sai lch ln
m khng thay i th b iu khin chagng lm g c : chp nhn sai lch . Do ,
n thng c dng chung vi b iu khin P, hay PI.
Phng trnh trong min thi gian :

y (t ) =
Hm truyn:

de

KD

(t )
dt

G(s) = KD.s

5.2.4 iu khin Tch Phn - T L (PI)

y l s kt hp ca b iu khin t l vi b iu khin tch phn
nhm trit tiu sai lch t l nh ni trn. Khi m b iu khin t l to tn hiu
ra t l vi sai lch th b iu khin tch phn li to tn hiu ra t l vi tch phn ca
sai lch. Do c tnh ca b iu khin tch phn, sai lch tnh ca h thng s c
loi tr.
Nghch o ca KI chnh l khong thi gian cn b iu khin tch to ra
thay i u ra bng vi s thay i to bi b iu khin t l.
Mc d c nhng u im nh k trn, vic thm vo khu tch phn cng
to ra nhc im : l gia tng khuynh hng dao ng ca bin iu khin. Do
cn phi gim t l i, h tr nn p ng chm hn so vi ban u. Nu qu trnh
c tr ln th tn hiu sai lch nhn c s khng phn nh sai lch tht s. Do
tr ny s lm cho p ng ca h khng cn ng vi sai lch hin ti, tc l h
lm vic vi tn hiu c.
Phng trnh trong min thi gian :
t

y(t) = KP.e(t)+KI. e(t ).dt + yo

Hm truyn:

G(s) = KP + KI/s

5.2.5 iu khin Vi Phn T L (PD)

B iu khin vi phn thng kt hp vi b iu khin t l nhm lm gim
khuynh hng dao ng v cho php nng cao li. Trong , b iu khin t l
thay u ra t l vi ln ca sai lch, b iu khin vi phn thay i u ra t l vi

Trang 48

tc bin i ca sai lch l tc l b iu khin vi phn tnh trc gi tr tng lai

ca sai lch v thay i u ra tng ng vi s tnh ton . iu ny lm cho b
iu khin vi phn tin dng trong qu trnh iu khin c ti thay i bt ng.
Phng trnh trong min thi gian :
Y(t) = KP.e(t) + KD
Hm truyn:

de(t )
+ y0
dt

G(s) = KP + KD.s

5.2.6 iu khin Vi Phn Tch Phn T L (PID)

B iu khin PID bao gm c ba b iu khin : vi phn, tch phn, t l. Tc
l kt hp tt c u im ca cc b iu khin k trn : tch phn loi b sai lch tnh,
vi phn gim khuynh hng dao ng v tnh trc gi tr tng lai ca sai lch c
bit hu dng khi ti thay i bt ng.
Phng trnh trong min thi gian :
t
de(t )
+ y0
y(t) = KP.e(t)+KI. e(t ).dt + KD
Hm truyn:

dt

G(s) = KP + KI/s + KD.s

Trang 49

*Tm thng s PID theo phng php sau:

Mt phng php c in nhng n gin v hiu qu chnh nh 3 thng s
KP, KI, KD ca b iu khin PID l phng php Ziegler Nichols th tc
chnh nh nh sau:
1. Ch iu khin h thng bng b iu khin t l KP (t KI=KD =0)
2. Tng KP n gi tri KC m h thng bt u bt n (bt u xut
hin s dao ng - im cc ca hm truyn kn nm trn trc o j, xc
nh tn s c ca dao ng va t c. T 2 gi tr KC v c va t
cc thng s KP, KI, KD c xc nh nh bng sau:

3. Tinh chnh li 3 thng s ny t c p ng nh mong mun

Trang 50

nh hng ca thng s PID i vi p ng ca h

- Khi thit k b PID nn theo cc bc sau c kt qu nh mong mun:
1. Tm p ng h h v xc nh thng s o cn ci thin.
2. Thm thnh phn Kp ci thin thi gian tng trng.
3. Thm thnh phn Kd gim vt l.
4. Thm thnh phn Ki trit tiu sai s xc lp.
5. iu chnh Kp, Ki, Kd cho n khi p ng cc thng s yu cu. Cui
cng, ng thm thnh phn Kp, Ki, Kd vo h n nu khng cn thit, b
iu khin cng n gin cng tt.

5.3 iu khin kiu FUZZY:

Trong lnh vc t ng ha, vic iu khin cc i tng nh nhit , p sut,
lu lng, m, vn tc, gia tc lun l mt bi ton kh v tnh cht phi tuyn
ca cc i tng ny. Phng php iu khin m, Fuzzy Logic, a ra cch thc
iu khin da trn cc lut pht biu gn vi suy ngh ca con ngi thay v da trn
cc phng trnh ton hc phc tp.
L nhit l m hnh phi tuyn. c trng ca l nhit l khu qun tnh nhit, khi bt
u cung cp nng lng u vo cho l nhit th nhit ca l tng t t . l t
ti nhit cn cung cp th mt khong thi gian kh di. y chnh l c tnh qun
tnh ca l nhit.

Trang 51

5.3.1 Khi nim c bn

Khi nim v logic m c gio s L.A Zadeh a ra ln u tin nm 1965, ti
trng i hc Berkeley, bang California - M. T l thuyt m c pht trin
v ng dng rng ri.
hiu r khi nim M l g ta thc hin php so snh sau :
- Tp P={2,3,5,...} l tp cc s thc R, tp hp ny c gi l tp hp kinh
in hay tp r, ng vi phn t x ta xc nh c mt gi tr y=S(x).
- Tp hp L={chm, trung bnh, hi nhanh, rt nhanh}
Tp ny c gi l tp cc bin ngn ng . Vi mi thnh phn ngn ng xk ca
pht biu trn nu n nhn c mt kh nng (xk) th tp hp F gm cc cp (x,
(xk)) c gi l tp m.
5.3.2 nh ngha tp m
Tp m F xc nh trn tp kinh in B l mt tp m mi phn t ca n l mt
cp gi tr (x,F(x)), vi x X v F(x) l mt nh x :

F(x) : B [0 1]
trong : F gi l hm thuc , B gi l tp nn.
Cc thut ng trong logic m

min tin cy

MX

Trang 52

Hnh1
cao tp m F l gi tr h = SupF(x), trong supF(x) ch gi tr nh nht
trong tt c cc chn trn ca hm F(x).

Min xc nh ca tp m F, k hiu l S l tp con tho mn :

S = SuppF(x) = { xB | F(x) > 0 }
Min tin cy ca tp m F, k hiu l T l tp con tho mn :
T = { xB | F(x) = 1 }
Cc dng hm thuc (membership function) trong logic m
C rt nhiu dng hm thuc nh : Gaussian, PI-shape, S-shape, Sigmoidal, Zshape

trapmf

gbellmf

trimf

gaussmf

gauss2mf

smf

1
0.8
0.6
0.4
0.2
0

zmf

psigmf

dsigmf

pimf

sigmf

1
0.8
0.6
0.4
0.2
0

5.3.3 B iu khin m
1. Cu trc mt b iu khin m
Mt b iu khin m gm 3 khu c bn:
+ Khu m ho
+ Thc hin lut hp thnh
+ Khu gii m
Xt b iu khin m MISO sau, vi vct u vo X = [u1 u 2 ... u n ]T

R1 If Then
H1
y

X
Rn If Then
Hn

Trang 53

2. Nguyn l iu khin m

lut iu khin

Giao din
u vo

Thit b
hp thnh

BK M

Giao din
u ra

I TNG

THIT B O

Hnh 4
5.3.4. Thit K B iu Khin M:
Cc bc thit k:
B1 : nh ngha tt c cc bin ngn ng vo/ra.
B2 : Xc nh cc tp m cho tng bin vo/ra (m ho).
+ Min gi tr vt l ca cc bin ngn ng.
+ S lng tp m.
+ Xc nh hm thuc.
+ Ri rc ho tp m.
B3 : Xy dng lut hp thnh.
B4 : Chn thit b hp thnh.
B5 : Gii m v ti u ho.
Cc bc thit k h thng iu khin m.
+ Giao din u vo gm cc khu: m ha v cc khu hiu chnh nh t l, tch
phn, vi phn
+ Thip b hp thnh : s trin khai lut hp thnh R
+ Giao din u ra gm : khu gii m v cc khu giao din trc tip vi i
tng.
Phn loi cc BK m
i. iu khin Mamdani
ii. iu khin m trt
iii. iu khin tra bng
iv. iu khin Tagaki/Sugeno

(MCFC)
(SMFC)
(CMFC)
(TSFC)

Trang 54

5.3.5 Thit k PID m

C th ni trong lnh vc iu khin, b PID c xem nh mt gii php a nng
cho cc ng dng iu khin Analog cng nh Digital. Vic thit k b PID kinh in
thng da trn phng php Zeigler-Nichols, Offerein, Reinish Ngy nay ngi
ta thng dng k thut hiu chnh PID mm (da trn phm mm), y chnh l c
s ca thit k PID m hay PID thch nghi.
1. S iu khin s dng PID m :
B CHNH
NH M

de
dt

THIT B
CHNH NH
BK PID

I TNG

M hnh Ton ca b PID m:

t
u(t) = Kpe(t) + K I e( x)dx + K D de(t )

dt

GPID(s) = K P +

KI
+ KDs
s

Cc tham s KP, KI, KD c chnh nh theo tng b iu khin m ring bit da

trn sai lch e(t) v o hm de(t). C nhiu phng php khc nhau chnh nh b
PID nh l da trn phim hm mc tiu, chnh nh trc tip, chnh nh theo Zhao,
Tomizuka v Isaka Nguyn tc chung l bt u vi cc tr KP, KI, KD theo ZeiglerNichols, sau da vo p ng v thay i dn tm ra hng chnh nh thch
hp.
2. Lut chnh nh PID:
Tn hiu ra
t
b1

c1
d1
a2

a1

b2

thi gian

Hnh6

Trang 55

+ Ln cn a1 ta cn lut K mnh rt ngn thi gian ln, do vy chn: KP ln,

KD nh v KI nh.
+ Ln cn b1 ta trnh vt l ln nn chn: KP nh, KD ln, KI nh.
+ Ln cn c1 v d1 ging nh ln cn a1 v b1.
3.
Chnh nh m tham s b iu khin PID
Cc tham s KR, TI, TD hay KR, KI, KD ca b iu khin PID c chnh nh trn
c s phn tch tn hiu ch o v tn hiu ra ca h thng, chnh xc l sai lch e(t)
v o hm

de
ca sai lch. C nhiu phng php chnh nh cc tham s cho b
dt

iu khin PID nh chnh nh qua phm hm mc tiu, chnh nh trc tip, song
phng php n gin nhng d p dng hn c l phng php chnh nh m ca
Zhao, Tomizuka v Isaka vi gi thit cc tham s KR, KD b chn :

K R K Rmin , K Rmax

K D K Dmin , K Dmax

Zhao, Tomizuka, Isaka chun ha cc tham s nh sau :

kR =

K R K Rmin
K Rmax K Rmin

kD =

K D K Dmin
K Dmax K Dmin

c 0 K R , K D 1
Nh vy, b chnh nh m s c hai u vo l e(t),

de
v ba u ra l K R , K D ,
dt

trong :
=

TI
TD

KI =

K R2
K D

4. iu khin nhit l bng phng php Fuzzy-PID:

Cc bc thit k :
4.1 Xc nh bin ngn ng

u vo : 2 bin
+
Sai lch nhit

ET = o - tXy dng b PID m iu khin

l nhit. Hm truyn l nhit theo Zeigler-Nichols : G(s) =

G(s)=

K
.
(Ts + 1)( Ls + 1)

Sai s

T
100% = 6%
T

T = xT = 6% x 200 = 12

Suy ra:
ET [-12 12]

Ke Ts
, tuyn tnh ho
Ls + 1

Trang 56

Tc tng DET =

ET (i + 1) E (i )
, vi T l chu k ly mu.
T

Chn sai lch nhit ti a 60C, thi gian ly mu 10sec

DET =

6
ET (i + 1) E (i )
=
=0.6
T
10

Suy ra:
DET [-0.6 0.6]

u ra : 3 bin
+
KP h s t l
+
KI h s tch phn
+
KD h s vi phn
Vi gi tr t khc nhau (K=200, K=500, K=1000,...) ta nhn thy c s khc nhau
2 cch iu khin:
* PID: vt l tuyn tnh theo s tng nhit
- K=200 C th gi tr nhit vt ln 280 C
- K=500 C th gi tr nhit vt ln hn 700 C
- Thi gian t gi tr t 120sec (khng thay i theo gi tr t)
* Fuzzy: vt l thay i theo cch chn khong gi tr hiu chnh ca Kr, Kd
- K=200, Kr =[0.0001 0.02], Kd=[0.01 0.1] th Kmax = 260
C
- K=200, Kr =[0.0001 0.02], Kd=[0.21 0.3 th Kmax = 220
C
Do tng gi tr Kr s gim vt l, thi gian t gi tr t s p ng
nhanh khi tng gi tr hiu chnh Kr.
Thi gian xc lp txl =600sec
Kt lun: khi iu khin mt h thng phi tuyn nh l nhit ta nn kt hp vi
phng php iu khin m c kt qu tt hn. vt l thp, thi gian xc lp
nh.
- Sau khi nghin cu l thuyt nhm xut xy dng h m theo cc bc sau:

Trc tin hai bin ngn ng u vo ng k n trong iu khin nhit l sai

lch nhit v tc tng gim nhit . Ngoi ra ngi ta cn c th k n mt
bin na l nhit hin ti.
Tuy nhin, phn ti u ha h m ca chng ta c m bo bi qu trnh hc ca
mng neuron nn ta c th n gin ha h m bng cch ch nh ngha hai bin ngn
ng m thi.
Sai lch nhit
c nh ngha nh l sai khc gia nhit t v nhit hin ti o c, k
hiu l ET.
ET = nhit t nhit o [C]

Trang 57

Mong mun ca chng ta l iu khin n 400C nn min xc nh ca bin s l

khong [-400C,+400C].
Trong min xc nh , ta nh ngha 7 tp m :
ET = {m nhiu, m va, m t, bng khng, dng t, dng va, dng nhiu}
hay ET = {NB, NM, NS, ZE, PS, PM, PB}
Tuy nhin, tp trung hn trong khong sai lch nh, ta khng phn b u 7 tp m
ny trn khong [-400C,+400C] m ch phn b u trong khong
[-15C,
+15C].

-400

NB

NM NS

-15

-10

-5

ZE PS

PM

PB

10

15

400 [C]

Tc tng gim nhit

L gi tr tng hay gim ca nhit hin ti so vi nhit trc trong khong
thi gian ly mu, k hiu l DET.
DET = (nhit hin ti nhit trc)/thi gian ly mu [C/s]
i tng iu khin l mt l nng dn dng c qun tnh tng i ln, trong
khong thi gian ly mu l 3 giy ch tng hay gim ti a 1,3C nn ta nh ngha
DET vi min xc nh l [-2,+2].
Cng nh ngha cho bin DET c 7 tp m vi tn gi nh trn, nh ngha trong
khong [-0,9;+0,9].
NB

-2

NM NS

-0,9 -0,6 -0,3

ZE PS

0,3

PM

PB

0,6

0,9

[C]/T[s]

Chu k iu khin
Ch c mt bin ngn ng cho u ra l Duty Cycle, nm trong khong [0%,100%],
k hiu l OUT.
Trn bin OUT ta nh ngha 9 tp m dng singleton
OUT = {OUT1, OUT2, OUT3, OUT4, OUT5, OUT6, OUT7, OUT8, OUT9}

Trang 58

OUT1

OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9

12,5

25

37,5

50

62,5

75

87,5 100

Phn b u 9 tp m ny trn min xc nh

Thit k h lut
Gm 7x7 = 49 lut s khi ban u da trn nhng nhn nh v i tng

ET

NB
NM
NS
ZE
PS
PM
PB

NB

NM

OUT1
OUT3
OUT5
OUT8
OUT9
OUT9
OUT9

OUT1
OUT2
OUT4
OUT7
OUT8
OUT9
OUT9

NS
OUT1
OUT2
OUT3
OUT6
OUT8
OUT9
OUT9

DET
ZE
OUT1
OUT1
OUT3
OUT5
OUT7
OUT9
OUT9

PS
OUT1
OUT1
OUT2
OUT4
OUT7
OUT8
OUT9

PM
OUT1
OUT1
OUT2
OUT3
OUT6
OUT8
OUT9

PB
OUT1
OUT1
OUT1
OUT2
OUT5
OUT7
OUT9

C mt khi nim ngi ta thng nhc n khi ni v h lut. chnh l mt iu

khin, th hin trn khng gian s kt hp ca cc tp m vo to tp m ra. Nhn
trn mt iu khin ta c th thy c hnh vi ca h : c u v trn tru khng hay
thay i bt ng ?.
Tnh lut v gii m
Tnh lut theo suy lun Max-Min v gii m bng phng php CoM.
Do FUZZY l gii thut iu khin tng i mi v v thi gian cng nh
kinh ph c hn nn i vi phn ny nhm ch dng li mc nghin cu l
thuyt. y cng xem nh l hng m rng ca ti, v nu c iu kin nhm s
tip tc nghin cu thm hon thin trong giai on 2 ca ti.

Trang 59

Lu gii thut chng trnh x l ON/OFF nh sau:

iu Khin ON/OFF

Nhp cc thng s
D tr tri nhit T%
Nhit t: t

c nhit l: To

To > T t. T%

Yes

Ton = 0
Toff =

Kt Thc

No

Ton =
Toff = 0

Trang 60

Lu gii thut ca chng trnh x l PID nh sau:

iu khin PID

Cc k hiu:
+ e(0) l sai s gia nhit
t v nhit o chu k hin
ti.

Nhp cc thng s Kp, Ki, Kd

Tnh: A0 = Kp +
A1 = -Kp -

Kd KiT
+
T
2

2 Kd KiT
+
T
2

A2 =

+ e(-1) l sai s chu k trc

.
+ e(-2) l sai s chu k trc
chu k hin ti hai chu k.

Kd
T

Gn sai s ban u: e(-2) = e(-1) = 0, u(-1) = 0

Tnh sai s: e(0)= Nhit t Nhit hin ti

Tnh u = A0*e(0) + A1*e(-1) + A2*e(-2) + u(-1)

Sai
u>0

Gn u = 0

ng
Sai
u < umax
ng

Xut xung Ton =

u
u max

*T ; Toff = T-Ton

Gn li e(-2) = e(-1) ; e(-1)=e(0), u(-1)= u

Kt thc

Mt chu k
iu khin

Gn u = umax
Lu : Umax =
e0*A0

Trang 61

Lu gii thut chng trnh x l FUZZY nh sau:

Bat au
Nhiet o o [t-1] = nhiet o o hien tai
Bat lo
Nhiet o o [t] = nhiet o hien tai
X ly m

Het thi gian theo duty cycle

Sai

ung
Tat lo
en thi gian lay mau

Sai

Trang 62

Phn 3: NI DUNG NGHIN CU V KT QU

THC HIN
I. Ni Dung Nghin Cu:
- Thit k v thi cng hon chnh phn mch o nhit , mch iu khin v mch
giao tip my tnh.
- Lp trnh giao din cho b iu khin, v cc phng php iu khin nhit ,
phng thc giao tip my tnh qua cng ni tip.
-

Chy th v cn chnh thnh cng thng s p ng ca l.

B sung thm chc nng cho php b sai s nhit.

B sung thm chc nng bo qu nhit.

II. Kt Qu Nghin Cu:

I.

Kt Qu iu Khin ON/OFF V p ng Thc T Ca L:

- Vng nhit thay i nm trong khong sai s cho php l 50 (nhng phi
chn ng tri nhit v nhp vo h thng).
- Hn ch l mi tm nhit t c d tr tri nhit khc nhau cn phi
xc nh chnh xc gim tri nhit.
- Chp nhn c cho nhng sn phm khng yu cu nhit qu chnh xc.
60 T%=10

80 T%=15

100 T%=10

150 T%=4

Time t

8 minute

8 minute

10 minute

13 minute

Vt l

Time n nh

None

None

none

none

Sai s nhit

+-5

+-5

+-5

+-5

Trang 63

th thu c da vo p ng ca l vi phng php ON/OFF

-

Ta thy nhit khng n nh nhit t m dao ng quanh im t, tuy

nhin vn nm trong vng sai s cho php.

II. Kt Qu iu Khin PID V p ng Thc T Ca L:

- Gim vt l bng cch gim Kd, tuy nhin tng Kd cng lm rt ngn time
p ng.
- T cch tm thng s PID theo l thuyt ng dng vo iu khin l ta thu
c cc thng s nh sau:
60 Tck=1

80 Tck=1

100 Tck=1

150 Tck=1

Kp=400 Ki=80
Kd=42

Kp=400 Ki=80
Kd=42

Kp=400 Ki=80 Kd=42

Kp=400 Ki=80 Kd=44

Time t

7 minute

12 minute

14 minute

25 minute

Vt l

Time n nh

12 minute

10 minute

8 minute

7 minute

Sai s nhit

+-2

+-2

+-2

+-1

Trang 64

th thu c da vo p ng ca l nhit 80
Ta thy vi thng s nh trn vt l vn cn cao v thi gian tng trng chm.

th thu c da vo p ng ca l nhit 100

Ta thy vi thng s nh trn vt l vn cn.

Trang 65

th thu c da vo p ng ca l nhit 150

III.

Ta thy vi thng s nh trn vt l gn nh khng c v thi gian tng

trng chp nhn c..
p ng tt nu thng s PID hp l vt l c th khng ch n mc thp
nht bng cch gim thng s Kd.
C th thay i thi gian tng trng ca h bng cch iu chnh Kp.
H nhanh n nh sau thi gian xc lp.

Kt Qu Qu Trnh Nghin Cu Thut Gii FUZZY:

60 Tck=1

100 Tck=1

150 Tck=1

Time t

8 minute

14 minute

18 minute

38 minute

Vt l

Time n nh

8 minute

8 minute

7 minute

5 minute

Sai s nhit

+-2

+-2

+-1

+-1

th thu c da vo p ng ca l nhit 80

Trang 66

th thu c da vo p ng ca l nhit 100

th thu c da vo p ng ca l nhit 150

- Ta thy vi phng php FUZZY tuy thi gian p ng chm hn nhng vt
l gn nh khng c.
IV. Kt Lun:
Sau thi gian nghin cu v thit k giai on 2 nhm hon thnh c
nhng cng vic c th nh sau:
+ Thi cng hon chnh m hnh l sy.
+ Thit k thnh cng mch iu khin, mch cng sut cho l sy.
+ Lp trnh hon thin chng trnh iu khin On/Off, PID v FUZZY.
+ Thit k v lp trnh giao din chng trnh giao tip my tnh cho b
iu khin bng phn mm Visual Basic.

Trang 67

Ti Liu Tham Kho

Ting Vit:
[1] Nguyn Th Phng H, iu khin t ng (1,2), NXB KHKT, 2002.
[2] Nguyn Trng Thun, iu khin Logic v ng dng, NXB KHKT H Ni,
2002.
[3] Nguyn Hong Phng, Bi Cng Cng, H m v ng dng, NXB
KHKT, 2004.
[4] Nguyn Vinh Quang, Matlab7, NXB KHKT H Ni, 2008.
[5] Nguyn c Thnh, Matlab v ng dng trong iu khin, NXB KHKT,
2007.
[6] Phan Xun Minh, Nguyn Don Phc, L thuyt iu khin m, NXBKT,
2006.
[7] V Hiu Ngha, Cc chng trnh mu Visuabasic 6.0, NXB KHKT, 2000.
Ting Anh:
[8] Prentice Hall. Li-Xin Wang, A Course in Fuzzy Systems and Control, 2006.
[9] Tood P.Meyrath, Multipurpose Analog PID controller, 2007.
[10] Joe Pardue, C Programing for Microcontrollers, 2000.

Trang 68

PH LC
Phn A: HNG DN S DNG THIT B
Giao din chng trnh giao tip my tnh:

Giao din chnh chng trnh iu khin v giao tip

Giao din chnh chng trnh iu khin ON/OFF

Trang 69

Giao din chnh chng trnh iu khin PID

Giao din chnh chng trnh iu khin FUZZY

Trang 70

Giao din chnh chng trnh thu thp v v th

- Chng trnh c vit trn nn VisualBasic. Giao tip vi mch iu
khin qua cng RS232.
- Ngoi ra ngi dng cn c th thit lp cc thng s iu khin bng
thanh cng c pha trn.
- u tin chn ch cn iu khin bng cc button bn di. Tip
theo form con chnh ch s hin ra ta chn cng Com v tc baurd.
Sau nhp cc thng s iu khin nh nhit t, qu nhit, ..ty theo
tng ch . Chn ch iu khin thng thng hoc tun t. Click nt Run
chy chng trnh.
- C 2 ch iu khin:
+ iu khin thng: l nhp nhit , cc thng s cn thit vo
l s hot ng bnh thng
+ iu khin tun t: Cho php nhp 4 mc nhit v thi gian
tn ti ca mi mc. Dng cho sn phm cn qua cc vng nhit khc nhau.
- Nhit l s th hin Nhit o. Khi nhit o ln hn thng s
qu nhit => l t ng ngt v pht ci cnh bo.
- Ngoi ra t giao din chnh c th click vo button Graph thu thp
thng s v my tnh v v th p ng ca l.
- File -> Close() : dng ng giao din ngng kt ni v thot ra
ngoi.
- Control: thit lp cc ch iu khin nh: ON/OFF, PID, FUZZY.
- About -> Author: Cc thng tin v tc gi.
- Help: Cc thng tin hng dn ngi dng.

Trang 71

Giao din nhp thng s trn LCD:

Mn hnh
LCD 20x4.

DOWN

MODE

UP

Gm 3 nt
nhn iu
chnh.

Hnh nh thc t b iu khin

B iu khin gm mn hnh hin th v 3 phm nhn. Phm MODE vo ch
iu chnh. Khi vo ch iu chnh ri th dng phm UP hoc DOWN thay
i thng s cn chnh.

Mn hnh hin th giao din iu khin

Mn hnh chnh hin th cc thng tin v ch iu khin, Nhit ci t v
nhit thc t ca l. Nh hnh trn th thng s ca l tng ng nh sau:
Ch iu khin: PID
Nhit t:
104
Nhit hin ti: 32

Trang 72

Khi nhn phm Mode ln th nht, giao din s thay i thnh mn hnh nh bn di.
Con tr s nhp nhy ti v tr Control ngi dng c th dng phm UP hoc DOWN
thay i thnh cc ch iu khin khc nh ON/OFF, FUZZY

Mn hnh SETUP ch PID

Khi nhn phm MODE ln hai, con tr s di chuyn xung i tng Chu k
iu khin. Ngi dng s dng phm UP/DOWN tng hoc gim chu k gii hn
t 1 n 10 giy.
Tng t nh trn ngi dng s dng phm Mode di chuyn n cc i
tng khc nh Kp, Ki, Kd (gi tr gii hn l t 0-500). Cc thng s Kp dng
thay i thi gian tng trng nhit , Ki gim sai lch tnh v Kd gim vt l.
Trc khi thot ra ngoi con tr s di chuyn n mc Nhit t, ngi
dng c th dng phm UP/DOWN tng hoc gim nhit t (mc thay i t 0200).

Mn hnh SETUP ch ON/OFF

Tng t nh trn ta dng phm MODE di chuyn n i tng cn chnh
v phm UP/DOWN tng gim i tng.
ch ny c thm ch bo v qu nhit (c tc dng chung cho cc ch
khc). Bo v qu nhit l phng khi khi cng sut b trc trc v l vn tip
tc c nung mc du khng cn tn hiu iu khin nung l (v d nh opto h,
dnh tip im relay,....). Khi nhit tng qu mc bo v b iu khin s pht ra
tn hiu bo ng.

Trang 73

ch ny c thng s Off before ci t l tt trc bao nhiu phn trm nhm

gim thiu tri nhit i vi ch ON/OFF.

Giao din SETUP chng trnh FUZZY

- ch ny cch thit lp ging nh phn trn. C thm cc thng s
iu khin ch FUZZY.

MT S HNH NH V M HNH L SY

Hnh nh bn ngoi l sy

Trang 74

Hai thanh
in tr t
l c b
tr trn v
di.

Cch b tr in tr t l

B tr cm bin
nhit
Thermocouple
loi K

Cch b tr cm bin nhit

Trang 75

L nhit v b iu khin

Board mch iu khin

Trang 76

B tr cm bin bn trong l

Khi SSRELAY v mch giao tip my tnh

Trang 77

Phn B: Cc file m phng trn Mattlab

Cc file chy m phng chng trnh Fuzzy:
%File: HeaterFuzzyPID.m
clc
clear all
%Khoi tao gia tri ban dau
N = 800 ; % Thoi gian mo phong
SW = 1
; % Chon tin hieu vao 1 : Nac -1 : Xung
%Gia tri dung chinh dinh
Krmax = 0.05 ; % Krmax<=1
Krmin = 0.0001 ; % Krmin>=0
Kdmax = 0.2 ; % Kdmax<=1
Kdmin = 0.05 ; % Kdmin>0
%Nhap thong so ham truyen G(s) cua lo nhiet :
K=200 ; % 200, 500, 1000
T=60 ; %
L=720 ; %
%Tinh thong so PID theo Ziegler-Nichols
fprintf('Calculating ''P/I/D''...\n');
P=1.2*L/(T*K) %T1=T ;T2=L
I=P/(2*T)
D=P*0.5*T
fprintf('Done \n');
%Thiet lap Fuzzy
addpath([matlabroot '\work\FuzzyPID']);
fprintf('Initializing ''Kr/Kd/anpha''...\n');
Kr_fuzzy = readfis('Kr.fis');
anpha_fuzzy = readfis('anpha.fis');
Kd_fuzzy = readfis('Kd.fis');
fprintf('Done with initialization.\n');
%FILE: Chnh nh KR
function [sys,x0,str,ts] = Kr_Fuzzy(t,x,u,flag)
switch flag,
case 0
[sys,x0,str,ts] = mdlInitializeSizes();
case 3
sys = mdlOutputs(t,x,u);
case {1,2,4,9}
sys = [];
otherwise
error(['Unhandled flag = ',num2str(flag)]);
end;
function [sys,x0,str,ts] = mdlInitializeSizes()
sizes = simsizes;
sizes.NumContStates = 0;

Trang 78

sizes.NumDiscStates = 0;
sizes.NumOutputs = 1;
sizes.NumInputs = 3;
sizes.DirFeedthrough= 1;
sizes.NumSampleTimes= 1;
sys = simsizes(sizes);
str = [];
x0 = [];
ts = [-1 0];
function sys = mdlOutputs(t,x,u)
sys = u(1)*(u(2) - u(3)) + u(3);
%FILE: Chnh nh ANPHA
function [sys,x0,str,ts] = anpha_Fuzzy(t,x,u,flag)
switch flag,
case 0
[sys,x0,str,ts] = mdlInitializeSizes();
case 3
sys = mdlOutputs(t,x,u);
case {1,2,4,9}
sys = [];
otherwise
error(['Unhandled flag = ',num2str(flag)]);
end;
function [sys,x0,str,ts] = mdlInitializeSizes()
sizes = simsizes;
sizes.NumContStates = 0;
sizes.NumDiscStates = 0;
sizes.NumOutputs = 1;
sizes.NumInputs = 3;
sizes.DirFeedthrough= 1;
sizes.NumSampleTimes= 1;
sys = simsizes(sizes);
str = [];
x0 = [];
ts = [-1 0];
function sys = mdlOutputs(t,x,u)
if((u(1) ~= 0)&(u(3) ~= 0))
sys = (u(2)*u(2))/(u(1)*u(3));
else
sys = 1;
end
%FILE: Chnh nh KD

Trang 79

function [sys,x0,str,ts] = Kd_Fuzzy(t,x,u,flag)

switch flag,
case 0
[sys,x0,str,ts] = mdlInitializeSizes();
case 3
sys = mdlOutputs(t,x,u);
case {1,2,4,9}
sys = [];
otherwise
error(['Unhandled flag = ',num2str(flag)]);
end;
function [sys,x0,str,ts] = mdlInitializeSizes()
sizes = simsizes;
sizes.NumContStates = 0;
sizes.NumDiscStates = 0;
sizes.NumOutputs = 1;
sizes.NumInputs = 3;
sizes.DirFeedthrough= 1;
sizes.NumSampleTimes= 1;
sys = simsizes(sizes);
str = [];
x0 = [];
ts = [-1 0];
function sys = mdlOutputs(t,x,u)
sys = u(1)*(u(2) - u(3)) + u(3);